摘要:
It is made possible to detect degradation in a circuit before an operation fault will occur. A semiconductor integrated circuit includes: a circuit to be tested; a plurality of logical circuits which have different logical thresholds and which perform operation on an output of the circuit to be tested, on the basis of the logical thresholds; and a degradation notice signal generation circuit which generates a degradation notice signal to give notice that the circuit to be tested has degraded, when outputs of the logical circuits do not coincide with each other.
摘要:
According to one embodiment, a semiconductor integrated circuit includes first and second resistance change type memory element and first and second switches. The first resistance change type memory element includes a first terminal connected to a first power supply and a second terminal connected to a first node. The second resistance change type memory element includes a third terminal connected to the first node and a fourth terminal connected to a second power supply. The first switch includes one end of a first current path connected to a first program power supply and the other end of the first current path connected to the first node. The second switch includes one end of a second current path connected to the first node and the other end of the second current path connected to a second program power supply.
摘要:
It is made possible to provide a flip-flop circuit capable of implementing the error correction function with a small area increase as far as possible and a pipeline system using such a flip-flop circuit. A flip-flop circuit includes: a flip-flop configured to operate based on a rising edge or a falling edge of a first clock signal; a decision circuit configured to compare an input of the flip-flop with an output thereof and output a request signal when the input of the flip-flop is different from the output thereof; and a control circuit configured to receive a second clock signal from outside and generate the first clock signal and a confirmation signal. When the request signal is sent from the decision circuit after the flip-flop has been activated, the control circuit inverts the first clock signal, sends the confirmation to the decision circuit, and makes the decision circuit cancel the request signal.
摘要:
A rotary atomizing-head type coating machine, wherein a paint passage for flowing a paint to a rotary atomizing-head, a turbine air passage flowing a turbine air to the turbine of an air motor, a discharge air passage for flowing the turbine air after driving the turbine to the outside in the form of a discharge air, and a heat insulating air discharge passage of a heat insulated air passage axially extending while surrounding the discharge air passage and allowing hot heat insulated air to flow therein are formed in the bottom part of a housing body forming a housing. Thus, even if the turbine air expanded in a heat insulated state and reduced in temperature flows in the discharge air passage, the housing can be prevented from being cooled by the discharge air by flowing a heat insulated air with a temperature higher than that of the discharge air in the heat insulated air discharge passage.
摘要:
It is made possible to provide a random number generation device which generates a physical random number with as little power dissipation as possible. A random number generation device includes: a ring oscillator having at least one set, each set comprising a current noise source and a Schmitt inverter configured to receive an output of the current noise source; and a conversion circuit configured to convert output frequency fluctuation of the ring oscillator to a random number and output the random number.
摘要:
A semiconductor memory element that stores data as a resistance difference. The memory element comprises a MIS transistor, a two-terminal variable resistor element, and a fixed resistor element. The MIS transistor has a gate. The two-terminal variable resistor element is connected between the gate of the MIS transistor and a first power-supply terminal. The variable resistor element has a resistance that changes in accordance with a current flowing in the variable resistor element or the direction in which the current flows and that remains unchanged when the current is made to stop flowing. The fixed resistor element is connected between the gate of the MIS transistor and a second power-supply terminal.
摘要:
Uranium is recovered from its solution through contact with a uranium-recovering material of higher resistance to water and higher mechanical strength comprising a weakly basic anion exchange resin having pyridine nuclei at its main chain or side chain, and a crossed-linked polymer structure with a high uranium selectivity at a high uranium-adsorbing speed.
摘要:
It is made possible to provide a random number generation device which generates a physical random number with as little power dissipation as possible. A random number generation device includes: a ring oscillator having at least one set, each set comprising a current noise source and a Schmitt inverter configured to receive an output of the current noise source; and a conversion circuit configured to convert output frequency fluctuation of the ring oscillator to a random number and output the random number.
摘要:
One embodiment provides a phase-locked loop (PLL), in which a sequencer controls a loop filter such that, when a signal indicating turning-off of a power supply of the PLL is input thereto, or when a signal indicating turning-on of the power supply of the PLL is input thereto, a resistance value of a first resistance change device in the loop filter is a first resistance value, and that, after the PLL is stabilized, the resistance value of the first resistance change device is a second resistance value which is higher than the first resistance value.
摘要:
According to one embodiment, a three-dimensional semiconductor integrated circuit includes first, second and third chips which are stacked, and a common conductor which connects the first, second and third chips from one another. The first chip includes a first multi-leveling circuit, the second chip includes a second multi-leveling circuit, and the third chip includes a decoding circuit. The first multi-leveling circuit includes a first inverter to which binary first data is input and which outputs one of first and second potentials and a first capacitor which is connected between an output terminal of the first inverter and the common conductor. The second multi-leveling circuit includes a second inverter to which binary second data is input and which outputs one of third and fourth potentials and a second capacitor which is connected between an output terminal of the second inverter and the common conductor.