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公开(公告)号：US20160373144A1
公开(公告)日：2016-12-22
申请号：US15165375
申请日：2016-05-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kiichiro Takenaka
CPC classification number: H04B1/0475 , H03F1/0222 , H03F3/195 , H03F3/211 , H03F3/24 , H03F3/245 , H03F3/45475 , H03F2200/102 , H03F2200/105 , H03F2200/336 , H03F2200/411 , H03F2200/451 , H03F2200/537 , H03F2200/541 , H03F2203/45112 , H03F2203/45172 , H04B2001/0408
Abstract: A power amplification module includes: first to fourth differential amplifiers; first to fourth input windings that are respectively connected to differential outputs of the first to fourth differential amplifiers; first to fourth output windings that are respectively electromagnetic-field coupled with the first to fourth input windings; and a bias circuit that controls supply of a bias voltage on the basis of a mode signal. The first to fourth output windings are connected in series with each other. The winding ratio between each input winding and output winding is 2:1. The bias circuit supplies a bias voltage to the first to third differential amplifiers and halts supply of the bias voltage to the fourth differential amplifier in a case of an envelope tracking scheme. The bias circuit supplies the bias voltage to the first to fourth differential amplifiers in a case of an average power tracking scheme.
Abstract translation: 功率放大模块包括：第一至第四差分放大器; 分别连接到第一至第四差分放大器的差分输出的第一至第四输入绕组; 分别与第一至第四输入绕组电磁场耦合的第一至第四输出绕组; 以及偏置电路，其基于模式信号来控制偏置电压的供给。 第一至第四输出绕组彼此串联连接。 每个输入绕组和输出绕组之间的绕组比为2：1。 在包络跟踪方案的情况下，偏置电路向第一至第三差分放大器提供偏置电压并且将偏置电压的电源停止给第四差分放大器。 在平均功率跟踪方案的情况下，偏置电路将偏置电压提供给第一至第四差分放大器。
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公开(公告)号：US20160360495A1
公开(公告)日：2016-12-08
申请号：US15241991
申请日：2016-08-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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33.发明申请公开(公告)号：US20150011256A1
公开(公告)日：2015-01-08
申请号：US14369216
申请日：2012-12-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
IPC: H04W52/24
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
Abstract translation: 高频信号处理装置和无线通信装置可以实现功耗的降低。 例如，当向高频功率放大器指示的功率电平等于或大于第二参考值时，通过使源电压控制电路使用检测结果控制高速DCDC转换器来执行包络跟踪 包络检测电路，并使偏置控制电路指示固定的偏置值。 源电压控制电路和偏置控制电路指示当所指示的功率电平在第二参考值到第一参考值的范围内时，源电压和偏置值与指示功率电平的减小成比例地减小，以及 当指示的功率电平小于第一参考值时，指示固定的源极电压和固定的偏置值。
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公开(公告)号：US11791782B2
公开(公告)日：2023-10-17
申请号：US17123230
申请日：2020-12-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masao Kondo , Kiichiro Takenaka , Satoshi Tanaka , Takayuki Tsutsui
CPC classification number: H03F3/213 , H01L23/66 , H01L24/16 , H03F1/565 , H05K1/181 , H01L2223/6655 , H01L2224/16227 , H01L2924/1421 , H01L2924/30111 , H03F2200/222
Abstract: A semiconductor chip includes a plurality of transistor rows. Corresponding to the plurality of transistor rows, a first bump connected to a collector of the transistor is arranged, and a second bump connected to an emitter is arranged. The transistor rows are arranged along sides of a convex polygon. A first land and a second land provided in a circuit board are connected to the first bump and the second bump, respectively. A first impedance conversion circuit connects the first land and the signal output terminal. A plurality of transistors in the transistor row are grouped into a plurality of groups, and the first impedance conversion circuit includes a reactance element arranged for each of the groups.
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公开(公告)号：US11356064B2
公开(公告)日：2022-06-07
申请号：US16867699
申请日：2020-05-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Satoshi Arayashiki , Satoshi Sakurai
Abstract: A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.
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Patent Agency Ranking
公开(公告)号：US11128271B2
公开(公告)日：2021-09-21
申请号：US16720308
申请日：2019-12-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yuuma Noguchi , Hidetoshi Matsumoto , Kiichiro Takenaka , Satoshi Tanaka
Abstract: A power supply circuit supplies a variable voltage to a power amplifier that amplifies a radio-frequency signal, and includes a transistor and a current detecting resistor. The transistor includes a collector or drain that is supplied with a fixed voltage from a fixed voltage source, a base or gate that receives an envelope signal tracking an envelope of the radio-frequency signal, and an emitter or source that outputs the variable voltage that is based on the envelope signal. The current detecting resistor is electrically connected between the fixed voltage source and the collector or drain of the transistor.
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公开(公告)号：US10750454B2
公开(公告)日：2020-08-18
申请号：US16744852
申请日：2020-01-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
IPC: H04W52/24 , H03F1/02 , H03F3/19 , H04W52/02 , H04B1/04 , H03F3/24 , H03F3/189 , H03F3/21 , H04W88/06
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号：US10548092B2
公开(公告)日：2020-01-28
申请号：US16243634
申请日：2019-01-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
IPC: H04W52/24 , H04W52/02 , H03F3/189 , H03F3/24 , H04B1/04 , H03F1/02 , H03F3/19 , H03F3/21 , H04W88/06
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号：US10484024B2
公开(公告)日：2019-11-19
申请号：US16211940
申请日：2018-12-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kiichiro Takenaka
Abstract: A transmission unit includes: a power amplification module that amplifies the power of an input signal and outputs an amplified signal; and a power supply module that supplies a power supply voltage to the power amplification module on the basis of a first control signal corresponding to the band width of the input signal. On the basis of the first control signal, the power supply module varies the power supply voltage in accordance with the amplitude level of the input signal in the case where the band width of the input signal is a first band width and varies the power supply voltage in accordance with the average output power of the power amplification module in the case where the band width of the input signal is a second band width that is larger than the first band width.
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公开(公告)号：US20190068129A1
公开(公告)日：2019-02-28
申请号：US16111797
申请日：2018-08-24
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masahiro Ito , Tsuyoshi Sato , Kiichiro Takenaka , Hidetoshi Matsumoto
CPC classification number: H03F1/26 , H03F1/0266 , H03F1/0288 , H03F3/19 , H03F3/191 , H03F3/245 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/372 , H03F2200/451
Abstract: A power amplifier circuit includes a Doherty amplifier including a divider that divides a first signal into a second signal and a third signal, a carrier amplifier that amplifies the second signal and outputs a fourth signal, a peak amplifier that amplifies the third signal and outputs a fifth signal, a combiner that combines the fourth signal and the fifth signal and outputs an amplified signal of the first signal, a first bias circuit that supplies a first bias current or voltage to the carrier amplifier, and a second bias circuit that supplies a second bias current or voltage corresponding to a control signal to the peak amplifier; and a control circuit that supplies the control signal corresponding to a level of the second signal to the second bias circuit. The control circuit includes a detecting unit, an output unit, and a filter circuit.
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