公开(公告)号：US09247162B2

公开(公告)日：2016-01-26

申请号：US14317059

申请日：2014-06-27

Applicant: OmniVision Technologies, Inc.

Inventor： Jie Shen ,  Tiejun Dai

IPC: H04N5/357 ,  H04N5/378

CPC classification number: H04N5/3575 ,  H04N5/378

Abstract: A system for performing digital correlated double sampling in an image sensor includes a memory for storing most significant bits of the digital image data and reset data produced by an analog-to-digital convertor. The system further includes least significant bit latches for each of the digital image data and reset data. The most significant bits are recombined with the least significant bits in respective recombined latches for each of the digital image data and reset data. A correlated double sampling stage then performs correlated double sampling and stores the correlated double sampled data in memory.

Abstract translation: 用于在图像传感器中执行数字相关双重采样的系统包括用于存储数字图像数据的最高有效位的存储器和由模拟 - 数字转换器产生的复位数据。 该系统还包括用于每个数字图像数据和复位数据的最低有效位锁存器。 最高有效位与用于数字图像数据和复位数据中的每一个的相应重组锁存器中的最低有效位重新组合。 相关的双采样级然后执行相关双采样并将相关的双采样数据存储在存储器中。

公开(公告)号：US20150381911A1

公开(公告)日：2015-12-31

申请号：US14317059

申请日：2014-06-27

Applicant: OmniVision Technologies, Inc.

Inventor： Jie Shen ,  Tiejun Dai

IPC: H04N5/357 ,  H04N5/378

CPC classification number: H04N5/3575 ,  H04N5/378

Abstract: A system for performing digital correlated double sampling in an image sensor includes a memory for storing most significant bits of the digital image data and reset data produced by an analog-to-digital convertor. The system further includes least significant bit latches for each of the digital image data and reset data. The most significant bits are recombined with the least significant bits in respective recombined latches for each of the digital image data and reset data. A correlated double sampling stage then performs correlated double sampling and stores the correlated double sampled data in memory.

Abstract translation: 用于在图像传感器中执行数字相关双重采样的系统包括用于存储数字图像数据的最高有效位的存储器和由模拟 - 数字转换器产生的复位数据。 该系统还包括用于每个数字图像数据和复位数据的最低有效位锁存器。 最高有效位与用于数字图像数据和复位数据中的每一个的相应重组锁存器中的最低有效位重新组合。 相关的双采样级然后执行相关双采样并将相关的双采样数据存储在存储器中。

公开(公告)号：US20150365586A1

公开(公告)日：2015-12-17

申请号：US14835503

申请日：2015-08-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Tiejun Dai ,  Eiichi Funatsu ,  Donghui Wu ,  Zheng Yang ,  Xiao Xie

IPC: H04N5/232 ,  H04N5/376 ,  H04N5/243 ,  H04N5/378

CPC classification number: H04N5/23212 ,  H04N5/243 ,  H04N5/3765 ,  H04N5/378

Abstract: A method of focusing an image sensor includes scanning a first portion of an image frame from an image sensor a first time at a first rate to produce first focus data. A second portion of the image frame from the image sensor is scanned at a second rate to read image data from the second portion. The first rate is greater than the second rate. The first portion of the image frame is scanned a second time at the first rate to produce second focus data. The first focus data and the second focus data are compared, and the focus of a lens is adjusted in response to the comparison of the first focus data and the second focus data.

Abstract translation: 聚焦图像传感器的方法包括以第一速率首先从图像传感器扫描图像帧的第一部分以产生第一焦点数据。 以第二速率扫描来自图像传感器的图像帧的第二部分，以从第二部分读取图像数据。 第一个比率大于第二个比率。 以第一速率第二次扫描图像帧的第一部分以产生第二焦点数据。 比较第一焦点数据和第二焦点数据，并且响应于第一焦点数据和第二焦点数据的比较来调整透镜的焦点。

公开(公告)号：US09148596B1

公开(公告)日：2015-09-29

申请号：US14247855

申请日：2014-04-08

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Tianjia Sun ,  Rui Wang ,  Liping Deng ,  Tiejun Dai

IPC: H04N5/369 ,  H04N5/357

CPC classification number: H04N5/3698 ,  H04N5/357 ,  H04N5/378

Abstract: An image sensor read out circuit includes a first current mirror circuit in which a second current conducted through a second current path is controlled in response to a first current conducted through the first current path. The second current is conducted through an amplifier transistor of a pixel circuit. A first current source is coupled to the first current path to provide a substantially constant current component of the first current. A second current source is coupled to a power supply rail of the pixel circuit and coupled to the first current path to provide a ripple current component of the first current. The ripple current component provided by the second current source is responsive to a ripple in the power supply rail. The first current is responsive to a sum of the currents from the first and second current sources.

Abstract translation: 图像传感器读出电路包括第一电流镜电路，其中响应于通过第一电流路径传导的第一电流来控制通过第二电流路径传导的第二电流。 第二电流通过像素电路的放大器晶体管导通。 第一电流源耦合到第一电流路径以提供第一电流的基本上恒定的电流分量。 第二电流源耦合到像素电路的电源轨，并耦合到第一电流路径以提供第一电流的纹波电流分量。 由第二电流源提供的纹波电流分量响应于电源轨道中的纹波。 第一电流响应于来自第一和第二电流源的电流的总和。

公开(公告)号：US09142581B2

公开(公告)日：2015-09-22

申请号：US13669107

申请日：2012-11-05

Applicant: OmniVision Technologies, Inc.

Inventor： Yin Qian ,  Hsin-Chih Tai ,  Tiejun Dai ,  Duli Mao ,  Cunyu Yang ,  Howard E. Rhodes

IPC: H01L27/146 ,  H01L23/58 ,  H01L23/00

CPC classification number: H01L27/1469 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/585 ,  H01L24/05 ,  H01L24/08 ,  H01L24/94 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/14689 ,  H01L2224/04042 ,  H01L2224/05567 ,  H01L2224/08145 ,  H01L2224/80896 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12043 ,  H01L2924/1434 ,  H01L2924/37001 ,  H01L2224/80 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

Abstract: An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.

Abstract translation: 集成电路系统包括在电介质的接合界面处结合到第二器件晶片的第一器件晶片。 每个晶片包括多个模具，其中每个模具包括形成在模具的边缘区域处的装置，金属堆叠和密封环。 包括在第二器件晶片的管芯中的密封圈各自包括设置有金属的第一导电路径，所述第一导电路径形成在从第二器件晶片的背面延伸穿过第二器件晶片的第一开口中，并且通过接合界面到达密封环 在第一器件晶片中的相应管芯。

公开(公告)号：US09119544B2

公开(公告)日：2015-09-01

申请号：US13622976

申请日：2012-09-19

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Tiejun Dai ,  Junzhao Lei

IPC: H04N7/18 ,  H04N5/33 ,  A61B1/045 ,  H04N5/235 ,  A61B1/00 ,  A61B1/05 ,  H04N5/353 ,  H04N5/225

CPC classification number: A61B1/045 ,  A61B1/00004 ,  A61B1/051 ,  H04N5/2256 ,  H04N5/235 ,  H04N5/2354 ,  H04N5/3532 ,  H04N2005/2255

Abstract: A CMOS pixel array is introduced into a dark environment to acquire video image frames. During a first frame, each row of pixels is sequentially reset, one row at a time, and then each row of pixels is sequentially read out, one row at a time. During a second frame, each row of pixels is sequentially reset, one row at a time, and then each row of pixels sequentially read out, one row at a time. A light source illuminates the dark environment during a vertical blanking period between the reading of the last row during the first frame and the reading of the first row during the second frame. The light source does not illuminate the dark environment between reading the first and last rows during the first frame nor between reading the first and last rows during the second frame.

Abstract translation: 将CMOS像素阵列引入黑暗环境中以获取视频图像帧。 在第一帧期间，每行像素被顺序复位，一次一行，然后每行像素被顺序地读出，一次一行。 在第二帧期间，每行像素被顺序复位，一次一行，然后每行像素顺序读出，一次一行。 在第一帧期间最后一行的读取和第二帧期间的第一行的读取之间的垂直消隐期间，光源照亮黑暗环境。 光源在第一帧期间在读取第一行和最后一行之间以及在第二帧期间读取第一行和最后一行之间不会照亮暗环境。

公开(公告)号：US20140103411A1

公开(公告)日：2014-04-17

申请号：US14033293

申请日：2013-09-20

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Tiejun Dai ,  Guannho George Tsau

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14609 ,  H01L27/14634 ,  H01L27/1464

Abstract: An example imaging sensor system includes a backside-illuminated CMOS imaging array formed in a first semiconductor layer of a first wafer. The CMOS imaging array includes an N number of pixels, where each pixel includes a photodiode region. The first wafer is bonded to a second wafer at a bonding interface between a first metal stack of the first wafer and a second metal stack of the second wafer. A storage device is disposed in a second semiconductor layer of the second wafer. The storage device includes at least N number of storage cells, where each of the N number of storage cells are configured to store a signal representative of image charge accumulated by a respective photodiode region. Each storage cell includes a circuit element that is sensitive to light-induced leakage.

Abstract translation: 示例性成像传感器系统包括形成在第一晶片的第一半导体层中的背面照明CMOS成像阵列。 CMOS成像阵列包括N个像素，其中每个像素包括光电二极管区域。 第一晶片在第一晶片的第一金属堆叠和第二晶片的第二金属堆叠之间的结合界面处结合到第二晶片。 存储装置设置在第二晶片的第二半导体层中。 存储装置包括至少N个存储单元，其中N个存储单元中的每一个被配置为存储表示由相应光电二极管区域累积的图像电荷的信号。 每个存储单元包括对光诱导的泄漏敏感的电路元件。

公开(公告)号：US12294801B2

公开(公告)日：2025-05-06

申请号：US18303479

申请日：2023-04-19

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Zhe Gao ,  Ling Fu ,  Qing Qin ,  Zhiyong Zhan ,  Tiejun Dai

IPC: H04N25/77 ,  H04N25/78

Abstract: A pixel circuit includes a photodiode configured to photo generate image charge in response to incident light, a floating diffusion coupled to receive the image charge from the photodiode, a transfer transistor coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion, a reset transistor coupled between a variable voltage source and the floating diffusion, wherein the reset transistor is configured to be switched in response to a reset control signal, and a lateral overflow integration capacitor (LOFIC) coupled between the variable voltage source and the floating diffusion. The variable voltage source is configured to output a high-voltage level during a high conversion gain (HCG) reset signal readout and an HCG image signal readout, and a mid-voltage level during a LOFIC image signal readout and a LOFIC reset signal readout.

公开(公告)号：US12247873B1

公开(公告)日：2025-03-11

申请号：US18438791

申请日：2024-02-12

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Rui Wang ,  Tiejun Dai ,  Lindsay Alexander Grant ,  Keiji Mabuchi

IPC: G01J1/44

Abstract: A method of counting photons using a plurality of single photon avalanche diodes (SPADs), including initiating a detection phase, enabling each single photon avalanche diode (SPAD) of the plurality of SPADs for a period of time within the detection phase, accumulating a SPAD event from each SPAD of the plurality of SPADs, wherein each SPAD event corresponds to a detection of a single photon, determining a counter code at an end of the detection phase, where the counter code corresponds to accumulated SPAD events, and enabling one or more SPADs of the plurality of SPADs within an exposure phase based on the counter code, where the counter code is greater than an expected number of the SPAD events during the exposure phase, and where the expected number of SPAD events during the exposure phase is based on the counter code that is determined at the end of the detection phase.

公开(公告)号：US20220078360A1

公开(公告)日：2022-03-10

申请号：US17530316

申请日：2021-11-18

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Zhe Gao ,  Ling Fu ,  Yu-Shen Yang ,  Tiejun Dai

IPC: H04N5/345 ,  H04N5/369 ,  H04N5/378 ,  G11C27/02

Abstract: A switch driver circuit includes a plurality of pullup transistors. The plurality of pullup transistors includes a first pullup transistor coupled between a voltage supply and a first output node. A plurality of pulldown transistors includes a first pulldown transistor coupled between the first output node and a ground node. A slope control circuit is coupled to the ground node. A plurality of global connection switches includes a first global connection switch coupled between the first output node and the slope control circuit.