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公开(公告)号：US10396250B2
公开(公告)日：2019-08-27
申请号：US15870687
申请日：2018-01-12
Applicant: SEOUL VIOSYS CO., LTD.
Inventor： Chan Seob Shin , Myoung Hak Yang , Yeo Jin Yoon , Seom Geun Lee
Abstract: An exemplary light emitting diode is provided to comprise: a first semiconductor layer; a mesa disposed on the first semiconductor layer and including an active layer and a second semiconductor layer disposed on the active layer; a ZnO transparent electrode disposed on the mesa; a first electrode disposed on the first semiconductor layer; and a second electrode disposed on the ZnO transparent electrode, and including a second electrode pad and at least one second electrode extending portion extending from the second electrode pad. The second electrode extending portion contacts the ZnO transparent electrode. The ZnO transparent electrode includes a first region and a second region. The first region protrudes from the top surface of the ZnO transparent electrode, includes a plurality of projecting portions arranged in a predetermined pattern, the thickness of the first region greater than the thickness of the second region.
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公开(公告)号：US10283498B2
公开(公告)日：2019-05-07
申请号：US15894810
申请日：2018-02-12
Applicant: SEOUL VIOSYS CO., LTD.
Inventor： Seom Geun Lee , Yeo Jin Yoon , Jae Kwon Kim , So Ra Lee , Myoung Hak Yang
Abstract: Disclosed herein is a light emitting diode chip having ESD protection. An exemplary embodiment provides a flip-chip type light emitting diode chip, which includes a light emitting diode part aligned on a substrate, and a reverse-parallel diode part disposed on the substrate and connected to the light emitting diode part. Within the flip-chip type light emitting diode chip, the light emitting diode part is placed together with reverse-parallel diode part, thereby providing a light emitting diode chip exhibiting strong resistance to electrostatic discharge.
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公开(公告)号：US10193017B2
公开(公告)日：2019-01-29
申请号：US15905224
申请日：2018-02-26
Applicant: SEOUL VIOSYS CO., LTD.
Inventor： Mae Yi Kim , Jin Woong Lee , Yeo Jin Yoon , Seom Geun Lee , Yong Woo Ryu , Keum Ju Lee
Abstract: A light emitting diode includes a substrate that has an elongated rectangular shape in one direction; a light emitting structure positioned on the substrate and having an opening for exposing a first conductive semiconductor layer; a first electrode pad disposed to be closer to a first corner of the substrate; a second electrode pad disposed to be relatively closer to a second corner of the substrate opposing to the first corner; a first extension extending from the first electrode pad; and a second extension and a third extension extending from the second electrode pad to sides of the first extension, wherein an imaginary line connecting an end of the second extension and an end of the third extension is located between the first electrode pad and the first corner.
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公开(公告)号：US20180190864A1
公开(公告)日：2018-07-05
申请号：US15905224
申请日：2018-02-26
Applicant: SEOUL VIOSYS CO., LTD.
Inventor： Mae Yi Kim , Jin Woong Lee , Yeo Jin Yoon , Seom Geun Lee , Yong Woo Ryu , Keum Ju Lee
Abstract: A light emitting diode is provided to comprises: a substrate that has an elongated rectangular shape in one direction; a light emitting structure positioned on the substrate and having an opening for exposing a first conductive semiconductor layer; a first electrode pad disposed to be closer to a first corner of the substrate; a second electrode pad disposed to be relatively closer to a second corner of the substrate opposing to the first corner; a first extension extending from the first electrode pad; and a second extension and a third extension extending from the second electrode pad to sides of the first extension, wherein an imaginary line connecting an end of the second extension and an end of the third extension is located between the first electrode pad and the first corner.
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公开(公告)号：US09929314B2
公开(公告)日：2018-03-27
申请号：US15336510
申请日：2016-10-27
Applicant: Seoul Viosys Co., Ltd.
Inventor： Ye Seul Kim , Kyoung Wan Kim , Yeo Jin Yoon , Sang Hyun Oh , Keum Ju Lee , Jin Woong Lee , Da Yeon Jeong , Sang Won Woo
CPC classification number: H01L33/36 , H01L33/08 , H01L33/145 , H01L33/20 , H01L33/38 , H01L33/382 , H01L33/385 , H01L33/42 , H01L33/46 , H01L33/62
Abstract: Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area.
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Patent Agency Ranking
公开(公告)号：US09537045B2
公开(公告)日：2017-01-03
申请号：US14796421
申请日：2015-07-10
Applicant: Seoul Viosys Co., Ltd.
Inventor： Jeong Hun Heo , Yeo Jin Yoon , Joo Won Choi , Joon Hee Lee , Chang Yeon Kim , Su Young Lee
CPC classification number: H01L33/0075 , H01L27/156 , H01L33/62 , H01L2924/0002 , H01L2933/0033 , H01L2933/0066 , H01L2924/00
Abstract: A method of fabricating a semiconductor device includes forming an insulation pattern including a mask region and an open region on a gallium nitride substrate, growing gallium nitride semiconductor layers to cover the insulation pattern, and patterning the semiconductor layers to form a plurality of semiconductor stacks separated from each other, the plurality of semiconductor stacks being electrically isolated from the gallium nitride substrate by the insulation pattern.
Abstract translation: 制造半导体器件的方法包括在氮化镓衬底上形成包括掩模区域和开放区域的绝缘图案，生长氮化镓半导体层以覆盖绝缘图案，以及图案化半导体层以形成分离的多个半导体堆叠 所述多个半导体堆叠通过所述绝缘图案与所述氮化镓衬底电隔离。
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公开(公告)号：US20160380157A1
公开(公告)日：2016-12-29
申请号：US15263000
申请日：2016-09-12
Applicant: Seoul Viosys Co., Ltd.
Inventor： Duk Il SUH , Jae Moo Kim , Kyoung Wan Kim , Yeo Jin Yoon , Ye Seul Kim , Sang Hyun Oh , Jin Woong Lee
CPC classification number: H01L33/46 , H01L33/10 , H01L33/38 , H01L33/42 , H01L33/50 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
Abstract: A light-emitting diode (LED) includes a light-emitting structure arranged on a first surface of a substrate, the light-emitting structure including a first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer. The LED includes a first distributed Bragg reflector arranged on a second surface of the substrate opposite to the first surface, the first distributed Bragg reflector including a first laminate structure including alternately stacked SiO2 and Nb2O5 layers. The first laminate structure of the first distributed Bragg reflector is configured to reflect at least 90% of a first wavelength range of blue light emitted from the light emitting structure.
Abstract translation: 发光二极管（LED）包括布置在基板的第一表面上的发光结构，所述发光结构包括第一导电型半导体层; 第二导电型半导体层和介于第一导电型半导体层和第二导电型半导体层之间的有源层。 所述LED包括布置在所述基板的与所述第一表面相对的第二表面上的第一分布式布拉格反射器，所述第一分布布拉格反射器包括包括交替堆叠的SiO 2和Nb 2 O 5层的第一层压结构。 第一分布式布拉格反射器的第一层压结构被配置为反射从发光结构发射的蓝色光的第一波长范围的至少90％。
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公开(公告)号：US09520536B2
公开(公告)日：2016-12-13
申请号：US14984829
申请日：2015-12-30
Applicant: Seoul Viosys Co., Ltd.
Inventor： Ye Seul Kim , Kyoung Wan Kim , Yeo Jin Yoon , Sang Hyun Oh , Keum Ju Lee , Jin Woong Lee , Da Yeon Jeong , Sang Won Woo
CPC classification number: H01L33/36 , H01L33/08 , H01L33/145 , H01L33/20 , H01L33/38 , H01L33/382 , H01L33/385 , H01L33/42 , H01L33/46 , H01L33/62
Abstract: Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area.
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公开(公告)号：USD770401S1
公开(公告)日：2016-11-01
申请号：US29537274
申请日：2015-08-24
Applicant: Seoul Viosys Co., Ltd.
Designer： Mae Yi Kim , Seom Geun Lee , Yeo Jin Yoon
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公开(公告)号：US20160315226A1
公开(公告)日：2016-10-27
申请号：US15200633
申请日：2016-07-01
Applicant: Seoul Viosys Co., Ltd.
Inventor： Won Cheol Seo , Dae Sung Cho , Kyung Hee Ye , Kyoung Wan Kim , Yeo Jin Yoon
CPC classification number: H01L33/387 , H01L33/08 , H01L33/20 , H01L33/32 , H01L33/38 , H01L33/385 , H01L33/42 , H01L33/44 , H01L33/62 , H01L2924/0002 , H01L2933/0016 , H01L2924/00
Abstract: A substrate, a first conductive type semiconductor layer arranged on the substrate, a second conductive type semiconductor layer arranged on the first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad electrically connected to the first conductive type semiconductor layer, a second electrode pad arranged on the second conductive type semiconductor layer, an insulation layer disposed between the second conductive type semiconductor layer and the second electrode pad, and at least one upper extension electrically connected to the second electrode pad, the at least one upper extension being electrically connected to the second conductive type semiconductor layer.
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