公开(公告)号：US5702977A

公开(公告)日：1997-12-30

申请号：US810390

申请日：1997-03-03

申请人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

发明人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

IPC分类号： H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76224 ,  Y10S148/05

摘要： A method for forming within a trench within a substrate within an integrated circuit a planarized trench fill layer. There is first provided a substrate having a trench formed therein. There is formed upon the substrate at regions other than those within the trench a first integrated circuit layer which has a composition which inhibits formation upon the first integrated circuit layer of a trench fill layer which is subsequently formed upon the substrate and within the trench. There is also formed within the trench but not upon the substrate at regions other than those within the trench a second integrated circuit layer which has a composition which promotes formation within the trench of the trench fill layer which is subsequently formed upon the substrate and within the trench. Finally, there is formed upon the substrate and within the trench the trench fill layer. The trench fill layer is formed to a thickness over the trench such that when the trench fill layer is planarized through a chemical mechanical polish (CMP) planarizing method there is avoided formation of a dish within a planarized trench fill layer formed within the trench.

摘要翻译： 一种在集成电路内的衬底内的沟槽内形成平坦化沟槽填充层的方法。 首先提供其中形成有沟槽的衬底。 在沟槽内的不同于沟槽内的区域的基底上形成第一集成电路层，该第一集成电路层具有阻止在沟槽填充层的第一集成电路层上形成的组成，后者形成在衬底上并在沟槽内。 在沟槽内还形成在衬底上的不在沟槽内的衬底上的第二集成电路层，该第二集成电路层具有促进在沟槽填充层的沟槽内形成的组成，其随后形成在衬底上并在衬底内 沟。 最后，在衬底上并在沟槽内形成沟槽填充层。 沟槽填充层形成为在沟槽上方的厚度，使得当沟槽填充层通过化学机械抛光（CMP）平面化方法平坦化时，避免在形成在沟槽内的平坦化沟槽填充层内形成皿。

公开(公告)号：US20060211250A1

公开(公告)日：2006-09-21

申请号：US11082517

申请日：2005-03-17

申请人： Chuang-Ping Hou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Chu-Yun Fu ,  Tung-Ching Tseng

发明人： Chuang-Ping Hou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Chu-Yun Fu ,  Tung-Ching Tseng

IPC分类号： H01L21/461 ,  H01L21/302

CPC分类号： H01L21/31053

摘要： A method for forming a semiconductor device utilizing a chemical-mechanical polishing (CMP) process is provided. In one example, the method includes sequentially performing a first CMP process for removing a first portion of an oxide surface of a semiconductor device using a high selectivity slurry (HSS) and a first polish pad, interrupting the first CMP process, cleaning the semiconductor device and the first polish pad, and performing a second CMP process for removing a second portion of the oxide surface.

摘要翻译： 提供了一种利用化学机械抛光（CMP）工艺形成半导体器件的方法。 在一个示例中，该方法包括依次执行第一CMP处理，以使用高选择性浆料（HSS）和第一抛光垫去除半导体器件的氧化物表面的第一部分，中断第一CMP工艺，清洁半导体器件 和第一抛光垫，并且执行用于去除氧化物表面的第二部分的第二CMP工艺。

公开(公告)号：US06391777B1

公开(公告)日：2002-05-21

申请号：US09846481

申请日：2001-05-02

申请人： Ying-Ho Chen ,  Syun-Ming Jang

发明人： Ying-Ho Chen ,  Syun-Ming Jang

IPC分类号： H01L2144

CPC分类号： H01L21/7684 ,  H01L21/76877

摘要： A method is disclosed to improve the reliability of copper damascene interconnects. This is accomplished by performing a two-stage anneal of the copper metal; first, after the deposition of copper in the damascene, and then for the second time, after the removal of excess copper by chemical mechanical polishing.

摘要翻译： 公开了一种提高铜镶嵌互连的可靠性的方法。 这通过进行铜金属的两阶段退火来实现; 首先，在铜镶嵌后，然后再次通过化学机械抛光去除多余的铜。

公开(公告)号：US06197660B1

公开(公告)日：2001-03-06

申请号：US09301223

申请日：1999-04-29

申请人： Syun-Ming Jang ,  Ying-Ho Chen

发明人： Syun-Ming Jang ,  Ying-Ho Chen

IPC分类号： H01L2176

CPC分类号： H01L21/31111 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/76229

摘要： Shallow trench isolation in which trenches having varying dimensions have been formed in a hard surface such as silicon nitride can lead to dishing inside the larger trenches. To overcome this, the trenches were first over-filled with a layer of HDPCVD oxide followed by the deposition of a relatively soft dielectric layer, using a conformal deposition method. CMP was then used to remove both the added layer and most of the original HDPCVD oxide, a small thickness of the latter being left in place. Because of the earlier influence of the added layer the resulting surface was planar and a conventional wet or dry etch could be used to remove the remaining oxide, thereby exposing the top surface and fully filling the trenches without any dishing.

摘要翻译： 浅沟槽隔离，其中具有不同尺寸的沟槽已经形成在诸如氮化硅的硬表面中，可能导致较大沟槽内的凹陷。 为了克服这一点，首先用一层HDPCVD氧化物填充沟槽，然后使用共形沉积方法沉积相对软的介电层。 然后使用CMP去除添加的层和大部分原始HDPCVD氧化物，后者的小厚度留在原位。 由于添加层的早期影响，所得表面是平面的，并且可以使用常规的湿法或干法蚀刻来除去剩余的氧化物，从而暴露顶表面并完全填充沟槽而没有任何凹陷。

公开(公告)号：US6100163A

公开(公告)日：2000-08-08

申请号：US226277

申请日：1999-01-07

申请人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

发明人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

IPC分类号： H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76224

摘要： A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then oxidized thermally the silicon substrate to form within the trench a thermal silicon oxide trench liner layer. There is then treated the thermal silicon oxide trench liner layer by exposure to a plasma formed from a gas composition which upon plasma activation simultaneously supplies an active nitrogen containing species and an active oxygen containing species to form a plasma treated thermal silicon oxide trench liner layer. There is then formed upon the plasma treated thermal silicon oxide trench liner layer a conformal silicon oxide intermediate layer formed through a plasma enhanced chemical vapor deposition (PECVD) method employing a silane silicon source material. Finally, there is then formed upon the conformal silicon oxide intermediate layer a gap filling silicon oxide trench fill layer through an ozone assisted sub-atmospheric pressure thermal chemical vapor deposition (SACVD) method employing an ozone oxidant and a tetra-ethyl-ortho-silicate (TEOS) silicon source material.

摘要翻译： 一种用于在硅衬底内填充沟槽的方法。 首先提供其中形成有沟槽的硅衬底。 然后将硅衬底热氧化以在沟槽内形成热氧化硅沟槽衬垫层。 然后通过暴露于由气体组合物形成的等离子体来处理热氧化硅沟槽衬里层，其在等离子体激活时同时提供含活性氮的物质和含活性氧的物质以形成等离子体处理的热氧化硅沟槽衬里层。 然后在等离子体处理的热氧化硅沟槽衬垫层上形成通过使用硅烷硅源材料的等离子体增强化学气相沉积（PECVD）方法形成的共形氧化硅中间层。 最后，通过使用臭氧氧化剂和四乙基原硅酸盐的臭氧辅助亚大气压热化学气相沉积（SACVD）方法，在保形氧化硅中间层上形成填充氧化硅沟槽填充层的间隙 （TEOS）硅源材料。

公开(公告)号：US5858588A

公开(公告)日：1999-01-12

申请号：US850133

申请日：1997-05-01

申请人： Jui-Yu Chang ,  Chunshing Chen ,  Syun-Ming Jang ,  Ying-Ho Chen

发明人： Jui-Yu Chang ,  Chunshing Chen ,  Syun-Ming Jang ,  Ying-Ho Chen

IPC分类号： H01L23/544 ,  G03F9/00

CPC分类号： H01L23/544 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002

摘要： A mask pattern and method are described for the recovery of alignment marks on an integrated circuit wafer without the use of additional masks. The mask pattern and method provide means to recover the alignment marks after forming a metal layer on a planarized inter-level dielectric layer. The pattern which conventional methods have placed on a separate mask is formed in the end regions of a mask used for forming a pattern on the active region of the wafer. In order to fit the pattern in the end regions of the mask the pattern is divided into two parts. When the pattern is used to expose a layer of photoresist two exposure steps are used.

摘要翻译： 描述了用于在集成电路晶片上恢复对准标记的掩模图案和方法，而不使用附加掩模。 掩模图案和方法提供了在平坦化的层间电介质层上形成金属层之后恢复对准标记的装置。 在用于在晶片的有源区上形成图案的掩模的端部区域中形成常规方法已经放置在单独的掩模上的图案。 为了将图案装配在掩模的端部区域中，图案被分为两部分。 当使用图案曝光一层光致抗蚀剂时，使用两个曝光步骤。

公开(公告)号：US5817567A

公开(公告)日：1998-10-06

申请号：US826710

申请日：1997-04-07

申请人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

发明人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

IPC分类号： H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76224 ,  Y10S148/05

摘要： An improved method for implementing shallow trench isolation in integrated circuits is described. The method begins with the formation of trenches, through patterning and etching. These trenches are then filled with a conformal layer of silicon oxide. This is followed by overcoating with a layer of a hard material such as silicon nitride or boron nitride. Next, chemical-mechanical polishing is used to remove the hard layer everywhere except where it has filled the depressions that overlie the trenches. Then, a non-selective etch is used to remove the remaining hard layer material as well as some of the silicon oxide, so that a planar surface is maintained. Finally, chemical-mechanical polishing is used a second time to remove excess silicon oxide from above the trenches' surface.

摘要翻译： 描述了一种用于在集成电路中实现浅沟槽隔离的改进方法。 该方法开始于通过图案化和蚀刻形成沟槽。 然后用保形层的氧化硅填充这些沟槽。 随后用一层硬质材料如氮化硅或氮化硼涂覆。 接下来，使用化学机械抛光来去除硬质层，除了填充了覆盖在沟槽上的凹陷之外。 然后，使用非选择性蚀刻来除去剩余的硬质层材料以​​及一些氧化硅，从而保持平坦的表面。 最后，第二次使用化学机械抛光从沟槽表面上方除去过量的氧化硅。

公开(公告)号：US5741740A

公开(公告)日：1998-04-21

申请号：US873836

申请日：1997-06-12

申请人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

发明人： Syun-Ming Jang ,  Ying-Ho Chen ,  Chen-Hua Yu

IPC分类号： H01L21/316 ,  H01L21/762 ,  H01L21/76

CPC分类号： H01L21/02164 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31612 ,  H01L21/76224 ,  Y10S148/05

摘要： A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then oxidized thermally the silicon substrate to form within the trench a thermal silicon oxide trench liner layer. There is then formed upon the thermal silicon oxide trench liner layer a conformal silicon oxide intermediate layer formed through a plasma enhanced chemical vapor deposition (PECVD) method employing a silane silicon source material. Finally, there is then formed upon the conformal silicon oxide intermediate layer a gap filling silicon oxide trench fill layer through an ozone assisted sub-atmospheric pressure thermal chemical vapor deposition (SACVD) method employing an ozone oxidant and a tetra-ethyl-ortho-silicate (TEOS) silicon source material. To provide improved properties of the gap filling silicon oxide trench fill layer the thermal silicon oxide trench liner layer may be treated with a nitrogen containing plasma prior to forming the conformal silicon oxide intermediate layer thereupon.

摘要翻译： 一种用于在硅衬底内填充沟槽的方法。 首先提供其中形成有沟槽的硅衬底。 然后将硅衬底热氧化以在沟槽内形成热氧化硅沟槽衬垫层。 然后在热氧化硅沟槽衬垫层上形成通过使用硅烷硅源材料的等离子体增强化学气相沉积（PECVD）方法形成的共形氧化硅中间层。 最后，通过使用臭氧氧化剂和四乙基原硅酸盐的臭氧辅助亚大气压热化学气相沉积（SACVD）方法，在保形氧化硅中间层上形成填充氧化硅沟槽填充层的间隙 （TEOS）硅源材料。 为了提供间隙填充氧化硅沟槽填充层的改进性能，可以在形成其之间的共形氧化硅中间层之前用含氮等离子体处理热氧化硅沟槽衬里层。

公开(公告)号：US07297632B2

公开(公告)日：2007-11-20

申请号：US11082517

申请日：2005-03-17

申请人： Chuang-Ping Hou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Chu-Yun Fu ,  Tung-Ching Tseng

发明人： Chuang-Ping Hou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Chu-Yun Fu ,  Tung-Ching Tseng

IPC分类号： H01L21/311

CPC分类号： H01L21/31053

摘要： A method for forming a semiconductor device utilizing a chemical-mechanical polishing (CMP) process is provided. In one example, the method includes sequentially performing a first CMP process for removing a first portion of an oxide surface of a semiconductor device using a high selectivity slurry (HSS) and a first polish pad, interrupting the first CMP process, cleaning the semiconductor device and the first polish pad, and performing a second CMP process for removing a second portion of the oxide surface.

摘要翻译： 提供了一种利用化学机械抛光（CMP）工艺形成半导体器件的方法。 在一个示例中，该方法包括依次执行第一CMP处理，以使用高选择性浆料（HSS）和第一抛光垫去除半导体器件的氧化物表面的第一部分，中断第一CMP工艺，清洁半导体器件 和第一抛光垫，并且执行用于去除氧化物表面的第二部分的第二CMP工艺。

公开(公告)号：US06924238B2

公开(公告)日：2005-08-02

申请号：US10455037

申请日：2003-06-05

申请人： Tzu-Jen Chou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Shen-Nan Lee

发明人： Tzu-Jen Chou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Shen-Nan Lee

IPC分类号： H01L21/3105 ,  H01L21/311 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768

CPC分类号： H01L21/31053 ,  H01L21/31056 ,  H01L21/31116 ,  H01L21/76835 ,  H01L21/7684

摘要： A new method and structure is provided for the polishing of the surface of a layer of low-k dielectric material. Low-k dielectric material of low density and relatively high porosity is combined with low-k dielectric material of high density and low porosity whereby the latter high density layer is, prior to polishing of the combined layers, deposited over the former low density layer. Polishing of the combined layers removes flaking of the polished low-k layers of dielectric. This method can further be extended by forming conductive interconnects through the layers of dielectric, prior to the layer of dielectric.

摘要翻译： 提供了一种用于抛光低k电介质材料层的表面的新方法和结构。 低密度和相对高孔隙率的低k电介质材料与高密度和低孔隙率的低k电介质材料组合，由此后者的高密度层在组合层的抛光之前沉积在前者的低密度层上。 组合层的抛光消除抛光的低k层电介质的剥落。 在电介质层之前，可以通过在电介质层之间形成导电互连来进一步延长该方法。