INFORMATION PROCESSING PROGRAM, INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING METHOD
    32.
    发明申请
    INFORMATION PROCESSING PROGRAM, INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING METHOD 有权
    信息处理程序,信息处理设备和信息处理方法

    公开(公告)号:US20110074546A1

    公开(公告)日:2011-03-31

    申请号:US12890813

    申请日:2010-09-27

    IPC分类号: G08B5/22

    摘要: A card (which is displayed on a screen and is thus operated, and has a single function) is output to a display of an information processing device through a shell (an OS of the card and a seal), and the seal (a display associated with an action such as an output) can be put on a part of the card. The shell put on the card is written to a seal DB and the seal put on the card is displayed in accordance with information of the seal DB when the card is to be output. The seal corresponds to a seal application depending on each type. When an object of the card having the seal put thereon is coincident with a predetermined condition, the corresponding seal application is activated by the shell so that a predetermined action such as a notice or an output of a ring tone is executed.

    摘要翻译: 通过外壳(卡的OS和密封件)将卡(其在屏幕上显示并且被操作并具有单个功能)输出到信息处理设备的显示器,并且密封件(显示器 与诸如输出的动作相关联)可以放在卡的一部分上。 放在卡上的外壳被写入密封DB,并且当卡被输出时,根据密封DB的信息显示放置在卡上的密封件。 密封对应于根据每种类型的密封应用。 当具有放置在其上的密封卡的物体与预定条件一致时,相应的密封应用由外壳启动,从而执行诸如铃声的通知或输出之类的预定动作。

    SEMICONDUCTOR DEVICE
    33.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:US20080239601A1

    公开(公告)日:2008-10-02

    申请号:US12059681

    申请日:2008-03-31

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0285 H03F1/523

    摘要: A semiconductor device includes a pad; an internal circuit; a protection FET that has a drain connected to the pad, and a source connected to a reference potential; a first resistive element that is connected between the drain of the protection FET and the internal circuit, and has a larger resistance value than the value of the series resistance between the drain of the protection FET and the pad; a capacitive element that is connected between the pad and the gate of the protection FET; and a second resistive element that is connected between the gate of the protection FET and the source of the protection FET.

    摘要翻译: 半导体器件包括衬垫; 内部电路; 保护FET,其具有连接到焊盘的漏极,以及连接到参考电位的源极; 连接在保护FET的漏极和内部电路之间的第一电阻元件,并且具有比保护FET的漏极与焊盘之间的串联电阻值更大的电阻值; 电容元件,其连接在所述焊盘和所述保护FET的栅极之间; 以及连接在保护FET的栅极和保护FET的源极之间的第二电阻元件。

    Production method for complex bearing
    34.
    发明申请
    Production method for complex bearing 有权
    复合轴承的生产方法

    公开(公告)号:US20070271789A1

    公开(公告)日:2007-11-29

    申请号:US11802394

    申请日:2007-05-22

    申请人: Makoto Kondo

    发明人: Makoto Kondo

    IPC分类号: B23P15/14 B21K1/30

    摘要: A production method for complex bearings includes: preparing an outer member and a cylindrical sintered bearing member. The outer member includes a fitting hole having: an almost circular cross section; an inner peripheral surface; and a surface roughness of the inner peripheral surface which is 3.2 to 100 μm at a maximal height. The sintered bearing member includes: an outer diameter allowing clearance fit of the sintered bearing member into the fitting hole of the outer member. The production method further includes: inserting the sintered bearing member into the fitting hole of the outer member and inserting a columnar core rod into an inner peripheral surface of the sintered bearing member; and compressing the sintered bearing member in an axial direction. By the compressing, an expanding peripheral surface of the sintered bearing member is pressed onto the inner peripheral surface of the fitting hole of the outer member, and the outer member and the sintered bearing member are thereby integrated with each other, and the inner peripheral surface of the sintered bearing member is pressed onto the core rod, and a hole size of the fitting hole of the sintered bearing member is thereby adjusted.

    摘要翻译: 复合轴承的制造方法包括:制备外部构件和圆柱形烧结轴承构件。 外部构件包括具有几乎圆形横截面的装配孔; 内周面; 内径面的表面粗糙度在最大高度为3.2〜100μm。 烧结的轴承构件包括:允许烧结的轴承构件间隙配合到外部构件的装配孔中的外径。 该制造方法还包括:将烧结的轴承部件插入到外部部件的嵌合孔内,将柱状芯棒插入到烧结的轴承部件的内周面上; 并且沿轴向压缩烧结的轴承部件。 通过压缩,将烧结的轴承部件的膨胀的周面压在外部部件的嵌合孔的内周面上,由此使外部部件和烧结的轴承部件一体化,并且内周面 烧结的支承构件被压在芯棒上,从而调节烧结的轴承构件的装配孔的孔尺寸。

    Movement method, exposure method and exposure apparatus, and device manufacturing method
    35.
    发明申请
    Movement method, exposure method and exposure apparatus, and device manufacturing method 有权
    移动方法,曝光方法和曝光装置以及装置制造方法

    公开(公告)号:US20050270507A1

    公开(公告)日:2005-12-08

    申请号:US11203228

    申请日:2005-08-15

    申请人: Makoto Kondo

    发明人: Makoto Kondo

    IPC分类号: G03F7/20 G03B27/42

    CPC分类号: G03F7/70725

    摘要: When a wafer is moved from a first position to a second position along a path where alignment marks pass through an alignment detection system, wafer table is to be moved along a path whose standstill time of a Y linear motor, which drives the wafer table in the Y-axis direction, and an X linear motor, which drives the wafer table in the X-axis direction orthogonal to the Y-axis direction, is minimum. In this case, the time for both linear motors to drive the wafer table simultaneously is increased as much as possible, and during such simultaneous drive, the movement distance of the wafer can be increased compared with the case when the wafer table is driven using only one of the linear motors. As a result, the time required to move wafer from the first position to the second position can be reduced.

    摘要翻译: 当晶片沿着对准标记通过对准检测系统的路径从第一位置移动到第二位置时,晶片台将沿着驱动晶片台的Y线性电动机的停止时间的路径移动 Y轴方向和X轴方向驱动晶片台的X线性电动机是最小的。 在这种情况下,两个线性电动机同时驱动晶片台的时间增加,并且在这种同时驱动期间,与仅使用晶片台的情况相比,晶片的移动距离可以增加 其中一个线性电机。 结果,可以减少将晶片从第一位置移动到第二位置所需的时间。

    Substrate holding unit, exposure apparatus, and device manufacturing method
    37.
    发明授权
    Substrate holding unit, exposure apparatus, and device manufacturing method 有权
    基板保持单元,曝光装置和装置制造方法

    公开(公告)号:US06875987B2

    公开(公告)日:2005-04-05

    申请号:US10293321

    申请日:2002-11-14

    申请人: Makoto Kondo

    发明人: Makoto Kondo

    CPC分类号: G03F7/707

    摘要: On an upper surface of a main body configuring a holder main body, a plurality of pins and a rim portion which upper end surface is set at almost the same height with a surface formed by the tip portions of the pins are provided. In addition, the main body has a honeycomb structure. Also, through holes formed in the honeycomb core are arranged corresponding to the arrangement of the plurality of pins. And, by a vacuum chucking mechanism, a wafer is vacuum chucked with respect to the tip portions of the plurality of pins and the upper end surface of the rim portion. In addition, among the plurality of pins arranged, the pins arranged closed to the rim portion are spaced more densely than the pins arranged elsewhere on the main body.

    摘要翻译: 在构成保持器主体的主体的上表面上设置有多个销和边缘部,该上表面与由销的前端部形成的表面设定在几乎相同的高度。 此外,主体具有蜂窝结构。 此外,形成在蜂窝芯中的通孔对应于多个销的布置而布置。 并且,通过真空夹紧机构,将晶片相对于多个销的前端部和边缘部的上端面真空夹持。 此外,在布置的多个销中,布置成与边缘部分相邻的引脚相比于主体上布置在别处的引脚更密集地间隔开。

    Drive circuit for semiconductor device
    38.
    发明申请
    Drive circuit for semiconductor device 失效
    半导体器件驱动电路

    公开(公告)号:US20050052217A1

    公开(公告)日:2005-03-10

    申请号:US10777748

    申请日:2004-02-13

    IPC分类号: H02M1/08 H03K17/16 H03K17/687

    摘要: A drive circuit for a semiconductor device comprises an insulated gate transistor (1), a driver (2) for generating a gate voltage having a plurality of voltage levels and applying the generated gate voltage to the transistor (1), and a timing controller (3) for controlling timing of application of the gate voltage with difference voltage levels on the basis of a signal voltage. The driver (2) generates a gate voltage (Va) lower than a threshold voltage of the transistor (1), and a gate voltage (+15 V) as a specified voltage for driving the transistor (1). The timing controller (3) so controls the driver (2) that application of the gate voltage (Va) precedes application of the specified voltage (+15V).

    摘要翻译: 一种用于半导体器件的驱动电路包括绝缘栅极晶体管(1),用于产生具有多个电压电平的栅极电压并将产生的栅极电压施加到晶体管(1)的驱动器(2)和定时控制器 3)用于基于信号电压来控制具有不同电压电平的栅极电压的施加时序。 驱动器(2)产生低于晶体管(1)的阈值电压的栅极电压(Va)和作为用于驱动晶体管(1)的指定电压的栅极电压(+ 15V)。 定时控制器(3)因此控制驱动器(2)施加栅极电压(Va)之前施加指定电压(+ 15V)。

    Nickel electroplating solution
    39.
    发明授权
    Nickel electroplating solution 失效
    镍电镀液

    公开(公告)号:US06852211B2

    公开(公告)日:2005-02-08

    申请号:US10330419

    申请日:2002-12-27

    IPC分类号: C25D3/12 C25D5/54 C23C16/00

    CPC分类号: C25D3/12 C25D5/54

    摘要: Nickel plating baths that efficiently deposit layers of nickel on only the parts to be plated without corroding electronic parts that are ceramic composites or ceramic parts containing transition metal oxides are provided. Such nickel plating baths contain at least two chelating agents selected from amino polycarboxylic acids, polycarboxylic acids, and polyphosphonic acids, and have a pH in the range of 5 to 7, and a ratio of nickel ions to chloride ions of greater than 1.

    摘要翻译: 提供了镍电镀浴,其仅在被电镀部分上有效地沉积镍层,而不腐蚀作为陶瓷复合材料的电子部件或含有过渡金属氧化物的陶瓷部件。 这种镀镍浴含有选自氨基多元羧酸,多元羧酸和多聚膦酸中的至少两种螯合剂,其pH值在5〜7范围内,镍离子与氯离子的比例大于1。

    Substrate holding apparatus and exposure apparatus including substrate holding apparatus
    40.
    发明授权
    Substrate holding apparatus and exposure apparatus including substrate holding apparatus 失效
    基板保持装置和包括基板保持装置的曝光装置

    公开(公告)号:US06710857B2

    公开(公告)日:2004-03-23

    申请号:US09803920

    申请日:2001-03-13

    申请人: Makoto Kondo

    发明人: Makoto Kondo

    IPC分类号: G03B2758

    CPC分类号: G03F7/707

    摘要: A substrate holding apparatus which holds a flat-like substrate comprises a base member and a plurality of projecting support members disposed on the base member such that the supporting members are arranged like a triangular lattice and distal end portions thereof are positioned on substantially the same plane. The substrate is to be placed on the plurality of support members.

    摘要翻译: 保持扁平状基板的基板保持装置包括基部构件和设置在基部构件上的多个突出支撑构件,使得支撑构件布置成三角形格子,并且其顶端部分位于基本相同的平面上 。 衬底将被放置在多个支撑构件上。