Semiconductor device having multilevel copper wiring layers and its manufacture method
    31.
    发明授权
    Semiconductor device having multilevel copper wiring layers and its manufacture method 有权
    具有多层铜布线层的半导体器件及其制造方法

    公开(公告)号:US08188602B2

    公开(公告)日:2012-05-29

    申请号:US10350219

    申请日:2003-01-24

    IPC分类号: H01L51/46

    摘要: To provide a semiconductor device having copper wiring layers and organic insulating resin layers with less separation and its manufacture method.A semiconductor device has: a semiconductor substrate formed with a number of semiconductor elements; a first interlayer insulating film formed above the semiconductor substrate and having a first wiring recess; a first copper wiring embedded in the first wiring recess; a second interlayer insulating film having a second wiring recess, the second interlayer insulating film including a copper diffusion preventing layer formed on the first copper wiring and the first interlayer insulating film, an oxide film formed on the copper diffusion preventing layer, and an organic insulating resin layer formed on the oxide film; and a second copper wiring embedded in the second wiring recess.

    摘要翻译: 提供具有铜布线层的半导体器件和具有较小分离性的有机绝缘树脂层及其制造方法。 半导体器件具有:形成有多个半导体元件的半导体衬底; 形成在所述半导体衬底上并具有第一布线凹槽的第一层间绝缘膜; 嵌入在所述第一布线槽中的第一铜布线; 具有第二布线凹槽的第二层间绝缘膜,所述第二层间绝缘膜包括形成在所述第一铜布线和所述第一层间绝缘膜上的铜扩散防止层,形成在所述铜扩散防止层上的氧化膜,以及有机隔离层 在氧化膜上形成树脂层; 以及嵌入在第二布线凹槽中的第二铜布线。

    Semiconductor device
    34.
    发明申请
    Semiconductor device 审中-公开
    半导体器件

    公开(公告)号:US20060087041A1

    公开(公告)日:2006-04-27

    申请号:US11256681

    申请日:2005-10-24

    IPC分类号: H01L23/48

    摘要: A semiconductor device is disclosed that includes a substrate, a first wiring structure arranged on the substrate which first wiring structure includes a first insulating layer and a first wiring layer arranged within the first insulating layer, a second wiring structure arranged on the first wiring structure which second wiring structure includes a second insulating layer including a shock absorbing layer made of an insulating film and a second wiring layer arranged within the second insulating layer, and a third wiring structure arranged on the second wiring structure which third wiring structure includes a third insulating layer and a third wiring layer arranged within the third insulating layer. The fracture toughness value of the shock absorbing layer is arranged to be greater than the fracture toughness value of the first insulating film and the fracture toughness value of the third insulating film.

    摘要翻译: 公开了一种半导体器件,其包括基板,布置在基板上的第一布线结构,第一布线结构包括第一绝缘层和布置在第一绝缘层内的第一布线层,布置在第一布线结构上的第二布线结构, 第二布线结构包括:第二绝缘层,包括由绝缘膜制成的减震层和布置在第二绝缘层内的第二布线层;以及布置在第二布线结构上的第三布线结构,第三布线结构包括第三绝缘层 以及布置在所述第三绝缘层内的第三布线层。 冲击吸收层的断裂韧性值被设置为大于第一绝缘膜的断裂韧性值和第三绝缘膜的断裂韧性值。