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公开(公告)号：US06751125B2
公开(公告)日：2004-06-15
申请号：US10287328
申请日：2002-11-04
IPC分类号： G11C1604
CPC分类号： G11C16/3427 , G11C16/26 , G11C16/3418
摘要： A technique for reducing the read gate voltage in a memory array including memory cells having a transistor for storing charge indicative of the value stored in the cell. In one example, a voltage greater than the substrate voltage is applied to the sources of the transistors of the memory cells of the array to increase the threshold voltage of a transistor due the body effect. The read gate voltage is greater than the source voltage which is greater than the substrate voltage. A non read voltage of less than the source voltage is applied to the gates of the transistors of the unselected rows to reduce leakage current. With this embodiment, the threshold voltages of transistors having an erased state can be less than 0V. With some embodiments, the read disturb caused by a gate voltage can be reduced due to the reduction in the gate voltage. In other examples, a negative voltage is applied to the gates of unselected rows to prevent leakage current. Accordingly, the voltage thresholds of transistors having an erased state can be reduced, wherein the read gate voltage can be reduced as well.
摘要翻译： 一种用于降低存储器阵列中的读栅极电压的技术，包括具有用于存储指示存储在单元中的值的电荷的晶体管的存储单元。 在一个示例中，大于衬底电压的电压被施加到阵列的存储器单元的晶体管的源极，以增加由于体效应引起的晶体管的阈值电压。 读栅极电压大于比基板电压大的源极电压。 小于源极电压的非读取电压被施加到未选择行的晶体管的栅极以减少泄漏电流。 利用本实施例，具有擦除状态的晶体管的阈值电压可以小于0V。 利用一些实施例，由于栅极电压的降低可以降低由栅极电压引起的读取干扰。 在其他示例中，负电压施加到未选择的行的栅极以防止漏电流。 因此，可以减少具有擦除状态的晶体管的电压阈值，其中读取栅极电压也可以减小。
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公开(公告)号：US5356484A
公开(公告)日：1994-10-18
申请号：US860677
申请日：1992-03-30
申请人： Joseph C. Yater , Jane A. Yater , Joan E. Yater
发明人： Joseph C. Yater , Jane A. Yater , Joan E. Yater
CPC分类号： H01L35/00 , H01L35/32 , F25B2321/003
摘要： A reversible thermoelectric converter includes first and second quantum well diodes and an electrical connection between the first and second quantum well diodes without a thermal barrier between them. Each quantum well diode includes first and second electrodes wherein electrons are quantized in discrete energy levels and a dielectric layer providing a potential barrier between the first and second electrodes. When electrons in the first quantum well diode have a higher temperature than the electrons in the second quantum well diode, electric voltage fluctuations resulting from transitions of the electrons between the energy levels in the first quantum well diode are coupled from the first quantum well diode to the second quantum well diode. The reversible thermoelectric converter can be operated for power conversion of thermal energy to electric energy, as a heat pump or a refrigerator, or as an amplifier. A planar array of reversible thermoelectric converter elements provides a desired output voltage and current.
摘要翻译： 可逆热电转换器包括第一和第二量子阱二极管以及第一和第二量子阱二极管之间的电连接，而在它们之间没有热障碍。 每个量子阱二极管包括第一和第二电极，其中电子以离散能量级量化，以及在第一和第二电极之间提供势垒的电介质层。 当第一量子阱二极管中的电子具有比第二量子阱二极管中的电子更高的温度时，由第一量子阱二极管中的能级之间的电子跃迁引起的电压波动从第一量子阱二极管耦合到 第二量子阱二极管。 可逆式热电转换器可用于将热能转换为电能，作为热泵或冰箱或作为放大器。 可逆热电转换器元件的平面阵列提供期望的输出电压和电流。
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公开(公告)号：US07471560B2
公开(公告)日：2008-12-30
申请号：US11834391
申请日：2007-08-06
IPC分类号： G11C11/34
CPC分类号： G11C16/10
摘要： An electronic circuit can include a first memory cell and a second memory cell. In one embodiment, source/drain regions of the first and second memory cells can be electrically connected to each other. The source/drain regions may electrically float regardless of direction in which carriers flow through channel regions of the memory cells. In another embodiment, the first memory cell can be electrically connected to a first gate line, and the second memory cell can be electrically connected to a greater number of gate lines as compared to the first memory cell. In another aspect, the first and second memory cells are connected to the same bit line. Such bit line can electrically float when programming or reading the first memory cell or the second memory cell or any combination thereof.
摘要翻译： 电子电路可以包括第一存储单元和第二存储单元。 在一个实施例中，第一和第二存储器单元的源极/漏极区域可彼此电连接。 源极/漏极区域可以电浮动，而不管载流子流过存储器单元的沟道区域的方向如何。 在另一个实施例中，与第一存储器单元相比，第一存储单元可以电连接到第一栅极线，并且第二存储单元可以电连接到更多数量的栅极线。 在另一方面，第一和第二存储器单元连接到相同的位线。 当编程或读取第一存储器单元或第二存储单元或其任何组合时，这种位线可以电浮动。
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公开(公告)号：US07064030B2
公开(公告)日：2006-06-20
申请号：US10961014
申请日：2004-10-08
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521
摘要： Forming a non-volatile memory device includes providing a semiconductor substrate, forming a masking layer having a first plurality of openings overlying the semiconductor substrate, forming diffusion regions in the semiconductor substrate at locations determined by the masking layer, forming a dielectric within the first plurality of openings, removing the masking layer to form a second plurality of openings, forming sacrificial spacers along edges of the second plurality of openings and adjacent to the dielectric, forming a separating dielectric to separate the sacrificial spacers within each of the second plurality of openings, forming a sacrificial protection layer overlying the separating dielectric, removing the sacrificial spacers, removing the sacrificial protection layer, forming at least two memory storage regions within each of the second plurality of openings, and forming a common control electrode overlying the at least two memory storage regions. This device may be used, for example, in a VGA memory array.
摘要翻译： 形成非易失性存储器件包括提供半导体衬底，形成具有覆盖半导体衬底的第一多个开口的掩模层，在由掩模层确定的位置处在半导体衬底中形成扩散区，在第一多个 的开口，去除所述掩模层以形成第二多个开口，沿着所述第二多个开口的边缘并且邻近所述电介质形成牺牲隔离物，形成分离电介质以在所述第二多个开口的每一个内分离所述牺牲隔离物， 形成覆盖所述分离电介质的牺牲保护层，去除所述牺牲隔离物，去除所述牺牲保护层，在所述第二多个开口的每一个内形成至少两个存储器存储区域，以及形成覆盖所述至少两个存储器存储器 地区。 该装置可以用于例如VGA存储器阵列中。
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公开(公告)号：US06964902B2
公开(公告)日：2005-11-15
申请号：US10787510
申请日：2004-02-26
申请人： Robert F. Steimle , Jane A. Yater , Gowrishankar L. Chindalore , Craig T. Swift , Steven G. H. Anderson , Ramachandran Muralidhar
发明人： Robert F. Steimle , Jane A. Yater , Gowrishankar L. Chindalore , Craig T. Swift , Steven G. H. Anderson , Ramachandran Muralidhar
IPC分类号： H01L21/28 , H01L21/3213 , H01L21/336 , H01L21/44 , H01L21/8247 , H01L27/105 , H01L29/792
CPC分类号： H01L21/32135 , B82Y10/00 , H01L21/28273 , H01L21/32134 , H01L27/105 , H01L27/11521 , H01L27/11526
摘要： Nanoclusters are blanket deposited on an integrated circuit and then removed from regions where the nanoclusters are not desired. A sacrificial layer is formed in those regions where the nanoclusters are not desired prior to the blanket deposition. The nanoclusters and the sacrificial layer are then removed. In one form, the sacrificial layer includes a deposited nitride containing or oxide containing layer. Alternatively, the sacrificial layer includes at least one of a pad oxide or a pad nitride layer previously used to form isolation regions in the substrate. Nanocluster devices and non-nanocluster devices may then be integrated onto the same integrated circuit. The use of a sacrificial layer protects underlying layers thereby preventing the degradation of performance of the subsequently formed non-nanocluster devices.
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公开(公告)号：US5889287A
公开(公告)日：1999-03-30
申请号：US429598
申请日：1995-04-27
申请人： Joseph C. Yater , Jane A. Yater , Joan E. Yater
发明人： Joseph C. Yater , Jane A. Yater , Joan E. Yater
CPC分类号： H01L35/00 , H01L35/32 , F25B2321/003
摘要： A reversible thermoelectric converter includes first and second quantum well diodes and an electrical connection between the first and second quantum well diodes without a thermal barrier between them. Each quantum well diode includes first and second electrodes wherein electrons are quantized in discrete energy levels and a dielectric layer providing a potential barrier between the first and second electrodes. When electrons in the first quantum well diode have a higher temperature than the electrons in the second quantum well diode, electric voltage fluctuations resulting from transitions of the electrons between the energy levels in the first quantum well diode are coupled from the first quantum well diode to the second quantum well diode. The reversible thermoelectric converter can be operated for power conversion of thermal energy to electric energy, as a heat pump or a refrigerator, or as an amplifier. A planar array of reversible thermoelectric converter elements provides a desired output voltage and current.
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