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公开(公告)号:US08816415B2
公开(公告)日:2014-08-26
申请号:US13742747
申请日:2013-01-16
Inventor: Che-Min Lin , Volume Chien , Chih-Kang Chao , Chi-Cherng Jeng , Pin Chia Su , Chih-Mu Huang
IPC: H01L31/062
CPC classification number: H01L31/02327 , H01L27/14629 , H01L31/0232 , H01L31/10 , H01L31/115 , H01L31/18
Abstract: A photodiode structure includes a photodiode and a concave reflector disposed below the photodiode. The concave reflector is arranged to reflect incident light from above back toward the photodiode.
Abstract translation: 光电二极管结构包括设置在光电二极管下方的光电二极管和凹面反射器。 凹面反射器被布置成将来自上方的入射光反射到光电二极管。
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32.
公开(公告)号:US20220302187A1
公开(公告)日:2022-09-22
申请号:US17833217
申请日:2022-06-06
Inventor: Chiu-Jung Chen , Chun-Hao Chou , Hsin-Chi Chen , Kuo-Cheng Lee , Volume Chien , Yun-Wei Cheng
IPC: H01L27/146
Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
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公开(公告)号:US11152414B2
公开(公告)日:2021-10-19
申请号:US16259859
申请日:2019-01-28
Inventor: Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Chun-Chieh Chuang , Volume Chien
IPC: H01L27/146 , H01L21/762 , H01L21/8238
Abstract: An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth greater than the first depth. The pixel region includes only NMOS devices and the periphery region includes both NMOS and PMOS devices.
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34.
公开(公告)号:US11063077B2
公开(公告)日:2021-07-13
申请号:US16726687
申请日:2019-12-24
Inventor: Zen-Fong Huang , Volume Chien , Su-Hua Chang
IPC: H01L27/146
Abstract: A semiconductor structure includes a substrate, a barrier layer disposed over the substrate, a grid disposed over the barrier layer, and a first color filter disposed over the barrier layer. The semiconductor structure also includes a second color filter disposed over the substrate and laterally surrounded by and contacting the grid. The semiconductor structure further includes a dielectric layer disposed between the barrier layer and the substrate. The barrier layer includes an upper surface overlapping the grid and the first color filter and a bottom surface substantially level with a bottom surface of the second color filter. The dielectric layer includes a first portion overlapping a bottom surface of the first color filter and a second portion overlapping a bottom surface of the second color filter, wherein non-visible light is allowed to pass from the second color filter to the substrate through the second portion of the dielectric layer.
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公开(公告)号:US10535694B2
公开(公告)日:2020-01-14
申请号:US16459181
申请日:2019-07-01
Inventor: Volume Chien , Yun-Wei Cheng , I-I Cheng , Shiu-Ko JangJian , Chi-Cherng Jeng , Chih-Mu Huang
IPC: H01L31/00 , H01L27/146 , H01L23/31 , H01L23/58 , H01L23/00
Abstract: Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.
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公开(公告)号:US10192918B2
公开(公告)日:2019-01-29
申请号:US14886290
申请日:2015-10-19
Inventor: Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Chun-Chieh Chuang , Volume Chien
IPC: H01L27/146 , H01L21/762 , H01L21/8238
Abstract: An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth. The second depth is greater than the first depth.
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37.
公开(公告)号:US20180033820A1
公开(公告)日:2018-02-01
申请号:US15727716
申请日:2017-10-09
Inventor: Chiu-Jung Chen , Chun-Hao Chou , Hsin-Chi Chen , Kuo-Cheng Lee , Volume Chien , Yung-Lung Hsu , Yun-Wei Cheng
IPC: H01L27/146
CPC classification number: H01L27/1464 , H01L27/1462 , H01L27/14621 , H01L27/14623 , H01L27/1463 , H01L27/14632 , H01L27/14636 , H01L27/14645 , H01L27/14685 , H01L27/14687 , H01L27/14689 , H01L27/14698 , H01L2224/48463
Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
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公开(公告)号:US09812492B2
公开(公告)日:2017-11-07
申请号:US14685123
申请日:2015-04-13
Inventor: Shiu-Ko JangJian , Chi-Cherng Jeng , Volume Chien , Ying-Lang Wang
IPC: H01L27/146 , H01L31/18
CPC classification number: H01L27/14687 , H01L27/1462 , H01L27/14623 , H01L27/1463 , H01L27/1464 , H01L27/14643 , H01L27/14685 , H01L31/18
Abstract: A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein an interconnect layer is formed over the first side of the semiconductor substrate, a backside illumination film formed over a second side of the semiconductor substrate, a metal shielding layer formed over the backside illumination film and a via embedded in the backside illumination film and coupled between the metal shielding layer and the semiconductor substrate.
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公开(公告)号:US09786716B2
公开(公告)日:2017-10-10
申请号:US15284790
申请日:2016-10-04
Inventor: Chiu-Jung Chen , Chun-Hao Chou , Hsin-Chi Chen , Kuo-Cheng Lee , Volume Chien , Yung-Lung Hsu , Yun-Wei Cheng
IPC: H01L27/146
CPC classification number: H01L27/14689 , H01L27/1462 , H01L27/14621 , H01L27/14623 , H01L27/1463 , H01L27/14632 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14685 , H01L27/14687 , H01L27/14698 , H01L2224/48463
Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
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公开(公告)号:US09768221B2
公开(公告)日:2017-09-19
申请号:US13929172
申请日:2013-06-27
Inventor: Shang-Yen Wu , I-Chih Chen , Yi-Sheng Liu , Volume Chien , Fu-Tsun Tsai , Chi-Cherng Jeng , Ying-Hao Chen
IPC: H01L23/52 , H01L27/146 , H01L23/00
CPC classification number: H01L27/1464 , H01L24/05 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L2224/04042 , H01L2224/48463 , H01L2924/13091 , H01L2924/00
Abstract: A semiconductor device including a light sensing region disposed on a substrate is provided that includes a bond structure having one or more patterned layers underlying the pad element. The pad element may be coupled to the light sensing region and may be formed in a first metal layer disposed on the substrate. A second metal layer of the device has a first bond region, a region of the second metal layer that underlies the pad element. This first bond region of the second metal layer includes a pattern of a plurality of conductive lines interposed by dielectric. A via connects the pad element and the second metal layer.
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