Method and structure for reducing light crosstalk in integrated circuit device
    7.
    发明授权
    Method and structure for reducing light crosstalk in integrated circuit device 有权
    降低集成电路器件中的光串扰的方法和结构

    公开(公告)号:US09201195B2

    公开(公告)日:2015-12-01

    申请号:US13930717

    申请日:2013-06-28

    Abstract: The present disclosure provides an integrated circuit device comprising a substrate having a back surface and a sensing region disposed in the substrate and being operable to sense radiation projected towards the back surface of the substrate. The device further includes a waveguide disposed over the back surface of the substrate. The waveguide is aligned with the sensing region such that the waveguide is operable to transmit the radiation towards the aligned sensing region. The waveguide includes a waveguide wall, and an inner region disposed adjacent to the waveguide wall. A diffractive index of the waveguide wall is less than a diffractive index of the inner region.

    Abstract translation: 本公开提供了一种集成电路器件,其包括具有背表面和设置在衬底中的感测区域的衬底,并且可操作以感测朝向衬底的背表面投射的辐射。 该器件还包括布置在衬底的背面上的波导管。 波导与感测区域对准,使得波导可操作以将辐射传送到对准的感测区域。 波导包括波导壁和邻近波导壁设置的内部区域。 波导壁的衍射指数小于内部区域的衍射指数。

    Semiconductor structure and manufacturing method thereof

    公开(公告)号:US10515991B2

    公开(公告)日:2019-12-24

    申请号:US14689968

    申请日:2015-04-17

    Abstract: A semiconductor structure includes a substrate including a first side and a second side disposed opposite to the first side and configured to receive an electromagnetic radiation, a barrier layer disposed over the second side of the substrate, a color filter disposed over the barrier layer, and a grid surrounding the color filter and disposed over the barrier layer, wherein the barrier layer is configured to absorb or reflect non-visible light in the electromagnetic radiation, and the barrier layer is disposed between the grid and the substrate.

    Support Structure for Integrated Circuitry
    10.
    发明申请

    公开(公告)号:US20190326343A1

    公开(公告)日:2019-10-24

    申请号:US16459181

    申请日:2019-07-01

    Abstract: Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.

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