公开(公告)号：US20110042725A1

公开(公告)日：2011-02-24

申请号：US12989713

申请日：2009-04-10

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

IPC分类号： H01L27/092 ,  H01L29/06 ,  H01L29/78

CPC分类号： H01L27/1203 ,  H01L27/0883 ,  H01L27/092 ,  H01L29/045 ,  H01L29/458 ,  H01L29/78654 ,  H01L29/78696

摘要： With inversion-mode transistors, intrinsic-mode transistors, or semiconductor-layer accumulation-layer current controlled accumulation-mode transistors, variation in threshold voltages becomes large in miniaturized generations due to statistical variation in impurity atom concentrations and thus it is difficult to maintain the reliability of an LSI. Provided is a bulk current controlled accumulation-mode transistor which is formed by controlling the thickness and the impurity atom concentration of a semiconductor layer so that the thickness of a depletion layer becomes greater than that of the semiconductor layer. For example, by setting the thickness of the semiconductor layer to 100 nm and setting the impurity concentration thereof to be higher than 2×1017 [cm−3], the standard deviation of variation in threshold values can be made smaller than a power supply voltage-based allowable variation value.

摘要翻译： 利用反型晶体管，固有模式晶体管或半导体层累积层电流控制的累积模式晶体管，由于杂质原子浓度的统计变化，小型化电路中阈值电压的变化变大，因此难以维持 LSI的可靠性。 提供了通过控制半导体层的厚度和杂质原子浓度使得耗尽层的厚度变得大于半导体层的厚度而形成的体电流控制堆积模式晶体管。 例如，通过将半导体层的厚度设定为100nm，将其杂质浓度设定为高于2×1017 [cm-3]，可以使阈值的变化的标准偏差小于电源电压 的允许变化值。

公开(公告)号：US20100275981A1

公开(公告)日：2010-11-04

申请号：US12809447

申请日：2008-12-12

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tetsuya Goto ,  Kouji Tanaka

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tetsuya Goto ,  Kouji Tanaka

IPC分类号： H01L31/04 ,  H01L31/18

CPC分类号： H01L31/18 ,  C23C16/24 ,  C23C16/511 ,  H01L31/028 ,  H01L31/04 ,  H01L31/0745 ,  H01L31/1804 ,  H01L31/1812 ,  H01L31/1816 ,  Y02E10/547 ,  Y02P70/521

摘要： An apparatus and method for manufacturing photoelectric conversion elements, and a photoelectric conversion element, the apparatus and method being capable of highly efficiently forming a film at a high speed with microwave plasma, preventing oxygen from mixing, and reducing the number of defects. The invention provides a photoelectric conversion element manufacturing apparatus 100 that forms a semiconductor stack film on a substrate by using microwave plasma CVD. The apparatus includes a chamber 10 which is a enclosed space containing a base, on which the a subject substrate for thin-film formation is mounted, a first gas supply unit 40 which supplies plasma excitation gas to a plasma excitation region in the chamber 10, a pressure regulation unit 70 which regulates pressure in the chamber 10, a second gas supply unit 50 which supplies raw gas to a plasma diffusion region in the chamber 10, a microwave application unit 20 which applies microwaves into the chamber 10, and a bias voltage application unit 60 which selects and applies a substrate bias voltage to the substrate W according to the type of gas.

摘要翻译： 一种用于制造光电转换元件的装置和方法以及光电转换元件，该装置和方法能够高效地用微波等离子体形成膜，防止氧气混合，并减少缺陷数量。 本发明提供一种通过使用微波等离子体CVD在基板上形成半导体叠层膜的光电转换元件制造装置100。 该装置包括：腔室10，其是容纳基底的封闭空间，其上安装有用于薄膜形成的被检体基底;第一气体供给单元40，其向等离子体激发区域提供等离子体激发气体; 调节室10内的压力的压力调节单元70，向室10中的等离子体扩散区域供给原料气体的第二气体供给单元50，将微波施加到室10中的微波施加单元20以及偏置电压 应用单元60，其根据气体的类型选择并施加衬底偏置电压到衬底W.

公开(公告)号：US07691725B2

公开(公告)日：2010-04-06

申请号：US10544491

申请日：2004-02-02

申请人： Tadahiro Ohmi ,  Akinobu Teramoto

发明人： Tadahiro Ohmi ,  Akinobu Teramoto

IPC分类号： H01L21/30

CPC分类号： H01L21/76256

摘要： An insulating film is formed as a pore-wall protective film (103) on pore walls in a porous layer (102) by the use of a mixed gas plasma of a noble gas and an insulating film forming gas generated by microwave excitation. As a result, the pore-wall protective film can have film properties as a protective film.

摘要翻译： 通过使用惰性气体的混合气体等离子体和通过微波激发产生的形成绝缘膜的气体，在多孔层（102）的孔壁上形成绝缘膜作为孔壁保护膜（103）。 结果，孔壁保护膜可以具有作为保护膜的膜性质。

公开(公告)号：US20090302382A1

公开(公告)日：2009-12-10

申请号：US12308057

申请日：2007-05-31

申请人： Alberto O. Adan ,  Mitsuhiro Kikuta ,  Akinobu Teramoto ,  Tadahiro Ohmi ,  Hiroo Yabe ,  Takanori Watanabe

发明人： Alberto O. Adan ,  Mitsuhiro Kikuta ,  Akinobu Teramoto ,  Tadahiro Ohmi ,  Hiroo Yabe ,  Takanori Watanabe

IPC分类号： H01L27/088 ,  H01L21/8238 ,  H01L29/78 ,  H01L21/336 ,  H01L27/092 ,  H01L21/8234

CPC分类号： H01L29/7813 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823487 ,  H01L21/823807 ,  H01L21/82385 ,  H01L21/823885 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/045 ,  H01L29/4236 ,  H01L29/66734

摘要： In one embodiment of the present invention, a power IC device is disclosed containing a power MOS transistor with a low ON resistance and a surface channel MOS transistor with a high operation speed. There is also provided a method of manufacturing such a device. A chip has a surface of which the planar direction is not less than −8° and not more than +8° off a silicon crystal face. The p-channel trench power MOS transistor includes a trench formed vertically from the surface of the chip, a gate region in the trench, an inversion channel region on a side wall of the trench, a source region in a surface layer of the chip, and a drain region in a back surface layer of the chip. The surface channel MOS transistor has an inversion channel region fabricated so that an inversion channel current flows in a direction not less than −8° and not more than +8° off the silicon crystal direction.

摘要翻译： 在本发明的一个实施例中，公开了一种功率IC器件，其包含具有低导通电阻的功率MOS晶体管和具有高操作速度的表面沟道MOS晶体管。 还提供了制造这种装置的方法。 芯片的表面的平面方向不小于硅晶面的-8°且不大于+ 8°。 p沟道沟槽功率MOS晶体管包括从芯片的表面垂直形成的沟槽，沟槽中的栅极区域，沟槽的侧壁上的反转沟道区域，芯片的表面层中的源极区域， 以及芯片的背面层中的漏极区域。 表面沟道MOS晶体管具有制造的反向沟道区域，使得反向沟道电流在与硅晶体方向不同于-8°且不大于+ 8°的方向上流动。

公开(公告)号：US20090162995A1

公开(公告)日：2009-06-25

申请号：US11992230

申请日：2005-09-20

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hiroshi Akahori

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hiroshi Akahori

IPC分类号： H01L21/322 ,  B08B13/00 ,  B05C11/00

CPC分类号： H01L21/306 ,  H01L29/045 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/785

摘要： By hydrogen-terminating a semiconductor surface using a solution containing HF2− ions and an oxidant, the hydrogen termination can be quickly carried out. In this case, the semiconductor surface is silicon having a (111) surface, a (110) surface, or a (551) surface.

摘要翻译： 通过使用含有HF 2 - 离子和氧化剂的溶液氢终止半导体表面，可以快速进行氢终止。 在这种情况下，半导体表面是具有（111）表面，（110）表面或（551）表面的硅。

公开(公告)号：US20090134120A1

公开(公告)日：2009-05-28

申请号：US11992540

申请日：2005-09-26

申请人： Tadahiro Ohmi ,  Akinobu Teramoto

发明人： Tadahiro Ohmi ,  Akinobu Teramoto

IPC分类号： B44C1/22 ,  H05H1/46 ,  C23C16/54 ,  C23F1/08

CPC分类号： H01L21/3065 ,  C23C16/402 ,  C23C16/511 ,  H01J37/32192 ,  H01J37/3244 ,  H01J37/32449

摘要： A plasma processing apparatus in which consumption of expensive krypton and xenon gases is suppressed as much as possible while reducing damage on a workpiece during plasma processing. In plasma processing of a substrate using a rare gas, two or more kinds of different rare gases are employed, and an inexpensive argon gas is used as one rare gas and any one or both of krypton and xenon gases having a larger collision cross-sectional area against electron than that of the argon gas is used as the other gas. Consequently, consumption of expensive krypton and xenon gases is suppressed as much as possible and damage on a workpiece is reduced during plasma processing.

摘要翻译： 一种等离子体处理装置，其中尽可能地抑制昂贵的氪气和氙气的消耗，同时减少等离子体处理期间对工件的损坏。 在使用稀有气体的基板的等离子体处理中，使用两种以上的不同种类的稀有气体，廉价的氩气用作一种稀有气体，氪气和氙气气体中的任何一种或两者具有较大的碰撞横截面 作为其他气体，使用与氩气相比的电子区域。 因此，尽可能地抑制昂贵的氪气和氙气的消耗，并且在等离子体处理期间减少了工件上的损坏。

公开(公告)号：US20090133713A1

公开(公告)日：2009-05-28

申请号：US11988648

申请日：2006-07-12

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hitoshi Morinaga ,  Yukio Kishi ,  Hiromichi Ohtaki ,  Yoshihumi Tsutai

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hitoshi Morinaga ,  Yukio Kishi ,  Hiromichi Ohtaki ,  Yoshihumi Tsutai

IPC分类号： B08B3/12 ,  B32B5/16

CPC分类号： C23C4/00 ,  B08B3/02 ,  B08B3/12 ,  B08B2203/0288 ,  C23C4/02 ,  C23C4/11 ,  C23C16/405 ,  C23C16/545 ,  C23C26/00 ,  C23C28/04 ,  Y10T428/25 ,  Y10T428/252

摘要： It has been difficult to provide a large-sized ceramic member quickly and economically. A multilayer structure is produced by forming a ceramic film on a base which is made of a material that can be shaped comparatively easily. The ceramic film is formed by a plasma spraying method, CVD method, PVD method, sol-gel method or the like. Alternatively, the ceramic film may be formed by a method combined with a spray deposit film.

摘要翻译： 很难快速，经济地提供大型陶瓷件。 通过在可以相对容易地成形的材料制成的基底上形成陶瓷膜来制造多层结构体。 陶瓷膜通过等离子喷涂法，CVD法，PVD法，溶胶 - 凝胶法等形成。 或者，陶瓷膜可以通过与喷雾沉积膜结合的方法形成。

公开(公告)号：US07521324B2

公开(公告)日：2009-04-21

申请号：US10551843

申请日：2004-03-31

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hidetoshi Wakamatsu ,  Yasuo Kobayashi

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hidetoshi Wakamatsu ,  Yasuo Kobayashi

IPC分类号： H01L21/336

CPC分类号： H01L21/318 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518

摘要： In order to provide a semiconductor device having good quality by keeping the relative permittivity of a High-K insulation film in a high state, or to provide a method for manufacturing a semiconductor device in which the relative permittivity of the High-K insulation film can be kept in a high state, a semiconductor device is disclosed that includes a silicon substrate, a gate electrode layer, and a gate insulation film between the silicon substrate and the gate electrode layer. The gate insulation film is a high relative permittivity (high-k) film being formed by performing a nitriding treatment on a mixture of a metal and silicon. The High-K film itself becomes a nitride so as to prevent SiO2 from being formed.

摘要翻译： 为了通过将高K绝缘膜的相对介电常数保持在高状态来提供具有良好质量的半导体器件，或者提供一种半导体器件的制造方法，其中高K绝缘膜的相对介电常数可以 保持在高状态，公开了在硅衬底和栅极电极层之间包括硅衬底，栅极电极层和栅极绝缘膜的半导体器件。 栅极绝缘膜是通过对金属和硅的混合物进行氮化处理而形成的高相对介电常数（高k）膜。 高K膜本身成为氮化物，以防止形成SiO 2。

公开(公告)号：US20080054795A1

公开(公告)日：2008-03-06

申请号：US11663560

申请日：2004-09-24

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Akihiro Morimoto

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Akihiro Morimoto

IPC分类号： H01L51/54 ,  H01J63/04 ,  H05H1/24 ,  H05H1/46

CPC分类号： H05B33/28 ,  H01L51/5206 ,  H01L51/5253 ,  H01L51/529 ,  H01L2251/5361 ,  H05B33/04

摘要： An organic EL light emitting element is provided with a conductive transparent electrode 3, a counter electrode 8 opposing the conductive transparent electrode 3, an organic EL light emitting layer 6 provided between the conductive transparent electrode 3 and the counter electrode 8, an insulating protection layer 9 provided to cover at least the organic EL light emitting layer 6, and a heat dissipating layer 11 which is brought into contact with the insulating protection layer 9. The conductive transparent electrode has an ITO film including at least one of Hf, V and Zr at least on the surface part on the side of the organic EL light emitting layer 6, and the insulating protection layer 9 includes a nitride film having a thickness of 100 nm or less.

摘要翻译： 有机EL发光元件设置有导电透明电极3，与导电透明电极3相对的对置电极8，设置在导电性透明电极3和对置电极8之间的有机EL发光层6，绝缘保护层 设置为至少覆盖有机EL发光层6，以及与绝缘保护层9接触的散热层11。 导电性透明电极至少在有机EL发光层6侧的表面部分具有包括Hf，V和Zr中的至少一种的ITO膜，绝缘保护层9包括厚度为 100nm以下。

公开(公告)号：US20070145535A1

公开(公告)日：2007-06-28

申请号：US11651034

申请日：2007-01-09

申请人： Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto ,  Hiroshi Akahori ,  Keiichi Nii

发明人： Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto ,  Hiroshi Akahori ,  Keiichi Nii

IPC分类号： H01L29/06

CPC分类号： H01L21/3185 ,  H01L21/30604 ,  H01L21/31654 ,  H01L21/318 ,  H01L29/6659

摘要： In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H2O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.

摘要翻译： 在形成在具有大致（110）晶面取向的硅表面上的半导体器件中，硅表面变平，使得表面Ra的算术平均偏差不大于0.15nm，优选为0.09nm，这使得能够制造 高迁移率的n-MOS晶体管。 通过在脱氧H 2中清洗硅表面，通过在氧自由基气氛中重复自牺牲氧化物膜的沉积工艺和自牺牲氧化物膜的去除工艺来获得这种扁平化的硅表面， 或低OH密度气氛，或通过氢或重氢强烈地终止硅表面。 自牺牲氧化膜的沉积工艺可以通过各向同性氧化进行。