公开(公告)号：US20100275981A1

公开(公告)日：2010-11-04

申请号：US12809447

申请日：2008-12-12

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tetsuya Goto ,  Kouji Tanaka

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tetsuya Goto ,  Kouji Tanaka

IPC分类号： H01L31/04 ,  H01L31/18

CPC分类号： H01L31/18 ,  C23C16/24 ,  C23C16/511 ,  H01L31/028 ,  H01L31/04 ,  H01L31/0745 ,  H01L31/1804 ,  H01L31/1812 ,  H01L31/1816 ,  Y02E10/547 ,  Y02P70/521

摘要： An apparatus and method for manufacturing photoelectric conversion elements, and a photoelectric conversion element, the apparatus and method being capable of highly efficiently forming a film at a high speed with microwave plasma, preventing oxygen from mixing, and reducing the number of defects. The invention provides a photoelectric conversion element manufacturing apparatus 100 that forms a semiconductor stack film on a substrate by using microwave plasma CVD. The apparatus includes a chamber 10 which is a enclosed space containing a base, on which the a subject substrate for thin-film formation is mounted, a first gas supply unit 40 which supplies plasma excitation gas to a plasma excitation region in the chamber 10, a pressure regulation unit 70 which regulates pressure in the chamber 10, a second gas supply unit 50 which supplies raw gas to a plasma diffusion region in the chamber 10, a microwave application unit 20 which applies microwaves into the chamber 10, and a bias voltage application unit 60 which selects and applies a substrate bias voltage to the substrate W according to the type of gas.

摘要翻译： 一种用于制造光电转换元件的装置和方法以及光电转换元件，该装置和方法能够高效地用微波等离子体形成膜，防止氧气混合，并减少缺陷数量。 本发明提供一种通过使用微波等离子体CVD在基板上形成半导体叠层膜的光电转换元件制造装置100。 该装置包括：腔室10，其是容纳基底的封闭空间，其上安装有用于薄膜形成的被检体基底;第一气体供给单元40，其向等离子体激发区域提供等离子体激发气体; 调节室10内的压力的压力调节单元70，向室10中的等离子体扩散区域供给原料气体的第二气体供给单元50，将微波施加到室10中的微波施加单元20以及偏置电压 应用单元60，其根据气体的类型选择并施加衬底偏置电压到衬底W.

公开(公告)号：US20100025821A1

公开(公告)日：2010-02-04

申请号：US12521019

申请日：2007-12-20

申请人： Tadahiro Ohmi ,  Tetsuya Goto ,  Akinobu Teramoto ,  Takaaki Matsuoka

发明人： Tadahiro Ohmi ,  Tetsuya Goto ,  Akinobu Teramoto ,  Takaaki Matsuoka

IPC分类号： H01L29/30 ,  C23C16/00 ,  H01L21/265

CPC分类号： H01L21/265 ,  H01J37/3222 ,  H01J37/32412 ,  H01J37/32706 ,  H01J2237/20 ,  H01J2237/26 ,  H01L21/26513 ,  H01L21/2658 ,  H01L29/30 ,  H01L29/7833

摘要： When positively charged ions are implanted into a target substrate, charge-up damage may occur on the target substrate. In order to suppress charge-up caused by secondary electrons emitted from the target substrate when positively charged ions are implanted, a conductive member is installed at a position facing the target substrate and electrically grounded with respect to a high frequency. Further, a field intensity generated in the target substrate may be reduced by controlling an RF power applied to the target substrate in pulse mode.

摘要翻译： 当将带正电荷的离子注入目标衬底时，目标衬底上可能会发生充电损伤。 为了抑制当注入正电荷的离子时从目标衬底发射的二次电子引起的充电，导电构件安装在面向目标衬底并相对于高频电接地的位置。 此外，可以通过以脉冲模式控制施加到目标衬底的RF功率来减小在目标衬底中产生的场强。

公开(公告)号：US20080187747A1

公开(公告)日：2008-08-07

申请号：US11883421

申请日：2006-01-20

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tetsuya Goto ,  Kazumasa Kawase

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tetsuya Goto ,  Kazumasa Kawase

IPC分类号： H01L21/3205 ,  H01L21/31

CPC分类号： H01L21/02332 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/3185 ,  H01L29/518 ,  Y10T428/265

摘要： A dielectric film wherein N in the state of an Si3=≡N bonding is present in a concentration of 3 atomic % or more in the surface side of an oxide film and also is present in a concentration of 0.1 atomic % or less in the interface side of the oxide film can achieve the prevention of the B diffusion and also the prevention of the deterioration of the NBTI resistance in combination. When the Ar/N2 radical nitridation is used, it is difficult for the resultant oxide film to satisfy the condition wherein N in the above bonding state is present in a concentration of 3 atomic % or more in the surface side of an oxide film and simultaneously is present in a concentration of 0.1 atomic % or less in the interface side of the oxide film, whereas, the above distribution of the N concentration can be achieved by using any of the gas combinations of Xe/N2, Kr/N2, Ar/NH3, Xe/NH3, Kr/NH3, Ar/N2/H2, Xe/N2/H2 and Kr/N2/H2.

摘要翻译： 在氧化物膜的表面侧以3原子％以上的浓度存在Si 3 N 3≡N键的状态下的N的电介质膜，其浓度为 在氧化膜的界面侧为0.1原子％以下，可以防止B扩散，并且可以防止NBTI电阻的组合劣化。 当使用Ar / N 2自由基氮化时，所得到的氧化物膜难以满足在上述接合状态下的N以3原子％以上的浓度存在的条件 氧化膜的表面侧，同时在氧化膜的界面侧以0.1原子％以下的浓度存在，而N浓度的上述分布可以通过使用Xe / N / 2，Kr / N 2，Ar / NH 3，Xe / NH 3，Kr / NH 2， 2/3/2/2/2/2/2/2 和Kr / N 2 H 2 / H 2。

公开(公告)号：US08399862B2

公开(公告)日：2013-03-19

申请号：US12521019

申请日：2007-12-20

申请人： Tadahiro Ohmi ,  Tetsuya Goto ,  Akinobu Teramoto ,  Takaaki Matsuoka

发明人： Tadahiro Ohmi ,  Tetsuya Goto ,  Akinobu Teramoto ,  Takaaki Matsuoka

IPC分类号： G21K5/10 ,  H01S3/00 ,  H05H3/02 ,  A61N5/00 ,  G21G5/00 ,  G21G4/00

CPC分类号： H01L21/265 ,  H01J37/3222 ,  H01J37/32412 ,  H01J37/32706 ,  H01J2237/20 ,  H01J2237/26 ,  H01L21/26513 ,  H01L21/2658 ,  H01L29/30 ,  H01L29/7833

摘要： When positively charged ions are implanted into a target substrate, charge-up damage may occur on the target substrate. In order to suppress charge-up caused by secondary electrons emitted from the target substrate when positively charged ions are implanted, a conductive member is installed at a position facing the target substrate and electrically grounded with respect to a high frequency. Further, a field intensity generated in the target substrate may be reduced by controlling an RF power applied to the target substrate in pulse mode.

摘要翻译： 当将带正电荷的离子注入目标衬底时，目标衬底上可能会发生充电损伤。 为了抑制当注入正电荷的离子时从目标衬底发射的二次电子引起的充电，导电构件安装在面向目标衬底并相对于高频电接地的位置。 此外，可以通过以脉冲模式控制施加到目标衬底的RF功率来减小在目标衬底中产生的场强。

公开(公告)号：US09230799B2

公开(公告)日：2016-01-05

申请号：US13981048

申请日：2012-01-23

申请人： Akinobu Teramoto ,  Hiroshi Kambayashi ,  Hirokazu Ueda ,  Yuichiro Morozumi ,  Katsushige Harada ,  Kazuhide Hasebe ,  Tadahiro Ohmi

发明人： Akinobu Teramoto ,  Hiroshi Kambayashi ,  Hirokazu Ueda ,  Yuichiro Morozumi ,  Katsushige Harada ,  Kazuhide Hasebe ,  Tadahiro Ohmi

IPC分类号： H01L29/20 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  H01L29/778 ,  H01L29/423 ,  H01L23/00 ,  H01L29/205 ,  H01L29/51

CPC分类号： H01L21/02274 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/0254 ,  H01L21/28264 ,  H01L23/564 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42364 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.

摘要翻译： 一种制造半导体器件的方法，该半导体器件包括构成半导体层并包括形成栅极绝缘膜的GaN（氮化镓），其中在氮化物层上形成选自SiO 2膜和Al 2 O 3膜中的至少一种膜 通过使用微波等离子体形成含GaN的GaN，并且将形成的膜用作栅极绝缘膜的至少一部分。

公开(公告)号：US08492879B2

公开(公告)日：2013-07-23

申请号：US12681576

申请日：2008-10-06

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Tomoyuki Suwa ,  Rihito Kuroda ,  Hideo Kudo ,  Yoshinori Hayamizu

IPC分类号： H01L29/04

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L29/78

摘要： On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).

摘要翻译： 在半导体基板的表面上，以大致相同的方向形成有以原子台阶逐步形成的多个台阶。 使用半导体衬底，形成MOS晶体管，使得在载流子行进方向（源 - 漏方向）上不存在台阶。

公开(公告)号：US08362567B2

公开(公告)日：2013-01-29

申请号：US12309245

申请日：2007-07-12

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

IPC分类号： H01L21/70

CPC分类号： H01L29/045 ,  H01L21/02057 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823807 ,  H01L21/823835 ,  H01L21/82385 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/518 ,  H01L29/785 ,  H01L2029/7857

摘要： In a semiconductor device, the degree of flatness of 0.3 nm or less in terms of a peak-to-valley (P-V) value is realized by rinsing a silicon surface with hydrogen-added ultrapure water in a light-screened state and in a nitrogen atmosphere and a contact resistance of 10−11 Ωcm2 or less is realized by setting a work function difference of 0.2 eV or less between an electrode and the silicon. Thus, the semiconductor device can operate on a frequency of 10 GHz or higher.

摘要翻译： 在半导体装置中，以峰 - 谷（PV）值为单位，平坦度为0.3nm以下的程度是通过在加有荧光的状态下加氢的超纯水冲洗硅表面而实现的 通过在电极和硅之间设定0.2eV以下的功函数差来实现10-11＆OHgr·cm 2以下的接触电阻。 因此，半导体器件可以在10GHz或更高的频率上工作。

公开(公告)号：US20120234491A1

公开(公告)日：2012-09-20

申请号：US13469851

申请日：2012-05-11

申请人： Tadahiro OHMI ,  Akinobu Teramoto

发明人： Tadahiro OHMI ,  Akinobu Teramoto

IPC分类号： B05B1/18 ,  C23C16/511 ,  C23C16/50

CPC分类号： H01L21/3065 ,  C23C16/402 ,  C23C16/511 ,  H01J37/32192 ,  H01J37/3244 ,  H01J37/32449

摘要： A plasma processing apparatus in which consumption of expensive krypton and xenon gases is suppressed as much as possible while reducing damage on a workpiece during plasma processing. In plasma processing of a substrate using a rare gas, two or more kinds of different rare gases are employed, and an inexpensive argon gas is used as one rare gas and any one or both of krypton and xenon gases having a larger collision cross-sectional area against electron than that of the argon gas is used as the other gas. Consequently, consumption of expensive krypton and xenon gases is suppressed as much as possible and damage on a workpiece is reduced during plasma processing.

摘要翻译： 一种等离子体处理装置，其中尽可能地抑制昂贵的氪气和氙气的消耗，同时减少等离子体处理期间对工件的损坏。 在使用稀有气体的基板的等离子体处理中，使用两种以上的不同种类的稀有气体，廉价的氩气用作一种稀有气体，氪气和氙气气体中的任何一种或两者具有较大的碰撞横截面 作为其他气体，使用与氩气相比的电子区域。 因此，尽可能地抑制昂贵的氪气和氙气的消耗，并且在等离子体处理期间减少了工件上的损坏。

公开(公告)号：US20120146102A1

公开(公告)日：2012-06-14

申请号：US13372159

申请日：2012-02-13

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Rihito Kuroda

IPC分类号： H01L29/04 ,  H01L29/786

CPC分类号： H01L27/1203 ,  H01L21/28202 ,  H01L29/518 ,  H01L29/78654 ,  H01L29/78696

摘要： An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2×1017 cm−3 to achieve a large gate voltage swing.

摘要翻译： 累积模式晶体管的沟道区域中的半导体层的杂质浓度高于2×1017cm-3，以实现大的栅极电压摆动。

公开(公告)号：US08030182B2

公开(公告)日：2011-10-04

申请号：US11992230

申请日：2005-09-20

申请人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hiroshi Akahori

发明人： Tadahiro Ohmi ,  Akinobu Teramoto ,  Hiroshi Akahori

IPC分类号： H01L21/461 ,  B08B7/04

CPC分类号： H01L21/306 ,  H01L29/045 ,  H01L29/6659 ,  H01L29/66795 ,  H01L29/785

摘要： By hydrogen-terminating a semiconductor surface using a solution containing HF2− ions and an oxidant, the hydrogen termination can be quickly carried out. In this case, the semiconductor surface is silicon having a (111) surface, a (110) surface, or a (551) surface.

摘要翻译： 通过使用含有HF 2 - 离子和氧化剂的溶液氢终止半导体表面，可以快速进行氢终止。 在这种情况下，半导体表面是具有（111）表面，（110）表面或（551）表面的硅。