公开(公告)号：US20120013409A1

公开(公告)日：2012-01-19

申请号：US13256748

申请日：2010-02-05

申请人： Masakatsu Maeda

发明人： Masakatsu Maeda

IPC分类号： H03L7/097

CPC分类号： H03L7/107 ,  H03L7/093 ,  H03L7/099 ,  H03L7/1075 ,  H03L2207/06 ,  H03L2207/50

摘要： A digital FLL/PLL is provided which is capable of converging an oscillation frequency from a VCO to a desired frequency at a high speed even without setting a damping factor corresponding to each VCO gain. A digital FLL/PLL of the present invention includes: a comparator for comparing a channel signal to a loopback signal having an oscillation frequency to generate a signal error; a digital loop filter for generating a control voltage that determines the oscillation frequency, on the basis of the signal error; a VCO for controlling an oscillation frequency on the basis of the control voltage; a loopback path through which the oscillation frequency generated by the VCO is outputted as the loopback signal to the comparator; and a control section for monitoring the signal error, and controlling the digital loop filter such that the oscillation frequency of the VCO becomes a stationary state, when detecting that the signal error meets a predetermined condition after the channel signal is switched.

摘要翻译： 提供了一种数字FLL / PLL，其能够以高速将VCO的振荡频率收敛到期望的频率，而不设置对应于每个VCO增益的阻尼因子。 本发明的数字FLL / PLL包括：比较器，用于将信道信号与具有振荡频率的环回信号进行比较以产生信号误差; 数字环路滤波器，用于基于信号误差产生确定振荡频率的控制电压; 用于基于所述控制电压来控制振荡频率的VCO; 由VCO产生的振荡频率作为环回信号输出到比较器的环回路径; 以及用于监视信号误差的控制部分，并且当在信道信号被切换之后检测到信号误差满足预定条件时，控制数字环路滤波器使得VCO的振荡频率变为静止状态。

公开(公告)号：US20110287626A1

公开(公告)日：2011-11-24

申请号：US13146208

申请日：2010-01-29

申请人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

发明人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

IPC分类号： H01L21/283

CPC分类号： H01L29/45 ,  H01L21/0485 ,  H01L29/1608

摘要： The invention provides an ohmic electrode of a p-type SiC semiconductor element, which includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The invention also provides a method of forming an ohmic electrode of a p-type SiC semiconductor element. The ohmic electrode includes an ohmic electrode layer that is made of Ti3SiC2, and that is formed directly on a surface of a p-type SiC semiconductor. The method includes forming a ternary mixed film that includes Ti, Si, and C in a manner such that an atomic composition ratio, Ti:Si:C is 3:1:2, on a surface of a p-type SiC semiconductor to produce a laminated film; and annealing the produced laminated film under vacuum or under an inert gas atmosphere.

摘要翻译： 本发明提供了一种p型SiC半导体元件的欧姆电极，其包括由Ti 3 SiC 2制成的欧姆电极层，其直接形成在p型SiC半导体的表面上。 本发明还提供了形成p型SiC半导体元件的欧姆电极的方法。 欧姆电极包括由Ti 3 SiC 2制成并且直接形成在p型SiC半导体的表面上的欧姆电极层。 该方法包括以使得在p型SiC半导体的表面上的原子组成比Ti:Si:C为3:1:2的方式形成包括Ti，Si和C的三元混合膜，以产生 层压膜; 并在真空或惰性气体气氛下退火生产的层压膜。

公开(公告)号：US07825422B2

公开(公告)日：2010-11-02

申请号：US11660476

申请日：2005-08-16

申请人： Masakatsu Maeda ,  Yasuyuki Yamamoto

发明人： Masakatsu Maeda ,  Yasuyuki Yamamoto

IPC分类号： H01L33/58

CPC分类号： C04B41/009 ,  C04B41/5031 ,  C04B41/5063 ,  C04B41/5064 ,  C04B41/87 ,  C04B2111/80 ,  H01L33/60 ,  H01L33/641 ,  H01L2224/13 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H05K1/0274 ,  H05K1/0306 ,  H05K1/181 ,  H05K2201/017 ,  H05K2201/10106 ,  H05K2201/2054 ,  C04B41/0072 ,  C04B41/4556 ,  C04B41/4539 ,  C04B41/5045 ,  C04B35/58 ,  C04B35/581 ,  H01L2924/00014 ,  H01L2924/00

摘要： A ceramic substrate for mounting a light emitting element. The ceramic substrate has a placement surface for placing a light emitting element having an electrode; and an electrode electrically-connected with the electrode of the light emitting element, wherein the ceramic substrate comprises a substrate body consisting of a nitride ceramics; and a coat layer coating at least a part of a surface of the substrate body and consisting of a ceramics different from the nitride ceramics forming the substrate body; and the coat layer has an optical reflectance of 50% or more for any light having a wavelength of from 300 to 800 nm, which can increase a luminance of the light emitting element by reflecting the light emitted from the element efficiently with certainty, and which has a high heat radiation property; and a manufacturing method therefor.

摘要翻译： 一种用于安装发光元件的陶瓷基板。 陶瓷基板具有用于放置具有电极的发光元件的放置面; 以及与所述发光元件的电极电连接的电极，其中，所述陶瓷基板包括由氮化物陶瓷构成的基板主体; 以及涂覆在所述基板主体的表面的至少一部分上并由与形成所述基板主体的所述氮化物陶瓷不同的陶瓷构成的涂层; 并且涂层对于具有300至800nm波长的任何光都具有50％或更高的光学反射率，这可以通过有效地反映从元件发射的光来增加发光元件的亮度，并且其中 具有较高的散热性能; 及其制造方法。

公开(公告)号：US07742543B2

公开(公告)日：2010-06-22

申请号：US11648649

申请日：2007-01-03

申请人： Masakatsu Maeda

发明人： Masakatsu Maeda

IPC分类号： H03C3/00

CPC分类号： H04W52/52 ,  H03G1/0088 ,  H03G3/004 ,  H03G3/3042

摘要： A transmission circuit alleviates the frequency characteristics of a group delay and an attenuation amount in a transmission signal band and expands a dynamic range to a high frequency band. A ladder-type resistance-type attenuator includes switching elements, 2R resistor elements and R resistor elements. The 2R and R resistor elements are respectively connected to variable capacitor elements in parallel. The variable attenuator having such a connection structure is connected to an amplitude modulation loop of the transmission circuit. By controlling the capacitance value of the variable capacitor elements using the capacitance value control section when the switching elements are ON/OFF switched based on the transmission power control signal, the influence of parasitic capacitances of the variable capacitor elements is suppressed and the group delay between the amplitude modulation and the phase modulation is reduced.

摘要翻译： 发送电路缓解发送信号频带中的组延迟的频率特性和衰减量，并将动态范围扩大到高频带。 梯型电阻型衰减器包括开关元件，2R电阻元件和R电阻元件。 2R和R电阻元件分别与可变电容器元件并联连接。 具有这种连接结构的可变衰减器连接到传输电路的幅度调制环路。 通过在开关元件基于发送功率控制信号进行ON / OFF切换时，通过使用电容值控制部来控制可变电容元件的电容值，可以抑制可变电容元件的寄生电容的影响， 幅度调制和相位调制减小。

公开(公告)号：US07734263B2

公开(公告)日：2010-06-08

申请号：US11812730

申请日：2007-06-21

申请人： Masakatsu Maeda ,  Taichi Ikedo

发明人： Masakatsu Maeda ,  Taichi Ikedo

IPC分类号： H01Q11/12

CPC分类号： H04L27/361 ,  H03F1/025 ,  H04B1/0475 ,  H04L25/06

摘要： A transmission circuit operates with high efficiency and low distortion. An amplitude and phase extraction section extracts amplitude data and phase data from input data. A phase modulation section phase-modulates the phase data to output a resultant signal as a phase-modulated signal. An amplifier section amplifies the phase-modulated signal to output a resultant signal as a transmission signal. An amplitude control section supplies, to the amplifier section, a voltage controlled in accordance with an AC component represented by a fluctuation component of the amplitude data and a DC component represented by an average value level of the fluctuation component of the amplitude data.

摘要翻译： 传输电路以高效率和低失真工作。 幅度和相位提取部分从输入数据中提取振幅数据和相位数据。 相位调制部对相位数据进行相位调制，输出合成信号作为相位调制信号。 放大器部分放大相位调制信号以输出结果信号作为发送信号。 幅度控制部分向放大器部分提供根据由振幅数据的波动分量表示的AC分量和由振幅数据的波动分量的平均值电平表示的DC分量控制的电压。

公开(公告)号：US07609123B2

公开(公告)日：2009-10-27

申请号：US11953345

申请日：2007-12-10

申请人： Masakatsu Maeda

发明人： Masakatsu Maeda

IPC分类号： H03B5/12 ,  H03C3/22 ,  H03L1/00

CPC分类号： H03C3/225 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1253

摘要： Transistors M11 and M12 are cross-coupled to each other so as to form a negative resistance circuit. First and second variable capacitor sections 10 and 20 are connected in parallel with an inductor circuit so as to form a parallel resonant circuit. A first reference voltage Vref1 and a control voltage VT1 corresponding to a carrier wave component are fed to both terminals, respectively, of each of variable capacitors VC11 and VC12 included in the first variable capacitor section 10. A second reference voltage Vref2 and a control voltage VT2 corresponding to a modulated wave component are fed to both terminals, respectively, of each of variable capacitors VC21 and VC22 included in the second variable capacitor section 20. A DC control section 30 includes a resistance R31 interposed between the second reference voltage Vref2 and a common connection point of resistances R21 and R22, and a capacitor C31 for feeding only an AC component included in the modulated wave component to the common connection point of the resistances R21 and R22. Thus, a DC voltage, on which the AC component included in the modulated wave component is superimposed, is changed from a certain DC bias to a DC bias of the second reference voltage Vref2.

摘要翻译： 晶体管M11和M12彼此交叉耦合，以形成负电阻电路。 第一和第二可变电容器部分10和20与电感器电路并联连接以形成并联谐振电路。 对应于载波分量的第一参考电压Vref1和控制电压VT1分别馈送到包括在第一可变电容器部分10中的每个可变电容器VC11和VC12的两个端子。第二参考电压Vref2和控制电压 对应于调制波分量的VT2分别馈送到包括在第二可变电容器部分20中的每个可变电容器VC21和VC22的两个端子.DC控制部分30包括插入在第二参考电压Vref2和 电阻R21和R22的公共连接点，以及用于仅将包含在调制波分量中的交流分量馈送到电阻R21和R22的公共连接点的电容器C31。 因此，将包含在调制波分量中的交流分量叠加在其上的直流电压从一定的直流偏压改变为第二基准电压Vref2的直流偏压。

公开(公告)号：US20090233435A1

公开(公告)日：2009-09-17

申请号：US12440939

申请日：2007-09-21

申请人： Akira Kawahashi ,  Masahiro Sugimoto ,  Akinori Seki ,  Masakatsu Maeda ,  Yasuo Takahashi

发明人： Akira Kawahashi ,  Masahiro Sugimoto ,  Akinori Seki ,  Masakatsu Maeda ,  Yasuo Takahashi

IPC分类号： H01L21/285

CPC分类号： H01L29/7802 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/78 ,  Y10S438/931

摘要： A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature. As a result of this step of further heating the SiC substrate reacts with Al3Ti of the Al3Ti-layer to form a Ti3SiC2-layer on the surface of the SiC substrate.

摘要翻译： 阐述了在SiC半导体层上形成具有良好特性的欧姆电极的方法。 在该方法中，在SiC衬底的表面上形成Ti层和Al层。 具有Ti层和Al层的SiC衬底保持在高于或等于第一温度并低于第二温度的温度，直到Ti层中的所有Ti都与Al反应。 第一个温度是Ti与Al反应形成Al3Ti的温度区的最低温度，第二个温度是Al3Ti与SiC反应形成Ti3SiC2的温度区的最低温度。 由于这种维持温度步骤的结果，在SiC衬底的表面上形成Al 3 Ti层。 该方法还包括将具有Al 3 Ti层的SiC衬底进一步加热到高于第二温度的温度。 作为进一步加热的步骤的结果，SiC衬底与Al 3 Ti层的Al 3 Ti反应以在SiC衬底的表面上形成Ti 3 SiC 2层。

公开(公告)号：US20080145518A1

公开(公告)日：2008-06-19

申请号：US11791595

申请日：2005-11-18

申请人： Masakatsu Maeda ,  Yasuyuki Yamamoto ,  Kunihiro Gotoh

发明人： Masakatsu Maeda ,  Yasuyuki Yamamoto ,  Kunihiro Gotoh

IPC分类号： B05D5/12

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/017 ,  H01L2924/00

摘要： An element-mounting substrate includes a ceramic substrate, an electrode layer formed on the substrate and a ceramic coating layer which is formed on a part of the electrode layer and has a thickness of 5 to 50 μm. A process for producing the element-mounting substrate includes the steps of forming an electrode precursor layer in the shape of a pattern of an electrode layer on a ceramic plate or a green sheet of a large diameter, forming a ceramic coating precursor layer on a part of the electrode precursor layer and then firing the resulting precursor. In this process, it is preferable to form the ceramic coating layer so as to cover the electrode layer on a predetermined cutting line of the firing product. According to the element-mounting substrate in which a part of the electrode layer is covered with a ceramic, a failure in mounting an element attributable to the thickness of the ceramic coating layer can be prevented when the element is mounted. In addition, peeling or cracking of the electrode layer caused by impact during dicing can be prevented.

摘要翻译： 元件安装衬底包括陶瓷衬底，形成在衬底上的电极层和形成在电极层的一部分上并具有5至50μm厚度的陶瓷涂层。 一种用于制造元件安装基板的方法包括以下步骤：在陶瓷板或大直径的生片上形成电极层图案形状的电极前体层，在部件上形成陶瓷涂层前体层 的电极前体层，然后烧结所得的前体。 在该方法中，优选形成陶瓷被覆层，以覆盖烧制品的规定切断线上的电极层。 根据其中电极层的一部分被陶瓷覆盖的元件安装基板，当安装元件时，可以防止由于陶瓷涂层的厚度而导致的元件的安装失败。 此外，可以防止由切割期间的冲击引起的电极层的剥离或破裂。

公开(公告)号：US07193484B2

公开(公告)日：2007-03-20

申请号：US11097863

申请日：2005-04-01

申请人： Masakatsu Maeda

发明人： Masakatsu Maeda

IPC分类号： H03B5/12

CPC分类号： H03B5/1228 ,  H03B5/1215 ,  H03B5/1243 ,  H03B5/1265

摘要： A voltage controlled oscillator apparatus includes at least two voltage controlled oscillators, each of the voltage controlled oscillators being formed on a semiconductor substrate and having an LC-resonant circuit including a three-terminal inductor or a two-terminal inductor, and a continuously variable capacitor, and an amplifier including n-channel transistors or n-channel transistors and p-channel transistors. Two of the three-terminal or two-terminal inductors constructing the first and second voltage controlled oscillators have a coil shape formed with a wiring layer of an integrated circuit formed on the semiconductor substrate, and one of the three-terminal or two-terminal inductors has such a shape that its inductance value differs from that of the other of the three-terminal or two-terminal inductors, and is disposed in a region inside of the other of the three-terminal or two-terminal inductors with respect to its planar shape. Broadband in oscillation frequencies can be achieved while avoiding deterioration of the phase noise characteristics and enlarged chip sizes.

摘要翻译： 压控振荡器装置包括至少两个压控振荡器，每个压控振荡器形成在半导体衬底上并具有包括三端电感器或两端电感器的LC谐振电路，以及连续可变电容器 以及包括n沟道晶体管或n沟道晶体管和p沟道晶体管的放大器。 构成第一和第二压控振荡器的三端或二端电感器中的两个具有形成有形成在半导体衬底上的集成电路的布线层的线圈形状，并且三端或两端电感器 具有这样的形状，即其电感值与三端子或两端子电感器的电感值不同，并且设置在三端子或两端子电感器的另一个内侧的区域相对于其平面 形状。 可以实现振荡频率的宽带，同时避免相位噪声特性的恶化和芯片尺寸的扩大。

公开(公告)号：US20060115036A1

公开(公告)日：2006-06-01

申请号：US11333245

申请日：2006-01-18

申请人： Hisashi Adachi ,  Toshifumi Nakatani ,  Hiroaki Kosugi ,  Masakatsu Maeda ,  Shunsuke Hirano

发明人： Hisashi Adachi ,  Toshifumi Nakatani ,  Hiroaki Kosugi ,  Masakatsu Maeda ,  Shunsuke Hirano

IPC分类号： H03D3/24

CPC分类号： H03L7/1976

摘要： A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

摘要翻译： 包括PLL电路的频率合成器装置的分数部分控制电路是用于控制与PLL电路的可变分频器分频的分数部分的多n-Δ级Δ-Σ调制器电路。 加法器将分数部分的数据与来自乘法器的输出数据相加，并将结果数据通过二阶积分器输出到量化器。 量化器用量化步长量化输入数据，并通过反馈电路将量化的数据输出到乘法器。 量化数据用作受控分数部分的数据。 乘法器将来自反馈电路的数据乘以量化步长，并将结果数据输出到加法器。 分数部分控制电路周期性地改变分数部分的数据，从而根据周期的平均值设置来自VCO的输出信号的频率。