公开(公告)号：US07462857B2

公开(公告)日：2008-12-09

申请号：US10528052

申请日：2003-09-18

申请人： Nobutoshi Arai ,  Hiroshi Iwata ,  Seizo Kakimoto

发明人： Nobutoshi Arai ,  Hiroshi Iwata ,  Seizo Kakimoto

IPC分类号： H01L29/02

CPC分类号： H01L29/8615 ,  G11C13/0004 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/10 ,  H01L45/1206 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/1608 ,  Y10S438/90

摘要： A resistance-changing function body includes an object made of a first substance and interposed between a first electrode and a second electrode, and a plurality of particles made of a second substance and arranged within the object so that an electrical resistance between the first electrode and the second electrode is changed before and after application of a specified voltage to between the first electrode and the second electrode. The first substance makes an electrical barrier against the second substance. With this constitution, by applying a specified voltage to between the first electrode and the second electrode, the electrical resistance can be changed depending on a state of the particles made of the second substance. Also, by virtue of a simple structure, a resistance-changing function body of small size is provided with low cost.

摘要翻译： 电阻变化功能体包括由第一物质制成的物体，介于第一电极和第二电极之间，以及多个由第二物质制成的颗粒并且布置在物体内，使得第一电极和第二电极之间的电阻 在第一电极和第二电极之间施加指定电压之前和之后改变第二电极。 第一物质对第二物质产生电阻。 利用这种结构，通过在第一电极和第二电极之间施加规定的电压，可以根据由第二物质制成的粒子的状态来改变电阻。 另外，由于结构简单，所以以低成本提供小尺寸的电阻变化功能体。

公开(公告)号：US07315603B2

公开(公告)日：2008-01-01

申请号：US10848312

申请日：2004-05-19

申请人： Yasuaki Iwase ,  Yoshifumi Yaoi ,  Hiroshi Iwata ,  Akihide Shibata ,  Yoshinao Morikawa ,  Masaru Nawaki

发明人： Yasuaki Iwase ,  Yoshifumi Yaoi ,  Hiroshi Iwata ,  Akihide Shibata ,  Yoshinao Morikawa ,  Masaru Nawaki

IPC分类号： G11C8/00

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  G11C7/24 ,  G11C16/0458 ,  G11C16/0475 ,  G11C16/22 ,  G11C2216/06 ,  H01L21/28282 ,  H01L21/28291 ,  H01L29/42384 ,  H01L29/792

摘要： There is provided a semiconductor storage device and portable electronic equipment including a nonvolatile memory element that can easily be miniaturized. The semiconductor storage device includes a memory cell array 21 in which a plurality of memory elements 1 are arranged and a write state machine 32. The memory element 1 includes a gate electrode 104 formed on a semiconductor layer 102 via a gate insulator 103, a channel region arranged below the gate electrode 104, diffusion regions 107a, 107b that are located on both sides of the channel region and have a conductive type opposite to that of the channel region and memory function bodies 109 that are located on both sides of the gate electrode 104 and have a function to retain electric charge. The write state machine 32 can selectively prevent program and erase of data in the memory elements within a predetermined range.

摘要翻译： 提供了一种包括易于小型化的非易失性存储元件的半导体存储装置和便携式电子设备。 半导体存储装置包括其中布置有多个存储元件1的存储单元阵列21和写入状态机32。 存储元件1包括通过栅极绝缘体103形成在半导体层102上的栅电极104，布置在栅电极104下方的沟道区，位于沟道区两侧的扩散区107a，107b，并具有 与沟道区域和记忆功能体109相对的导电类型，其位于栅极电极104的两侧并具有保持电荷的功能。 写状态机32可以选择性地防止在预定范围内的存储器元件中的数据的编程和擦除。

公开(公告)号：US07315060B2

公开(公告)日：2008-01-01

申请号：US11142770

申请日：2005-06-02

申请人： Hiroshi Iwata ,  Akihide Shibata ,  Kotaro Kataoka ,  Masayuki Nakano

发明人： Hiroshi Iwata ,  Akihide Shibata ,  Kotaro Kataoka ,  Masayuki Nakano

IPC分类号： H01L29/792

CPC分类号： H01L29/6684 ,  G11C16/0475 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/28291 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7923

摘要： A semiconductor storage device has a single gate electrode formed on a semiconductor substrate through a gate insulation film. First and second memory function bodies formed on both sides of the gate electrode. A P-type channel region is formed in a surface of the substrate on the side of the gate electrode. N-type first and second diffusion regions are formed on both sides of the channel region. The channel region is composed of an offset region located under the first and second memory function bodies and a gate electrode beneath region located under the gate electrode. The concentration of a dopant which imparts a P-type conductivity to the offset region is effectively lower than the concentration of a dopant which imparts the P-type conductivity to the gate electrode beneath region. This makes it possible to provide the semiconductor storage device which is easily shrunk in scale.

摘要翻译： 半导体存储器件具有通过栅极绝缘膜形成在半导体衬底上的单个栅电极。 形成在栅电极两侧的第一和第二记忆功能体。 在栅极侧的基板的表面形成P型沟道区。 在沟道区域的两侧形成N型第一和第二扩散区域。 沟道区域由位于第一和第二存储器功能体下面的偏移区域和位于栅电极下方的栅极电极构成。 赋予偏移区域的P型导电性的掺杂剂的浓度有效地低于向区域下方的栅电极施加P型导电性的掺杂剂的浓度。 这使得可以提供容易缩小的半导体存储装置。

公开(公告)号：US07301198B2

公开(公告)日：2007-11-27

申请号：US10842424

申请日：2004-05-11

申请人： Hiroshi Iwata ,  Takayuki Ogura ,  Akihide Shibata

发明人： Hiroshi Iwata ,  Takayuki Ogura ,  Akihide Shibata

IPC分类号： H01L29/792

CPC分类号： H01L27/11568 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/28291 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11521 ,  H01L27/11534 ,  H01L27/1159 ,  H01L27/1463 ,  H01L29/7923

摘要： A semiconductor switching element and a semiconductor storage element each have a gate electrode, a pair of source/drain regions and a channel forming region. Memory function bodies having a function of storing electric charges are provided on opposite sides of the gate electrode of the semiconductor storage element. In the semiconductor storage element, an amount of current that flows from one of the source/drain regions to the other of the source/drain regions upon application of a voltage to the gate electrode is variable depending on an amount of electric charges retained in the memory function body.

摘要翻译： 半导体开关元件和半导体存储元件各自具有栅极电极，一对源极/漏极区域和沟道形成区域。 具有存储电荷功能的记忆功能体设置在半导体存储元件的栅电极的相对侧上。 在半导体存储元件中，在向栅电极施加电压时，从源极/漏极区域中的一个流到源极/漏极区域中的一个的电流量根据保持在栅极电极中的电荷量而变化 记忆功能体。

公开(公告)号：US07262458B2

公开(公告)日：2007-08-28

申请号：US10844471

申请日：2004-05-13

申请人： Fumiyoshi Yoshioka ,  Akihide Shibata ,  Hiroshi Iwata

发明人： Fumiyoshi Yoshioka ,  Akihide Shibata ,  Hiroshi Iwata

IPC分类号： H01L29/788

CPC分类号： H01L29/66833 ,  H01L21/28282 ,  H01L29/6684

摘要： A semiconductor memory device includes: a gate electrode formed on a semiconductor layer via a gate insulating film; a channel region disposed under the gate electrode; diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region; and memory functional units formed on both sides of the gate electrode and having the function of retaining charges, wherein each of the diffusion regions has: a high-concentration impurity region disposed so as to be offset from the gate electrode; and a low-concentration impurity region disposed in contact with the high-concentration impurity region so as to overlap with the gate electrode, and an amount of current flowing from one of the diffusion regions to the other diffusion region is changed when a voltage is applied to the gate electrode in accordance with an amount of charges retained in the memory functional units.

摘要翻译： 半导体存储器件包括：栅电极，经栅极绝缘膜形成在半导体层上; 设置在所述栅电极下方的沟道区域; 扩散区域设置在沟道区域的两侧并且具有与沟道区域的导电类型相反的导电类型; 以及存储功能单元，其形成在所述栅极电极的两侧并且具有保持电荷的功能，其中每个扩散区具有：设置成偏离所述栅电极的高浓度杂质区; 以及与高浓度杂质区域接触以与栅电极重叠的低浓度杂质区域，并且当施加电压时改变从一个扩散区域流向另一个扩散区域的电流量 根据保存在存储功能单元中的电荷量向栅极施加电压。

公开(公告)号：US07238984B2

公开(公告)日：2007-07-03

申请号：US10826612

申请日：2004-04-19

申请人： Akihide Shibata ,  Hiroshi Iwata

发明人： Akihide Shibata ,  Hiroshi Iwata

IPC分类号： H01L29/792

CPC分类号： H01L27/11568 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/42332 ,  H01L29/66833 ,  H01L29/7887 ,  H01L29/7923 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor memory device includes a nonvolatile memory section; and a volatile memory section, wherein the nonvolatile memory section includes a nonvolatile memory cell having a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function for retaining charges.

摘要翻译： 半导体存储器件包括非易失性存储器部分; 以及易失性存储器部分，其中非易失性存储器部分包括具有通过栅极绝缘膜形成在半导体层上的栅电极的非易失性存储单元，设置在栅电极下方的沟道区，设置在沟道区两侧的扩散区 并且具有与沟道区的导电类型相反的导电类型，以及形成在栅电极的两侧上并具有保持电荷的功能的存储功能单元。

公开(公告)号：US07203118B2

公开(公告)日：2007-04-10

申请号：US10528997

申请日：2003-09-10

申请人： Yoshifumi Yaoi ,  Hiroshi Iwata ,  Akihide Shibata ,  Masaru Nawaki ,  Kei Tokui

发明人： Yoshifumi Yaoi ,  Hiroshi Iwata ,  Akihide Shibata ,  Masaru Nawaki ,  Kei Tokui

IPC分类号： G11C5/14

CPC分类号： H01L29/66825 ,  H01L21/28273 ,  H01L29/7887

摘要： When an input voltage determining circuit 24 determines that an input voltage exceeds a prescribed voltage, a control circuit 25 of a positive polarity power selector circuit 22 turns on a first switch SW1 and turns off second and third switches SW2 and SW3, thereby supplying the input voltage to a memory cell array 21 via the first switch SW1. When the input voltage determining circuit 24 determines that the input voltage is not higher than the prescribed voltage, the control circuit 25 turns off the first switch SW1 and turns on the second and third switches SW2 and SW3, thereby supplying a voltage from a charge pump 23 via the second and third switches SW2 and SW3. By this operation, the memory element is able to retain storage of two bits or more even if miniaturized, to execute stable operation with a small circuit area and to prevent circuit malfunction attributed to a small current supplied to the memory cell array.

摘要翻译： 当输入电压确定电路24确定输入电压超过规定电压时，正极性功率选择电路22的控制电路25接通第一开关SW 1并关断第二和第三开关SW 2和SW 3，由此 通过第一开关SW 1将输入电压提供给存储单元阵列21。 当输入电压确定电路24确定输入电压不高于规定电压时，控制电路25关闭第一开关SW 1并接通第二和第三开关SW 2和SW 3，从而提供来自 经由第二和第三开关SW 2和SW 3的电荷泵23。 通过该操作，即使小型化，存储元件也能够保持两位以上的存储，能够以较小的电路面积进行稳定的动作，并且防止归因于提供给存储单元阵列的小电流引起的电路故障。

公开(公告)号：US07187588B2

公开(公告)日：2007-03-06

申请号：US10506322

申请日：2003-03-03

申请人： Hiroshi Iwata ,  Akihide Shibata

发明人： Hiroshi Iwata ,  Akihide Shibata

IPC分类号： G11C16/04

CPC分类号： H01L29/7923

摘要： A semiconductor storage device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a single gate electrode formed on the gate insulating film, two charge holding portions formed on both sides of the gate electrode, source/drain regions respectively corresponding to the charge holding portions, and a channel region disposed under the single gate electrode. A memory function implemented by these two charge holding portions and a transistor operation function implemented by the gate insulating film is separated from each other for securing sufficient memory function as well as easily suppressing short channel effect by making the gate insulating film thinner.

摘要翻译： 半导体存储装置包括半导体衬底，形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的单个栅电极，形成在栅电极两侧的两个电荷保持部分，分别对应于 电荷保持部分和设置在单个栅电极下方的沟道区域。 通过这两个电荷保持部分实现的存储功能和由栅极绝缘膜实现的晶体管操作功能彼此分离，以确保足够的存储功能，并且通过使栅极绝缘膜更薄来容易地抑制短沟道效应。

公开(公告)号：US20070014122A1

公开(公告)日：2007-01-18

申请号：US11486046

申请日：2006-07-14

申请人： Koji Sakiyama ,  Hiroshi Iwata ,  Shigeru Yabuya ,  Takahiko Sato

发明人： Koji Sakiyama ,  Hiroshi Iwata ,  Shigeru Yabuya ,  Takahiko Sato

IPC分类号： B60Q1/26 ,  B60Q1/00

CPC分类号： B60Q1/323 ,  B60Q3/217 ,  B60Q3/64

摘要： An apparatus is provided that makes it possible to make following cars aware when a door is open and simultaneously illuminate a feet area, including, a lens that is attached at a door position that faces the feet area when a vehicle door is open, and a light guide member that is attached at a door position that faces following cars. One or more LEDs for the feet area are provided on the inner side of the lens, and one or more LEDs for the rear direction are provided that irradiate light on the light guide member.

摘要翻译： 提供了一种装置，其使得可以在门打开时使下一个车辆知道，同时照亮脚区域，包括当车门打开时附接在面向脚区域的门位置处的镜片，以及 导光构件，其安装在面向后续车辆的门位置。 用于脚部区域的一个或多个LED设置在透镜的内侧，并且提供一个或多个用于向后方向的LED，其将光照射在导光构件上。

公开(公告)号：US07110297B2

公开(公告)日：2006-09-19

申请号：US10851733

申请日：2004-05-20

申请人： Yoshinao Morikawa ,  Masaru Nawaki ,  Hiroshi Iwata ,  Akihide Shibata

发明人： Yoshinao Morikawa ,  Masaru Nawaki ,  Hiroshi Iwata ,  Akihide Shibata

IPC分类号： G11C11/34

CPC分类号： G11C16/26 ,  G11C11/5671 ,  G11C16/0475 ,  G11C16/10 ,  H01L29/7923

摘要： A semiconductor storage device is provided, which comprises a memory array comprising memory elements. Each memory element comprises a gate electrode, a channel region, first and second diffusion regions, and first and second memory function sections provided an opposite aides of the gate electrode and having a function of retaining charges. The device further comprises a row decoder for selecting a word line in accordance with a row address, and a write control circuit for applying a write pulse to a bit line, which is connected to one of the first and second diffusion regions of the memory element connected to the selected word line, in accordance with a column address. The write control circuit controls the application of the write pulse so that a quantity of charges retained in one of the first and second memory function sections corresponds to a value of multibit data.

摘要翻译： 提供一种半导体存储装置，其包括包括存储元件的存储器阵列。 每个存储元件包括栅电极，沟道区，第一和第二扩散区，以及第一和第二存储功能部分，其设置有栅电极的相对侧并具有保持电荷的功能。 该装置还包括用于根据行地址选择字线的行解码器和用于将写入脉冲施加到位线的写入控制电路，位线连接到存储元件的第一和第二扩散区域之一 根据列地址连接到所选字线。 写入控制电路控制写入脉冲的应用，使得保留在第一和第二存储器功能部分之一中的电荷量对应于多位数据的值。