Shift register and image display apparatus using the same
    31.
    发明授权
    Shift register and image display apparatus using the same 有权
    移位寄存器和使用其的图像显示装置

    公开(公告)号:US06909417B2

    公开(公告)日:2005-06-21

    申请号:US09578440

    申请日:2000-05-25

    IPC分类号: G11C19/00 G09G3/20 G09G3/36

    摘要: A level shifter 13 is provided for each of SR flip flops F1 constituting a shift register 11. The level shifter 13 increases a voltage of a clock signal CK. This arrangement reduces a distance for transmitting a clock signal whose voltage has been increased, as compared with a construction in which a voltage of a clock signal is increased by a single level shifter and the signal is transmitted to each of the flip flops; consequently, a load capacity of the level shifter can be smaller. Furthermore, each of the level shifters is operated during a pulse output of the previous level shifter 13, and the operation is suspended at the end of the pulse output. Thus, the level shifters 13 can operate only when it is necessary to apply a clock signal CK to the corresponding SR flip flop F1. As a result, even when an amplitude of a clock signal is small, it is possible to reduce power consumption of the shift resister under normal operation.

    摘要翻译: 为构成移位寄存器11的每个SR触发器F 1提供电平移位器13.电平移位器13增加时钟信号CK的电压。 与通过单个电平移位器增加时钟信号的电压并且将信号发送到每个触发器的结构相比,这种布置减少了用于传输电压已经增加的时钟信号的距离; 因此,电平转换器的负载能力可以更小。 此外,每个电平移位器在先前电平移位器13的脉冲输出期间操作,并且在脉冲输出结束时暂停操作。 因此,只有当需要对相应的SR触发器F 1施加时钟信号CK时,电平移位器13才能够工作。结果,即使当时钟信号的幅度小时,也可以降低功耗 的正常运行中的移位寄存器。

    Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices
    32.
    发明授权
    Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 有权
    移位寄存器电路,具有电路的图像显示装置以及LCD装置的驱动方法

    公开(公告)号:US06879313B1

    公开(公告)日:2005-04-12

    申请号:US09523511

    申请日:2000-03-10

    IPC分类号: G09G3/36 G11C19/28 G11C19/00

    摘要: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.

    摘要翻译: 移位寄存器电路包括串联连接的多个锁存电路,以顺序地将脉冲信号ST从一个传送到另一个,一个发送时钟信号CLK的时钟信号线以及执行时钟信号之间的电连接和断开的多个开关电路 线和多个锁存电路。 在接通移位寄存器时,至少一个开关电路将至少一个锁存电路与时钟信号线电断开。 在电源接通之后的初始化期间,时钟信号CLK的频率比正常运行期间低,并且在正常运行期间逐渐增大。

    Curtain-shield airbag clip and assemblies using the clip
    33.
    发明申请
    Curtain-shield airbag clip and assemblies using the clip 有权
    帘幕安全气囊夹和组件使用夹子

    公开(公告)号:US20050062263A1

    公开(公告)日:2005-03-24

    申请号:US10902568

    申请日:2004-07-30

    摘要: A clip for attaching a curtain-shield airbag to a body panel of a vehicle comprises a bushing and a pin. The bushing has a flange with a leg extending therefrom. A bore extends through the flange and into the leg for receiving the pin. Outer surfaces of the leg have engagement pieces with shoulders for coupling the bushing to edge regions of a body panel hole into which the leg is inserted. The pin and the bushing are capable of being coupled in a provisionally fixed condition or a permanently fixed condition. When the pin is partially inserted into the bore, the engagement pieces are permitted to flex inwardly of the bore, but when the pin is fully inserted, such inward flexing is prevented. The flange has a wall that provides a partition between the main airbag unit and the entrance hole of the bore in the flange.

    摘要翻译: 用于将幕帘安全气囊附接到车辆车身面板的夹子包括衬套和销。 衬套具有凸缘,该凸缘具有从其延伸的腿部。 孔延伸穿过凸缘并进入支腿以接收销。 腿的外表面具有带有肩部的接合件,用于将衬套连接到腿部插入其中的身体面板孔的边缘区域。 销和衬套能够在临时固定状态或永久固定状态下联接。 当销部分地插入孔中时,允许接合片向孔内向内弯曲,但是当销完全插入时,可防止这种向内弯曲。 凸缘具有壁,该壁在主气囊单元和法兰中的孔的入口孔之间提供隔板。

    Digital-to-analog conversion circuit and image display apparatus using the same
    34.
    发明授权
    Digital-to-analog conversion circuit and image display apparatus using the same 有权
    数模转换电路和使用其的图像显示装置

    公开(公告)号:US06853324B2

    公开(公告)日:2005-02-08

    申请号:US09952183

    申请日:2001-09-13

    摘要: A digital-to-analog conversion circuit of charge distribution type includes a plurality of capacitors having respective capacitances that increase in a sequential order, one end of the capacitors being commonly connected electrically. The circuit also includes a plurality of analog switches each for electrically connecting a reference potential corresponding to a digital signal inputted from outside to the other end of the corresponding capacitor. These analog switches have respective driving capacities that increase in a sequential order.

    摘要翻译: 电荷分配型的数模转换电路包括多个电容器,其具有各自依次增加的电容,电容器的一端电连接。 电路还包括多个模拟开关,每个模拟开关用于将与从外部输入的数字信号相对应的参考电位电连接到对应的电容器的另一端。 这些模拟开关具有按照顺序增加的各自的驱动能力。

    Shift register having a plurality of circuit blocks and image display
apparatus using the shift register
    36.
    发明授权
    Shift register having a plurality of circuit blocks and image display apparatus using the shift register 失效
    具有多个电路块的移位寄存器和使用移位寄存器的图像显示装置

    公开(公告)号:US5990857A

    公开(公告)日:1999-11-23

    申请号:US841585

    申请日:1997-04-30

    IPC分类号: G09G3/20 G09G3/36 G11C19/00

    摘要: The shift register of this invention for sequentially transferring a digital signal in synchronization with a clock signal includes: a plurality of circuit blocks connected in series, each including a prescribed number of sequential latch circuits, each latch circuit outputting a signal corresponding to an input signal based on the clock signal; and a plurality of clock signal control circuits provided for the respective circuit blocks for controlling the supply of the clock signal to the latch circuits in the corresponding circuit blocks, wherein the control of the supply of the clock signal by each clock signal control circuit to the latch circuits in the corresponding circuit block is conducted in response to output signals from prescribed latch circuits in the circuit blocks preceding and subsequent to the corresponding circuit block.

    摘要翻译: 本发明的用于与时钟信号同步地顺序传送数字信号的移位寄存器包括:串联连接的多个电路块,每个电路块包括规定数量的顺序锁存电路,每个锁存电路输出对应于输入信号的信号 基于时钟信号; 以及多个时钟信号控制电路,用于各个电路块,用于控制向对应的电路块中的锁存电路提供时钟信号,其中控制由每个时钟信号控制电路将时钟信号提供给 响应于相应电路块之前和之后的电路块中来自规定的锁存电路的输出信号,进行相应电路块中的锁存电路。

    Image display apparatus
    37.
    发明授权
    Image display apparatus 失效
    图像显示装置

    公开(公告)号:US5926158A

    公开(公告)日:1999-07-20

    申请号:US610128

    申请日:1996-02-29

    摘要: An active matrix type image display apparatus which includes: a plurality of data signal lines; a plurality of scanning signal lines crossing the plurality of data signal lines; and a plurality of pixel portions disposed in a matrix in areas enclosed by the plurality of data signal lines and the plurality of scanning signal lines, wherein each of the plurality of pixel portions includes: a pixel capacitor for storing electric charge supplied from at least one of the plurality of data signal lines, to display an image; storage unit connected to the pixel capacitor; and switching unit which alternately selects one of an operation for electrically connecting the pixel capacitor to the storage unit and an operation for electrically disconnecting the pixel capacitor from the storage unit.

    摘要翻译: 一种有源矩阵型图像显示装置,包括:多条数据信号线; 与所述多条数据信号线交叉的多条扫描信号线; 以及由多个数据信号线和多条扫描信号线包围的区域中矩阵地配置的多个像素部,其中,所述多个像素部分中的每一个包括:像素电容器,用于存储从至少一个 的多个数据信号线,以显示图像; 存储单元连接到像素电容器; 以及切换单元,其交替地选择用于将像素电容器电连接到存储单元的操作中的一个以及用于将像素电容器与存储单元电气断开的操作。

    Solid impeller for centrifugal pumps
    38.
    发明授权
    Solid impeller for centrifugal pumps 失效
    离心泵固体叶轮

    公开(公告)号:US5540550A

    公开(公告)日:1996-07-30

    申请号:US346688

    申请日:1994-11-30

    申请人: Yasushi Kubota

    发明人: Yasushi Kubota

    IPC分类号: F04D29/22

    CPC分类号: F04D29/2277 F04D29/2255

    摘要: A solid impeller is disclosed having a disk-shaped impeller body having an inlet section extending along the impeller axis of rotation. A plurality of discharge passages extend radially and having inlet and discharge ports. The inlet port has an opening verge face which is oblique to the rotational axis. The solid impeller may also comprise a disk-shaped impeller body having an inlet section extending along the axis of rotation of the impeller and plural discharge passages extending radially. It further has inlet and discharge ports which have a tapered shape so that the section area of the discharge passage is gradually reduced in the outward direction. The thickness of the body is also gradually reduced in the outward direction. The solid impeller may also comprise a cylindrically-shaped center body and plural arms on a peripheral surface of the body. These extend radially in an outward direction from the body and include a discharge passage which extends along a longitudinal direction of the arm.

    摘要翻译: 公开了一种固体叶轮,其具有盘形叶轮本体,其具有沿着叶轮转动轴线延伸的入口部分。 多个排放通道径向延伸并具有入口和排出口。 入口具有与旋转轴线倾斜的开口边缘面。 固体叶轮还可以包括具有沿着叶轮的旋转轴线延伸的入口部分的多个圆盘形叶轮本体,并且径向延伸的多个排出通道。 还具有入口排出口,其具有锥形形状,使得排出通道的截面积在向外方向上逐渐减小。 身体的厚度也在向外的方向上逐渐减小。 固体叶轮还可以包括圆柱形中心体和位于主体的外周表面上的多个臂。 它们从主体沿向外的方向径向地延伸并且包括沿着臂的纵向方向延伸的排放通道。

    Digital to analogue converter
    39.
    发明授权
    Digital to analogue converter 失效
    数模转换器

    公开(公告)号:US07741985B2

    公开(公告)日:2010-06-22

    申请号:US11793522

    申请日:2006-01-11

    IPC分类号: H03M1/66

    CPC分类号: H03M1/802

    摘要: A digital/analogue converter for converting an input n-bit digital code, where n is an integer greater than one, has an n-bit digital input and an output for connection to a load, and includes: an array of (n−1) switched capacitors; and a switching arrangement. In one example embodiment, the switching arrangement is adapted, in a zeroing phase of operation, to connect a first reference voltage to the first plate of at least one capacitor of the array and to connect a second plate of the at least one capacitor to a voltage that, for at least one value of the input digital code, is different from the first reference voltage and is further adapted, in a decoding phase of operation, to enable, dependent on the value of the input digital code, injection of charge into the at least one capacitor. In one example embodiment, the converter may be a bufferless converter having an output for direct connection to a capacitive load.

    摘要翻译: 一种数字/模拟转换器,用于转换其中n是大于1的整数的输入n位数字码,具有n位数字输入和用于连接到负载的输出,并且包括:(n-1) )开关电容器; 和切换装置。 在一个示例性实施例中,切换装置在操作的归零阶段适于将第一参考电压连接到阵列的至少一个电容器的第一板,并将至少一个电容器的第二板连接到 电压,对于输入数字代码的至少一个值,与第一参考电压不同,并且在操作的解码阶段中进一步适应于使得能够依赖于输入数字代码的值将电荷注入 所述至少一个电容器。 在一个示例性实施例中,转换器可以是具有用于直接连接到电容性负载的输出的无缓冲转换器。

    Image display device and driving method thereof
    40.
    发明授权
    Image display device and driving method thereof 有权
    图像显示装置及其驱动方法

    公开(公告)号:US07663613B2

    公开(公告)日:2010-02-16

    申请号:US10159288

    申请日:2002-06-03

    IPC分类号: G09G5/00 G06F3/038

    摘要: An occupying area of a digital system signal line driver circuit in an image display device is large and this hinders the miniaturization of the display device. A memory circuit and a D/A converter circuit in the signal line driver circuit are commonly used for n (“n” is a natural number equal to or larger than 2) signal lines. One horizontal scanning period is divided into n periods and the memory circuit and the D/A converter circuit each perform processing for different signal lines during each of the divided periods. Thus, all the signal lines can be driven. Therefore, the number of memory circuits and the number of D/A converter circuits in the signal line driver circuit can be reduced to one n-th in a conventional case.

    摘要翻译: 图像显示装置中的数字系统信号线驱动电路的占有面积大,妨碍显示装置的小型化。 信号线驱动电路中的存储电路和D / A转换电路通常用于n(“n”是等于或大于2的自然数)的信号线。 一个水平扫描周期被分为n个周期,并且存储器电路和D / A转换器电路在每个分割周期期间各自执行不同信号线的处理。 因此,可以驱动所有的信号线。 因此,在常规情况下,信号线驱动电路中的存储电路数量和D / A转换电路的数量可以减少到1 / n。