公开(公告)号：US07081776B2

公开(公告)日：2006-07-25

申请号：US11057143

申请日：2005-02-15

申请人： Kenta Kato ,  Satoru Kawamoto

发明人： Kenta Kato ,  Satoru Kawamoto

IPC分类号： H03K5/22 ,  H03K5/153

CPC分类号： H03K5/08 ,  G01R19/16519 ,  G11C5/143 ,  G11C16/30

摘要： A voltage detection circuit for accurately detecting a voltage while suppressing the voltage fluctuation due to the off-leak current of a transistor. The voltage detection circuit includes first and second capacitors, first and second transistors, a comparator, and a control circuit. The capacitors are connected in series to generate a division voltage corresponding to a high voltage by the capacitors. The potential at a node between the first capacitor and the second capacitor is reset to ground potential when the transistors are activated. When the potential at the node reaches a predetermined potential, the first transistor is inactivated, and then the second transistor is inactivated.

摘要翻译： 一种电压检测电路，用于在抑制由晶体管的漏电流引起的电压波动的同时精确地检测电压。 电压检测电路包括第一和第二电容器，第一和第二晶体管，比较器和控制电路。 电容器串联连接以产生对应于电容器的高电压的分压。 当晶体管被激活时，第一电容器和第二电容器之间的节点处的电位被复位为接地电位。 当节点处的电位达到预定电位时，第一晶体管失活，然后第二晶体管失活。

公开(公告)号：US20060152291A1

公开(公告)日：2006-07-13

申请号：US11372146

申请日：2006-03-10

申请人： Yasushige Ogawa ,  Satoru Kawamoto

发明人： Yasushige Ogawa ,  Satoru Kawamoto

IPC分类号： H03L7/00

CPC分类号： G06F1/04 ,  G11C7/22 ,  G11C7/222 ,  G11C11/406 ,  G11C11/4074 ,  G11C2207/2227 ,  G11C2211/4067 ,  H03K3/012 ,  H03K3/014 ,  H03K3/0315 ,  H03K5/1252 ,  H03K5/19 ,  H03L3/00

摘要： There is provided an oscillator circuit capable of obtaining stable frequency by avoiding output having unstable frequency that is likely to occur to an operation/stop-control-feasible type oscillator circuit when oscillation begins. In such an oscillator circuit, an oscillation permitting signal (EN) sets an oscillator section in oscillation-operable state, whereby a controller section starts operation. The controller section that has stared its operation change an oscillation- frequency control signal (VR) into a signal value corresponding to predetermined oscillation frequency so as to set oscillation frequency at an oscillator section. Further on, the oscillator section outputs an oscillation signal in response to a detection signal (MON) that is outputted after a detector section compares a signal inputted therein with a predetermined signal value and detects that the inputted signal reaches a predetermined signal value. Thereby, transient state of an oscillation-frequency control signal (VR) can be detected. That is, there can be avoided an output of an unstable oscillation signal due to a transient oscillation-frequency control signal (VR).

公开(公告)号：US20060044919A1

公开(公告)日：2006-03-02

申请号：US11215889

申请日：2005-08-30

申请人： Hideho Taoka ,  Yoshihiro Suzumura ,  Kanji Hirano ,  Satoru Kawamoto

发明人： Hideho Taoka ,  Yoshihiro Suzumura ,  Kanji Hirano ,  Satoru Kawamoto

IPC分类号： G11C8/00

CPC分类号： G11C16/16 ,  G11C16/107 ,  G11C16/3409 ,  G11C16/3445 ,  G11C16/3468 ,  G11C2216/18

摘要： During an erasing sequence, after a preprogram operation (S1), an erasing operation (S3), and an APDE operation (S5) are executed and confirmation by an APDE verify operation (S6: P) and confirmation by an erase-verify operation (S7: P) are completed, step A is executed prior to a soft-program operation (S10) of a plurality of memory cells. A dummy memory cell program operation (S8) is continuously executed until a completion of a program operation is confirmed by a dummy memory cell program verify operation (S9). By execution of the program operation on the dummy memory cells, a voltage stress similar to that of a program operation is applied to memory cells in an over-erased state via bit lines. Thereby, the over-erased state is reduced thereby lowering a column leak current. Erroneous recognition during a soft-program verify operation (S11) can be prevented, and excessive soft-programming can be avoided.

摘要翻译： 在擦除顺序期间，在预编程操作（S1）之后，执行擦除操作（S 3）和APDE操作（S 5）并通过APDE验证操作（S 6：P）进行确认并通过擦除确认 （S 7：P）完成时，在多个存储单元的软编程操作（S10）之前执行步骤A. 连续执行虚拟存储器单元编程操作（S 8），直到通过虚拟存储器单元程序验证操作确认完成编程操作（S 9）。 通过对虚拟存储单元执行程序操作，通过位线将与程序操作类似的电压应力施加于过擦除状态的存储单元。 因此，过擦除状态被降低，从而降低列泄漏电流。 可以防止在软程序验证操作期间的错误识别（S11），并且可以避免过多的软编程。

公开(公告)号：US06185137B2

公开(公告)日：2001-02-06

申请号：US09457370

申请日：1999-12-09

申请人： Hajime Sato ,  Satoru Kawamoto

发明人： Hajime Sato ,  Satoru Kawamoto

IPC分类号： G11C700

CPC分类号： G11C7/12 ,  G11C11/406 ,  G11C11/409

摘要： A memory device, such as a DRAM, includes multiple cell blocks, each having bit lines and word lines. Block control circuits are connected to respective ones of the cell blocks. The block control circuits supply a precharge signals to their associated cell blocks. A block control circuit which is connected to a defective cell block generates a precharge signal having a precharge level of the bit lines and a reset level of the word lines in accordance with an access condition of the defective cell block. The block control circuit sets the precharge signal to the precharge level when the defective cell block is activated and to the reset level when it is deactivated.

摘要翻译： 诸如DRAM的存储器件包括多个单元块，每个单元块具有位线和字线。 块控制电路连接到相应的单元块。 块控制电路向其相关联的单元块提供预充电信号。 连接到不良单元块的块控制电路根据缺陷单元块的访问条件生成具有位线的预充电电平和字线的复位电平的预充电信号。 当有缺陷的单元块被激活时，块控制电路将预充电信号设置为预充电电平，并且在停用时将其设置为复位电平。

公开(公告)号：US6084384A

公开(公告)日：2000-07-04

申请号：US260130

申请日：1999-03-01

申请人： Satoru Kawamoto ,  Tsukasa Kaneko ,  Yasumitsu Tanaka

发明人： Satoru Kawamoto ,  Tsukasa Kaneko ,  Yasumitsu Tanaka

IPC分类号： B60R16/033 ,  B60L1/00 ,  H02J7/00 ,  H02J7/14 ,  G05F1/56 ,  H02G3/00

CPC分类号： H02J7/0063 ,  B60L1/00 ,  H02J7/1438

摘要： A compact power supply circuit which can supply power to various apparatuses and circuits with a high degree of stability. A primary constant voltage circuit is connected to a second power supply line, which is supplied with power from a battery only when a relay is closed. The circuit supplies power to a third power supply line at a constant primary voltage. An auxiliary constant voltage circuit is connected to a first power supply line, which is always supplied with power from the battery for supplying power to the third power supply line at a constant auxiliary voltage lower than the primary voltage. A halt control circuit enables the operation of the auxiliary constant voltage circuit if power is supplied to the second power supply line and disables the operation of the auxiliary constant voltage circuit if the supply of power is interrupted for a period equal to or longer than a predetermined allowable time. The supply of power to the third power supply line is continued by the auxiliary constant voltage circuit if the temporary interruption of the supply of power to the second power supply line is within the allowable time.

摘要翻译： 能够以高稳定性向各种装置和电路供电的小型电源电路。 初级恒压电路连接到第二电源线，仅在继电器闭合时由电池从电池供电。 该电路以恒定的一次电压向第三电源线供电。 辅助恒压电路连接到第一电源线，该第一电源线总是以比初级电压低的恒定辅助电压从电池向第三电源线供电的电力供电。 如果向第二电源线提供电力，则停止控制电路能够操作辅助恒压电路，并且如果电力供应在等于或大于预定的时间段的情况下被中断，则禁止辅助恒压电路的操作 允许时间。 如果向第二电源线供电的暂时中断在允许时间内，则通过辅助恒压电路继续向第三电源线供电。

公开(公告)号：US07675801B2

公开(公告)日：2010-03-09

申请号：US12273269

申请日：2008-11-18

申请人： Hajime Sato ,  Yuji Nakagawa ,  Satoru Kawamoto

发明人： Hajime Sato ,  Yuji Nakagawa ,  Satoru Kawamoto

IPC分类号： G11C7/00

CPC分类号： G11C7/02 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/4085 ,  G11C2211/4065 ,  G11C2211/4068

摘要： A refresh method for a semiconductor memory device features high noise resistance, lower power consumption, and lower cost. All word lines of one or more memory cell blocks that have not been selected in a self refresh mode are controlled to have a floating potential substantially at ground level. Even when a word line and a bit line are short-circuited, this control prevents destruction of memory cell information, which may be caused by noise, and also prevents generation of leakage current. A fuse, etc., for preventing generation of leakage current is unnecessary, so that lower cost is realized.

摘要翻译： 用于半导体存储器件的刷新方法具有高抗噪性，较低的功耗和较低的成本。 在自刷新模式中未被选择的一个或多个存储单元块的所有字线被控制为具有基本上处于地平面的浮动电位。 即使当字线和位线短路时，该控制也可以防止可能由噪声引起的存储单元信息的破坏，并且还防止漏电流的产生。 不需要用于防止产生泄漏电流的保险丝等，从而实现较低的成本。

公开(公告)号：US07492232B2

公开(公告)日：2009-02-17

申请号：US11802637

申请日：2007-05-24

申请人： Yasushige Ogawa ,  Satoru Kawamoto

发明人： Yasushige Ogawa ,  Satoru Kawamoto

IPC分类号： H03B1/00 ,  H03B5/00 ,  H03B5/24

CPC分类号： G06F1/04 ,  G11C7/22 ,  G11C7/222 ,  G11C11/406 ,  G11C11/4074 ,  G11C2207/2227 ,  G11C2211/4067 ,  H03K3/012 ,  H03K3/014 ,  H03K3/0315 ,  H03K5/1252 ,  H03K5/19 ,  H03L3/00

摘要： There is provided an oscillator circuit capable of obtaining stable frequency by avoiding output having unstable frequency that is likely to occur to an operation/stop-control-feasible type oscillator circuit when oscillation begins. In such an oscillator circuit, an oscillation permitting signal (EN) sets an oscillator section in oscillation-operable state, whereby a controller section starts operation. The controller section that has stared its operation change an oscillation- frequency control signal (VR) into a signal value corresponding to predetermined oscillation frequency so as to set oscillation frequency at an oscillator section. Further on, the oscillator section outputs an oscillation signal in response to a detection signal (MON) that is outputted after a detector section compares a signal inputted therein with a predetermined signal value and detects that the inputted signal reaches a predetermined signal value. Thereby, transient state of an oscillation-frequency control signal (VR) can be detected. That is, there can be avoided an output of an unstable oscillation signal due to a transient oscillation-frequency control signal (VR).

摘要翻译： 提供了一种振荡器电路，其能够通过在振荡开始时避免可能发生在操作/停止控制可行型振荡器电路的频率不稳定的输出而获得稳定的频率。 在这种振荡电路中，振荡允许信号（EN）将振荡器部分置于振荡可操作状态，由此控制器部分开始工作。 已经看到其操作的控制器部分将振荡频率控制信号（VR）改变成对应于预定振荡频率的信号值，以便在振荡器部分设置振荡频率。 此外，振荡器部分响应于在检测器部分将输入的信号与预定信号值进行比较之后输出的检测信号（MON）输出振荡信号，并检测输入信号达到预定信号值。 由此，可以检测振荡频率控制信号（VR）的瞬态。 也就是说，可以避免由于瞬态振荡频率控制信号（VR）引起的不稳定振荡​​信号的输出。

公开(公告)号：US07239210B2

公开(公告)日：2007-07-03

申请号：US11372146

申请日：2006-03-10

申请人： Yasushige Ogawa ,  Satoru Kawamoto

发明人： Yasushige Ogawa ,  Satoru Kawamoto

IPC分类号： H03B5/00

CPC分类号： G06F1/04 ,  G11C7/22 ,  G11C7/222 ,  G11C11/406 ,  G11C11/4074 ,  G11C2207/2227 ,  G11C2211/4067 ,  H03K3/012 ,  H03K3/014 ,  H03K3/0315 ,  H03K5/1252 ,  H03K5/19 ,  H03L3/00

摘要： There is provided an oscillator circuit capable of obtaining stable frequency by avoiding output having unstable frequency that is likely to occur to an operation/stop-control-feasible type oscillator circuit when oscillation begins. In such an oscillator circuit, an oscillation permitting signal (EN) sets an oscillator section in oscillation-operable state, whereby a controller section starts operation. The controller section that has stared its operation change an oscillation-frequency control signal (VR) into a signal value corresponding to predetermined oscillation frequency so as to set oscillation frequency at an oscillator section. Further on, the oscillator section outputs an oscillation signal in response to a detection signal (MON) that is outputted after a detector section compares a signal inputted therein with a predetermined signal value and detects that the inputted signal reaches a predetermined signal value. Thereby, transient state of an oscillation-frequency control signal (VR) can be detected. That is, there can be avoided an output of an unstable oscillation signal due to a transient oscillation-frequency control signal (VR).

摘要翻译： 提供了一种振荡器电路，其能够通过在振荡开始时避免可能发生在操作/停止控制可行型振荡器电路的频率不稳定的输出而获得稳定的频率。 在这种振荡电路中，振荡允许信号（EN）将振荡器部分置于振荡可操作状态，由此控制器部分开始工作。 已经观察其操作的控制器部分将振荡频率控制信号（VR）改变成对应于预定振荡频率的信号值，以便在振荡器部分设置振荡频率。 此外，振荡器部分响应于在检测器部分将输入的信号与预定信号值进行比较之后输出的检测信号（MON）输出振荡信号，并检测输入信号达到预定信号值。 由此，可以检测振荡频率控制信号（VR）的瞬态。 也就是说，可以避免由于瞬态振荡频率控制信号（VR）引起的不稳定振荡​​信号的输出。

公开(公告)号：US20070120249A1

公开(公告)日：2007-05-31

申请号：US11602230

申请日：2006-11-21

申请人： Satoru Kawamoto

发明人： Satoru Kawamoto

IPC分类号： H01L23/14

CPC分类号： H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0366 ,  H05K3/4688 ,  H05K2201/0191 ,  H05K2201/029 ,  Y10T428/24917 ,  H01L2924/00

摘要： A circuit substrate includes a plurality of dielectric members and a plurality of wiring patterns. The plurality of wiring patterns are stacked on one another through the plurality of dielectric members. The plurality of dielectric members includes a mount dielectric member. A first wiring pattern of the plurality of wiring patterns is provided on a side of the mount dielectric member. A second wiring pattern of the plurality of wiring patterns is provided on an opposite side of the mount dielectric member. A first length is a length between a reinforcing medium of the mount dielectric member and the opposite side of the mount dielectric member in a thickness direction. A second length is a length between the reinforcing medium of the mount dielectric member and the side of the mount dielectric member in the thickness direction. The first length is smaller than the second length.

摘要翻译： 电路基板包括多个电介质构件和多个布线图案。 多个布线图案通过多个电介质构件彼此堆叠。 多个电介质构件包括安装电介质构件。 多个布线图案的第一布线图案设置在安装电介质构件的一侧。 多个布线图案的第二布线图案设置在安装电介质构件的相对侧上。 第一长度是在安装电介质构件的加强介质和安装电介质构件的厚度方向的相对侧之间的长度。 第二长度是在安装电介质构件的加强介质和安装电介质构件的厚度方向的一侧之间的长度。 第一长度小于第二长度。

公开(公告)号：US20060250167A1

公开(公告)日：2006-11-09

申请号：US11482129

申请日：2006-07-07

申请人： Kenta Kato ,  Satoru Kawamoto

发明人： Kenta Kato ,  Satoru Kawamoto

IPC分类号： H03K5/22

CPC分类号： H03K5/08 ,  G01R19/16519 ,  G11C5/143 ,  G11C16/30

摘要： A voltage detection circuit for accurately detecting a voltage while suppressing the voltage fluctuation due to the off-leak current of a transistor. The voltage detection circuit includes first and second capacitors, first and second transistors, a comparator, and a control circuit. The capacitors are connected in series to generate a division voltage corresponding to a high voltage by the capacitors. The potential at a node between the first capacitor and the second capacitor is reset to ground potential when the transistors are activated. When the potential at the node reaches a predetermined potential, the first transistor is inactivated, and then the second transistor is inactivated.