公开(公告)号：US20250007856A1

公开(公告)日：2025-01-02

申请号：US18214893

申请日：2023-06-27

Applicant: Mellanox Technologies, Ltd.

Inventor： Yishai OLTCHIK ,  Michael GANDEL GANDELMAN MILGROM ,  Omer SHABTAI

IPC: H04L47/726 ,  H04L47/70 ,  H04L47/80

Abstract: A system and method for performing routing in a computer network implementing in-network computing, including: obtaining information regarding compute resources allocated to an in-network compute operation; and allocating a path and bandwidth for ordinary network traffic based on the allocated compute resources.

公开(公告)号：US12182563B2

公开(公告)日：2024-12-31

申请号：US18092466

申请日：2023-01-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yair Chasdai

IPC: G06F9/445 ,  G06F8/65 ,  G06F13/10

Abstract: A peripheral device includes a bus interface, a first processor and a second processor. The bus interface is to communicate over a peripheral bus. The first processor is to manage communication over the peripheral bus by executing bus-maintenance software code, the bus-maintenance software code being executed from one or more first layers of a multi-layer memory. The second processor is to update the bus-maintenance software code from an existing version to an updated version, by (i) loading the updated version to one or more second layers of the multi-layer memory, higher in hierarchy than the one or more first layers, and (ii) invalidating the existing version in the one or more first layers, thereby forcing fetching of the updated version from the one or more second layers to the one or more first layers and to start executing the updated version.

公开(公告)号：US12182075B2

公开(公告)日：2024-12-31

申请号：US18092696

申请日：2023-01-03

Applicant: Mellanox Technologies, Ltd.

Inventor： Siddha Ganju ,  Itamar Frenkel ,  Elad Mentovich ,  Rotem Barzilai ,  Yaakov Gridish

IPC: G06F16/174 ,  G06N20/10

Abstract: Systems, computer program products, and methods are described herein for intelligent data compression, in accordance with an embodiment of the invention. The present invention may be configured to receive a plurality of files for storage in a database and perform a series of steps iteratively, for each file of the plurality of files, and until each file of the plurality of files is represented in the database. The series of steps may include identifying one or more data points in the respective file, where each identified data point was previously unidentified in the database and adding the identified one or more data points to the database. The series of steps may also include identifying one or more features of the respective file for storage in the database and storing the identified one or more features in the database as a surrogate for the respective file.

公开(公告)号：US12171056B2

公开(公告)日：2024-12-17

申请号：US17844275

申请日：2022-06-20

Applicant: Mellanox Technologies Ltd.

Inventor： Igor Loiferman ,  Tomer Klein ,  Rom Becker

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/30

Abstract: A device may include a printed circuit board (PCB), a plurality of surface-mount devices disposed on the PCB, wherein a thermal mass of each of the surface-mount devices ranges between a first thermal mass value and a second thermal mass value that is greater than the first thermal mass value, and a plurality of thermal capacitors disposed on the PCB, wherein a thermal mass of each of the thermal capacitors is equal to or greater than the first thermal mass value of the surface-mount devices.

公开(公告)号：US20240406148A1

公开(公告)日：2024-12-05

申请号：US18626354

申请日：2024-04-04

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Uria Basher ,  Michael Tahar ,  Amir Modan ,  Ben Witulski ,  Miriam Menes ,  Miri Shtaif

IPC: H04L9/40

Abstract: In one embodiment, a system includes a networking device including a network interface to receive network packets having headers including datagram transport layer security (DTLS) headers from a remote device over a packet data network, packet processing circuitry to identify first packets of the received packets for DTLS processing in the packet processing circuitry, identify second packets of the received packets to bypass DTLS processing in the packet processing circuitry and to be provided to software to perform DTLS processing on the second packets, and perform DTLS processing on the first packets, and a host interface to provide the DTLS processed first packets to the software, and provide the second packets to the software to perform DTLS processing on the second packets.

公开(公告)号：US20240396916A1

公开(公告)日：2024-11-28

申请号：US18788700

申请日：2024-07-30

Applicant: Mellanox Technologies, Ltd.

Inventor： Chen Rozenbaum ,  Shauli Arazi ,  Bartley Richardson

IPC: H04L9/40 ,  G06N3/08

Abstract: Apparatuses, systems, and techniques for detecting that a host device is subject to a malicious network attack using a machine learning (ML) detection system are described. A computing system includes a graphics processing unit (GPU) and an integrated circuit with a network interface, and a hardware acceleration engine. The integrated circuit hosts a hardware-accelerated security service to extract features from network data and metadata from the hardware acceleration engine and sends the extracted features to the GPU. Using the ML detection system, the GPU determines whether the host device is subject to a malicious network attack using the extracted features. The GPU can send an enforcement rule to the integrated circuit responsive to a determination that the host device is subject to the malicious network activity.

公开(公告)号：US20240396839A1

公开(公告)日：2024-11-28

申请号：US18201074

申请日：2023-05-23

Applicant: Mellanox Technologies, Ltd.

Inventor： Yamin Friedman ,  Omer Shabtai ,  Yuval Shpigelman ,  Rotem Levinson

IPC: H04L47/10 ,  H04L47/125 ,  H04L47/25

Abstract: Technologies for optimizing the spreading of traffic across multiple local output ports while considering both local load and end-to-end (E2E) load are described. One device has multiple outgoing ports and a network adapter that determines, for a first flow of packets, a first end-to-end (E2E) congestion rate of at least some of the outgoing ports. The network adapter determines a port state of at least some of the outgoing ports. The network adapter receives a first packet associated with the first flow of packets. The network adapter determines, using a first desired rate for the first flow, the first E2E congestion rates, and the port states, i) a first time at which the first packet is to be transmitted and ii) a first outgoing port on which the first packet is to be transmitted. The first packet is sent on the first outgoing port at the first time.

公开(公告)号：US20240396302A1

公开(公告)日：2024-11-28

申请号：US18200655

申请日：2023-05-23

Applicant: Mellanox Technologies, Ltd.

Inventor： Attila FÜLÖP ,  Petter WESTBERGH ,  Steffan INTEMANN

IPC: H01S5/183

Abstract: Some embodiments of the present invention are directed to an aperture for a laser for high-bandwidth communication. The laser may include an active region configured to emit light parallel to an optical axis and an emission surface spaced from the active region and through which the light is emitted. The laser may also include an aperture positioned along the optical axis between the active region and the emission surface, where the aperture has a cross-sectional area in a plane perpendicular to the optical axis, and where the cross-sectional area defines a non-circular shape. In some embodiments, the non-circular shape may have at most one axis of symmetry. The aperture may be configured to reduce a spectral bandwidth of the light emitted by the laser and a relative intensity noise of the laser.

公开(公告)号：US20240394060A1

公开(公告)日：2024-11-28

申请号：US18321013

申请日：2023-05-22

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ariel Shahar ,  Avi Urman ,  Omri Kahalon ,  Uria Basher ,  Doron Haim ,  Sagi Farjun

IPC: G06F9/30 ,  G06F9/38

Abstract: A network device includes one or more ports, match-action circuitry, and an action processor. The one or more ports are to exchange packets between the network device and a network. The match-action circuitry is to match at least some of the packets to one or more rules so as to set respective actions to be performed, at least one of the actions including a programmable action. The instruction processor is to perform the programmable action by running user-programmable software code. The instruction processor includes architectural registers, one or more of the architectural registers being accessible by the match-action circuitry, and the match-action circuitry is to write into the architectural registers information for performing the programmable action.

公开(公告)号：US20240388053A1

公开(公告)日：2024-11-21

申请号：US18198407

申请日：2023-05-17

Applicant: Mellanox Technologies, Ltd.

Inventor： Itshak Kalifa ,  Elad Mentovich ,  Matan Galanty

IPC: H01S3/0941 ,  H01S3/08 ,  H01S5/30

Abstract: High-bandwidth lasers having minimized parasitic responses are described herein. In some embodiments, the present invention may be directed to a laser having a minimized parasitic response that is achieved by decreasing the active resistance of the laser's active region and decreasing the active capacitance of the laser. For example, the laser may include an active region having an active resistance as well as mirror regions, where the mirror regions have average dopant densities that decrease the active resistance of the active region and decrease the active capacitance of the laser. By decreasing the active resistance and the active capacitance, the −3 dB frequency of the parasitic response is increased. By increasing the −3 dB frequency of the parasitic response, a total response of the laser (e.g., a combination of an intrinsic response and the parasitic response) has a higher −3 dB frequency, thereby allowing the laser to operate at higher bandwidths.