公开(公告)号：US20130056841A1

公开(公告)日：2013-03-07

申请号：US13224297

申请日：2011-09-01

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

IPC: H01L29/84 ,  H01L21/02

CPC classification number: B81C1/00698 ,  B81C1/00682 ,  H01G5/18 ,  H04R19/005 ,  H04R19/04

Abstract: A MEMS device includes a substrate. The substrate has a plurality of through holes in the substrate within a diaphragm region and optionally an indent space from the second surface at the diaphragm region. A first dielectric structural layer is then disposed over the substrate from the first surface, wherein the first dielectric structural layer has a plurality of openings corresponding to the through holes, wherein each of the through holes remains exposed by the first dielectric structural layer. A second dielectric structural layer with a chamber is disposed over the first dielectric structural layer, wherein the chamber exposes the openings of the first dielectric structural layer and the through holes of the substrate to connect to the indent space. A MEMS diaphragm is embedded in the second dielectric structural layer above the chamber, wherein an air gap is formed between the substrate and the MEMS diaphragm.

Abstract translation: MEMS器件包括衬底。 衬底在膜片区域内的衬底中具有多个通孔，并且可选地在隔膜区域处具有与第二表面相邻的凹陷空间。 然后，第一介电结构层从第一表面设置在衬底上，其中第一介电结构层具有对应于通孔的多个开口，其中每个通孔保持被第一介电结构层暴露。 具有腔室的第二电介质结构层设置在第一介电结构层上，其中腔室暴露第一介电结构层的开口和衬底的通孔以连接到凹陷空间。 MEMS隔膜嵌入在腔室上方的第二电介质结构层中，其中在衬底和MEMS隔膜之间形成气隙。

公开(公告)号：US08093087B2

公开(公告)日：2012-01-10

申请号：US13209461

申请日：2011-08-15

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

IPC: H01L21/00

CPC classification number: B81C1/00246 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C2201/016 ,  B81C2203/0714 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

Abstract: Method for fabricating MEMS device has a first surface and a second surface and having a MEMS region and an IC region. A MEMS structure is formed over the first surface. A structural dielectric layer is formed over the first surface. The structural dielectric layer has a dielectric member and the spaces surrounding the MEMS structure is filled with the dielectric member. The substrate is patterned by etching process from the second surface of the substrate to expose a portion of the dielectric member filled in the space surrounding the MEMS structure. A wettable thin layer is formed to cover an exposed portion of the substrate at the second surface. An etching process is performed on the dielectric member filled in the spaces surrounding the MEMS structure. The MEMS structure is exposed and released by the etching process. The etching process comprises an isotropic etching process with a wet etchant.

Abstract translation: 制造MEMS器件的方法具有第一表面和第二表面，并且具有MEMS区域和IC区域。 在第一表面上形成MEMS结构。 在第一表面上形成结构介电层。 结构介电层具有电介质构件，并且围绕MEMS结构的空间填充有电介质构件。 通过从衬底的第二表面的蚀刻工艺对衬底进行构图，以暴露在围绕MEMS结构的空间中填充的电介质构件的一部分。 形成可湿性薄层以覆盖第二表面处的基板的暴露部分。 对填充在围绕MEMS结构的空间的电介质构件进行蚀刻处理。 通过蚀刻工艺暴露和释放MEMS结构。 蚀刻工艺包括具有湿蚀刻剂的各向同性蚀刻工艺。

公开(公告)号：US20110300659A1

公开(公告)日：2011-12-08

申请号：US13209461

申请日：2011-08-15

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

IPC: H01L21/311

CPC classification number: B81C1/00246 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C2201/016 ,  B81C2203/0714 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

Abstract: Method for fabricating MEMS device has a first surface and a second surface and having a MEMS region and an IC region. A MEMS structure is formed over the first surface. A structural dielectric layer is formed over the first surface. The structural dielectric layer has a dielectric member and the spaces surrounding the MEMS structure is filled with the dielectric member. The substrate is patterned by etching process from the second surface of the substrate to expose a portion of the dielectric member filled in the space surrounding the MEMS structure. A wettable thin layer is formed to cover an exposed portion of the substrate at the second surface. An etching process is performed on the dielectric member filled in the spaces surrounding the MEMS structure. The MEMS structure is exposed and released by the etching process. The etching process comprises an isotropic etching process with a wet etchant.

Abstract translation: 制造MEMS器件的方法具有第一表面和第二表面，并且具有MEMS区域和IC区域。 在第一表面上形成MEMS结构。 在第一表面上形成结构介电层。 结构介电层具有电介质构件，并且围绕MEMS结构的空间填充有电介质构件。 通过从衬底的第二表面的蚀刻工艺对衬底进行构图，以暴露在围绕MEMS结构的空间中填充的电介质构件的一部分。 形成可湿性薄层以覆盖第二表面处的基板的暴露部分。 对填充在围绕MEMS结构的空间的电介质构件进行蚀刻处理。 通过蚀刻工艺暴露和释放MEMS结构。 蚀刻工艺包括具有湿蚀刻剂的各向同性蚀刻工艺。

公开(公告)号：US20110059628A1

公开(公告)日：2011-03-10

申请号：US12553991

申请日：2009-09-04

Applicant: Jen-Kai Chen

Inventor： Jen-Kai Chen

IPC: H01R12/00

CPC classification number: H01R31/065 ,  H01R27/02

Abstract: The present invention constructs a SD Flash card by plugging two micro-SD cards into a new apparatus that has the same form factor as a SD Flash card. In this new apparatus, there is a controller to bridge the two micro-SD cards of any SD interface speed type (DS, HS, UHS50 or UHS104) to UHS104. The controller performs striping access function to achieve almost double performance in sequential read/write throughput if it is not limited by the target SD interface speed.

Abstract translation: 本发明通过将两个micro-SD卡插入具有与SD闪存卡相同形状的新设备来构造SD闪存卡。 在这种新设备中，有一个控制器将任何SD接口速度类型（DS，HS，UHS50或UHS104）的两个micro-SD卡桥接到UHS104。 如果不受目标SD接口速度的限制，控制器将执行条带访问功能，以实现连续读/写吞吐量的几乎两倍的性能。

公开(公告)号：US20100161856A1

公开(公告)日：2010-06-24

申请号：US12342019

申请日：2008-12-22

Applicant: Rong-Hwa Ding

Inventor： Rong-Hwa Ding

IPC: G06F3/00

CPC classification number: H04R3/00 ,  H04R2420/05

Abstract: A USB audio controller includes an USB interface unit, an audio interface unit, a storage interface unit, and a processing unit. The USB interface unit is used to connect to a USB bus for communicating with a host by a communication information. The audio interface unit is used to connect to at least one audio device for communicating with an audio signal. The storage unit is used to connect to a memory unit for communicating storage information. The processing unit is for processing the communicating information and audio signal.

Abstract translation: USB音频控制器包括USB接口单元，音频接口单元，存储接口单元和处理单元。 USB接口单元用于连接到USB总线，用于通过通信信息与主机进行通信。 音频接口单元用于连接至少一个音频设备以与音频信号进行通信。 存储单元用于连接到用于传送存储信息的存储器单元。 处理单元用于处理通信信息和音频信号。

公开(公告)号：US20100052082A1

公开(公告)日：2010-03-04

申请号：US12203151

申请日：2008-09-03

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Chih-Hsiang Lin

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Chih-Hsiang Lin

IPC: H01L29/00 ,  H01L21/00

CPC classification number: B81B7/0061 ,  B81B2201/0257 ,  B81B2207/095 ,  B81B2207/096 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A micro-electro-mechanical systems (MEMS) package includes a MEMS microphone device. The MEMS microphone device has a first substrate and at least a sensing element on the first substrate wherein a first chamber in the MEMS microphone device is connected to the sensing element. A second substrate is disposed over the MEMS microphone device to provide a second chamber in the second substrate over the sensing element opposite to the first chamber.

Abstract translation: 微电子机械系统（MEMS）封装包括MEMS麦克风装置。 MEMS麦克风装置具有第一基板和第一基板上的至少一个感测元件，其中MEMS麦克风装置中的第一腔室连接到感测元件。 第二基板设置在MEMS麦克风装置上方，以在与第一室相对的感测元件上的第二基板中提供第二室。

公开(公告)号：US07382655B2

公开(公告)日：2008-06-03

申请号：US11459361

申请日：2006-07-23

Applicant: Gene Lin

Inventor： Gene Lin

IPC: G11C16/32

CPC classification number: G11C16/32 ,  G11C2207/2254

Abstract: An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance status of the non-volatile memory under an operation clock and output the performance status. An access time controlling unit is used to generate at least one adjusting operation clock. Each adjusting operation clock serves as the operation clock for the non-volatile memory. In addition, the non-volatile memory, the access time controlling unit, and the access time detecting unit are connected to form a detection and adjustment loop, so that an optimized operation clock is determined after checking the at least one adjusting operation clock.

Abstract translation: 在非易失性存储器中使用访问时间调整电路，以获得操作中优化的访问时间。 该电路包括访问时间检测单元，用于在操作时钟下检测非易失性存储器的性能状态并输出性能状态。 访问时间控制单元用于产生至少一个调整操作时钟。 每个调整操作时钟用作非易失性存储器的操作时钟。 另外，非易失性存储器，访问时间控制单元和访问时间检测单元被连接以形成检测和调整循环，从而在检查至少一个调整操作时钟之后确定优化的操作时钟。

公开(公告)号：US20080032470A1

公开(公告)日：2008-02-07

申请号：US11462372

申请日：2006-08-04

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Jhyy-Cheng Liou

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Jhyy-Cheng Liou

IPC: H01L21/8244

CPC classification number: H01L27/11568 ,  H01L27/0207 ,  H01L27/115

Abstract: A method for fabricating non-volatile memory on a substrate includes forming a plurality of doped lines in the substrate along a first direction, wherein the doped lines serve as a plurality of bit lines, and portions of each of the doped lines serves as source/drain regions for a plurality of memory cells. A charge storage stacked layer is formed over the substrate, wherein the charge storage stacked layer includes a charge trapping layer. A conductive layer is formed over the charge storage layer. The conductive layer and the charge storage stacked layer are patterned to form a plurality of word lines along a second direction, intersecting with the first directing. The remaining portion of the charge trapping layer is just under the word lines, not covering the isolation region between the word lines.

Abstract translation: 用于在衬底上制造非易失性存储器的方法包括沿着第一方向在衬底中形成多个掺杂线，其中掺杂线用作多个位线，并且每个掺杂线的部分用作源极/ 漏极区域用于多个存储单元。 电荷存储堆叠层形成在衬底上，其中电荷存储层叠层包括电荷俘获层。 在电荷存储层上形成导电层。 图案化导电层和电荷存储堆叠层，以沿与第一定向相交的第二方向形成多个字线。 电荷俘获层的剩余部分刚好在字线之下，不覆盖字线之间的隔离区域。

公开(公告)号：US20080019209A1

公开(公告)日：2008-01-24

申请号：US11459361

申请日：2006-07-23

Applicant: Gene Lin

Inventor： Gene Lin

IPC: G11C8/00

CPC classification number: G11C16/32 ,  G11C2207/2254

Abstract: An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance status of the non-volatile memory under an operation clock and output the performance status. An access time controlling unit is used to generate at least one adjusting operation clock. Each the adjusting operation clock serves as the operation clock for the non-volatile memory. In addition, the non-volatile memory, the access time controlling unit, and the access time detecting unit are connected to form a detection and adjustment loop, so that an optimized operation clock is determined after checking the at least one adjusting operation clock.

Abstract translation: 在非易失性存储器中使用访问时间调整电路，以获得操作中优化的访问时间。 该电路包括访问时间检测单元，用于在操作时钟下检测非易失性存储器的性能状态并输出性能状态。 访问时间控制单元用于产生至少一个调整操作时钟。 每个调整操作时钟用作非易失性存储器的操作时钟。 另外，非易失性存储器，访问时间控制单元和访问时间检测单元被连接以形成检测和调整循环，从而在检查至少一个调整操作时钟之后确定优化的操作时钟。

公开(公告)号：US20200068317A1

公开(公告)日：2020-02-27

申请号：US16112777

申请日：2018-08-27

Applicant: Solid State System Co., Ltd.

Inventor： Tsung-Min Hsieh ,  Li-Chi Tsao ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

IPC: H04R19/04 ,  B81B7/00 ,  B81C1/00 ,  H04R19/00 ,  H04R1/04

Abstract: A structure of micro-electro-mechanical-system (MEMS) microphone package includes a packaging substrate and an integrated circuit disposed on the packaging substrate. In addition, a MEMS microphone is disposed on the packaging substrate, wherein the MEMS microphone is electrically connected to the integrated circuit. A conductive adhesion layer is disposed on the packaging substrate, surrounding the integrated circuit and the MEMS microphone. A cap structure has a bottom part being adhered to the conductive adhesion layer. An underfill layer is disposed on the packaging substrate, covering an outer side of the conductive adhesion layer.