公开(公告)号：US20220360219A1

公开(公告)日：2022-11-10

申请号：US17723103

申请日：2022-04-18

申请人： Huawei Technologies Co., Ltd.

发明人： Mina SHAHMOHAMMADI ,  Masoud BABAIE ,  Robert Bogdan STASZEWSKI

IPC分类号： H03B5/12 ,  H03F3/193 ,  H03F1/56 ,  H03F3/24 ,  H03F3/72

摘要： The invention relates to a radio frequency oscillator, the radio frequency oscillator comprising a resonator circuit being resonant at an excitation of the resonator circuit in a differential mode and at an excitation of the resonator circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at the excitation in the differential mode, and wherein the resonator circuit has a common mode resonance frequency at the excitation in the common mode, a first excitation circuit being configured to excite the resonator circuit in the differential mode to obtain a differential mode oscillator signal oscillating at the differential mode resonance frequency, and a second excitation circuit being configured to excite the resonator circuit in the common mode to obtain a common mode oscillator signal oscillating at the common mode resonance frequency.

公开(公告)号：US20220352861A1

公开(公告)日：2022-11-03

申请号：US17243760

申请日：2021-04-29

申请人： Silicon Laboratories Inc.

发明人： Robert M. Gorday ,  Guner Arslan ,  Marc Leroux ,  Pascal Blouin

IPC分类号： H03G3/30 ,  H03F3/21 ,  H03F3/193

摘要： In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

公开(公告)号：US20220329215A1

公开(公告)日：2022-10-13

申请号：US17731048

申请日：2022-04-27

申请人： pSemi Corporation

发明人： Dan William Nobbe ,  David Halchin ,  Jeffrey A. Dykstra ,  Michael P. Gaynor ,  David Kovac ,  Kelly Michael Mekechuk ,  Gary Frederick Kaatz ,  Chris Olson

IPC分类号： H03F1/56 ,  H03F3/21 ,  H03F3/217 ,  H03F1/02 ,  H03F1/22 ,  H03F3/195 ,  H03F3/24 ,  H03F3/72 ,  H03F3/193

摘要： A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

公开(公告)号：US20220311392A1

公开(公告)日：2022-09-29

申请号：US17213895

申请日：2021-03-26

申请人： Cree, Inc.

发明人： Phil Saint-Erne ,  William Pribble ,  Warren Brakensiek ,  Bradley Millon

IPC分类号： H03F3/193 ,  H01L23/31 ,  H01L23/66 ,  H03F3/195 ,  H03F3/213 ,  H01L29/20

摘要： Packaged RF transistor amplifiers are provided that include a flat no-lead overmold package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads and an RF transistor amplifier die mounted on the die pad and at least partially covered by the overmold encapsulation. These packaged RF transistor amplifiers may have an output power density of at least 3.0 W/mm2.

公开(公告)号：US20220278653A1

公开(公告)日：2022-09-01

申请号：US17189141

申请日：2021-03-01

申请人： pSemi Corporation

发明人： Miles SANNER ,  Emre AYRANCI ,  Parvez DARUWALLA

IPC分类号： H03F1/22 ,  H03F3/193 ,  H03F3/21

摘要： Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

公开(公告)号：US11387794B2

公开(公告)日：2022-07-12

申请号：US16729544

申请日：2019-12-30

申请人： DENSO CORPORATION ,  National University Corporation Toyohashi University of Technology

发明人： Takanari Sasaya ,  Tetsuo Hirano ,  Takashi Ohira ,  Naoki Sakai ,  Takaaki Masaki

IPC分类号： H02M7/537 ,  H03F3/217 ,  H03H7/38 ,  H02M7/493 ,  H03F3/193 ,  H02M7/48

摘要： In each E-class inverter, an internal voltage detection circuit detects an internal voltage of a resonant type power supply circuit or a matching circuit and adjusts a phase of a driving signal of a MOSFET based on a detected voltage. It is thus possible to match a phase of a current voltage of a sine waveform of each inverter and combine power highly efficiently. Since power combining is performed highly efficiently without using a variable capacitor and variable inductor, it is possible to suppress upsizing of elements and achieve downsizing of a power amplifier circuit.

公开(公告)号：US20220216832A1

公开(公告)日：2022-07-07

申请号：US17703230

申请日：2022-03-24

申请人： Massachusetts Institute of Technology

发明人： Alexander Sergeev JURKOV ,  David J. PERREAULT

IPC分类号： H03F1/02 ,  H03F3/24 ,  H03F1/56 ,  H03F3/217 ,  H03F3/193 ,  H03F3/21 ,  H03F3/19 ,  H03K7/08

摘要： Described are concepts, systems, circuits and techniques directed toward methods and apparatus for generating one or more pulse width modulated (PWM) waveforms with the ability to dynamically control pulse width and phase with respect to a reference signal.

公开(公告)号：US20220209719A1

公开(公告)日：2022-06-30

申请号：US17573375

申请日：2022-01-11

申请人： pSemi Corporation

发明人： Kashish Pal ,  Emre Ayranci ,  Miles Sanner

IPC分类号： H03F1/22 ,  H03F3/193 ,  H03F1/26 ,  H04L27/26 ,  H03F3/68

摘要： An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.

公开(公告)号：US11374540B2

公开(公告)日：2022-06-28

申请号：US16935999

申请日：2020-07-22

申请人： pSemi Corporation

发明人： Jonathan James Klaren ,  David Kovac ,  Eric S. Shapiro ,  Christopher C. Murphy ,  Robert Mark Englekirk ,  Keith Bargroff ,  Tero Tapio Ranta

IPC分类号： H03F1/22 ,  H03F3/195 ,  H03F3/213 ,  H03F3/24 ,  H03F1/30 ,  H03F1/56 ,  H03F3/193

摘要： Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

公开(公告)号：US20220200557A1

公开(公告)日：2022-06-23

申请号：US17127242

申请日：2020-12-18

申请人： QUALCOMM INCORPORATED

发明人： Marco VIGILANTE ,  Chinmaya MISHRA

IPC分类号： H03G3/30 ,  H03H11/30 ,  H03F3/193 ,  H03F3/21

摘要： An amplifier circuit for a millimeter wave (mmW) communication system includes an amplifier coupled to a matching network, and a variable gain control circuit in the matching network, the variable gain control circuit having an adjustable gain control resistance, the adjustable gain control resistance having adjustable segments and a center node therebetween, the center node coupled to an alternating current (AC) ground.