公开(公告)号：US08377556B2

公开(公告)日：2013-02-19

申请号：US12324685

申请日：2008-11-26

Applicant: Adeline Chan ,  Ivan Teo ,  Zhonglin Miao ,  Shanzhong Wang ,  Vincenzo Vinciguerra

Inventor： Adeline Chan ,  Ivan Teo ,  Zhonglin Miao ,  Shanzhong Wang ,  Vincenzo Vinciguerra

IPC: B32B9/00 ,  B32B15/14

CPC classification number: B82Y40/00 ,  B01J23/75 ,  B01J37/08 ,  B82Y30/00 ,  C01B32/162 ,  Y10T428/30

Abstract: Systems and methods for creating carbon nanotubes are disclosed that comprise a growing a nanotube on a tri-layer material. This tri-layer material may comprise a catalyst and at least one layer of Ti. This tri-layer material may be exposed to a technique that is used to grow a nanotube on a material such as a deposition technique.

Abstract translation: 公开了用于制造碳纳米管的系统和方法，其包括在三层材料上生长纳米管。 该三层材料可以包括催化剂和至少一层Ti。 这种三层材料可以暴露于用于在诸如沉积技术的材料上生长纳米管的技术。

公开(公告)号：US08369420B2

公开(公告)日：2013-02-05

申请号：US11895023

申请日：2007-08-22

Applicant: Patricia Chiang ,  Ilija Materic ,  Martin Bolton ,  Nicolas Pellerin

Inventor： Patricia Chiang ,  Ilija Materic ,  Martin Bolton ,  Nicolas Pellerin

IPC: H04N7/12

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/159 ,  H04N19/61 ,  H04N19/82

Abstract: A multimode filter that is versatile for digital signal processing including in-loop processing (de-blocking and de-ringing), post processing (de-blocking and de-ringing), and overlap smoothing. A flexi-standard filter includes the multimode filter. An electronic device includes the flexi-standard filter. A process for digital signal processing includes in-loop processing (de-blocking and de-ringing), post processing (de-blocking and de-ringing), and overlap smoothing.

Abstract translation: 一种多模式滤波器，适用于数字信号处理，包括循环处理（去块和解除振铃），后处理（去块和解除振铃）以及重叠平滑。 柔性标准过滤器包括多模式过滤器。 电子设备包括柔性标准过滤器。 一种用于数字信号处理的过程包括循环处理（去块和解除振铃），后处理（去块和解除振铃）以及重叠平滑。

公开(公告)号：US08355334B2

公开(公告)日：2013-01-15

申请号：US12072817

申请日：2008-02-28

Applicant: Tanu Malhotra ,  Anoop Kumar Krishna

Inventor： Tanu Malhotra ,  Anoop Kumar Krishna

IPC: H04J1/16

CPC classification number: H04L65/1069 ,  H04L65/1006 ,  H04L65/1009 ,  H04L65/80 ,  H04L69/24 ,  H04M7/0072

Abstract: A method of improving voice quality in a packet based network. The method includes receiving an incoming call from a first endpoint and matching capabilities between the first endpoint and the second endpoint. The method also includes completing the incoming call if the capabilities match and tracking the packet loss associated with the network. The method also includes negotiating the voice quality based on the tracking and the capabilities. Also described is a devices and system for a similar method.

Abstract translation: 一种改善基于分组的网络中的语音质量的方法。 该方法包括从第一端点接收来话呼叫并在第一端点与第二端点之间匹配能力。 该方法还包括如果能力匹配并跟踪与网络相关联的分组丢失，则完成来话呼叫。 该方法还包括基于跟踪和能力来协商语音质量。 还描述了用于类似方法的装置和系统。

公开(公告)号：US20130012016A1

公开(公告)日：2013-01-10

申请号：US13545844

申请日：2012-07-10

Applicant: Tong Yan Tee ,  Xueren Zhang ,  Shanzhong Wang ,  Valeriy Nosik ,  Jijie Zhou ,  Sridhar Idapalapati ,  Subodh Mhaisalkar ,  Zhi Yuan Shane Loo

Inventor： Tong Yan Tee ,  Xueren Zhang ,  Shanzhong Wang ,  Valeriy Nosik ,  Jijie Zhou ,  Sridhar Idapalapati ,  Subodh Mhaisalkar ,  Zhi Yuan Shane Loo

IPC: H01L21/768 ,  B82Y99/00 ,  B82Y40/00

CPC classification number: H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S977/742 ,  Y10S977/785 ,  H01L2924/00

Abstract: A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material dispersed with carbon nanotubes. The protection layer could include one or multiple layers of carbon nanotubes, and the carbon nanotubes could have any suitable dispersion, alignment, and pattern in each layer of the protection layer. Among other things, the carbon nanotubes help to reduce or prevent damage to the interconnect structure, such as by reducing or preventing the collapse of the low-K material or delamination between the metal line and the low-K material.

Abstract translation: 在互连结构上涂覆或以其它方式形成保护层。 互连结构包括金属线（例如通过金属通孔连接的顶部和底部金属层）和低K材料。 保护层包括垂直排列的电介质或分散有碳纳米管的其它材料。 保护层可以包括一层或多层碳纳米管，并且碳纳米管可以在保护层的每个层中具有任何合适的分散体，取向和图案。 除其他之外，碳纳米管有助于减少或防止互连结构的损坏，例如通过减少或防止低K材料的塌陷或金属线与低K材料之间的分层。

公开(公告)号：US20120317662A1

公开(公告)日：2012-12-13

申请号：US13495292

申请日：2012-06-13

Applicant: TeckKhim NEO ,  Paul I. MIKULAN ,  Murray J. ROBINSON ,  Rube M. ROSS

Inventor： TeckKhim NEO ,  Paul I. MIKULAN ,  Murray J. ROBINSON ,  Rube M. ROSS

IPC: G06F21/00

CPC classification number: G06F21/73 ,  G06F21/44 ,  H04L9/3278

Abstract: In an embodiment, to deter or delay counterfeiting/cloning of a replacement component of a host device, the replacement component is provided with a code value. The code value is generated from a value of at least one physical parameter of the replacement component and is stored on the replacement component. The host device determines whether the replacement component is authentic if the stored code value matches a reference code value.

Abstract translation: 在一个实施例中，为了阻止或延迟伪装/克隆主机设备的替换部件，替换部件被提供有代码值。 代码值是从替换组件的至少一个物理参数的值生成的，并存储在替换组件上。 如果存储的代码值与参考代码值匹配，则主机设备确定替换组件是否可信。

公开(公告)号：US08301282B2

公开(公告)日：2012-10-30

申请号：US12501342

申请日：2009-07-10

Applicant: Sapna George ,  Haiyun Yang

Inventor： Sapna George ,  Haiyun Yang

IPC: G06F17/00

CPC classification number: G10L19/0208 ,  H04H40/18

Abstract: In order to reproduce audio signals which have been compressed or encoded for storage or transmission using, for example, MPEG audio encoding, a synthesis sub-band filter is employed which performs an inverse modified discrete cosine transform. The computational cost of the IMDCT implementation is reduced by pre-calculating arrays of sum and difference data. The arrays of sum and difference data are then used in two separate transform calculations, the results of which can be used in the generation of pulse code modulation audio data.

Abstract translation: 为了再现使用例如MPEG音频编码进行压缩或编码以进行存储或传输的音频信号，采用执行逆修正离散余弦变换的合成子带滤波器。 通过预先计算和和差数据的阵列来减少IMDCT实现的计算成本。 然后将和差数据的数组用于两个单独的变换计算，其结果可用于生成脉冲编码调制音频数据。

公开(公告)号：US08289066B2

公开(公告)日：2012-10-16

申请号：US12650377

申请日：2009-12-30

Applicant: Dianbo Guo

Inventor： Dianbo Guo

IPC: H03K17/687

CPC classification number: H03K17/04123 ,  H03K2217/0054

Abstract: An analog switch configuration includes a gate control circuit coupled between an input of a switch and a gate of the switch. The gate control circuit passes voltage changes on the input of the switch to the gate of the switch to decrease the influence the inherent gate to input capacitance has on the bandwidth of the switch. By reducing the change in voltage across the inherent capacitance, the current through the capacitance in decreased as well as its influence on the bandwidth of the configuration.

Abstract translation: 模拟开关配置包括耦合在开关的输入和开关的栅极之间的栅极控制电路。 门控制电路将开关输入端的电压变化传递到开关的栅极，以减小输入电容固有栅极对开关带宽的影响。 通过减小固有电容两端的电压变化，通过电容的电流减小以及其对配置带宽的影响。

公开(公告)号：US08284080B2

公开(公告)日：2012-10-09

申请号：US12340030

申请日：2008-12-19

Applicant: Chee Yu Ng ,  Giuseppe Noviello ,  Eng-Siong Goh

Inventor： Chee Yu Ng ,  Giuseppe Noviello ,  Eng-Siong Goh

IPC: H04N5/35

CPC classification number: G06F3/0416 ,  G06F3/044

Abstract: Aspects of the invention relate to a method and apparatus for scanning an array of sensors. More particularly, the invention is directed towards scanning an array of sensors to accurately determine actuated sensors on a contact-sensitive surface. In one embodiment, three sets of sensing lines can be incorporated into the sensing area for ghost-free detection of up to two keys. Further in other embodiments, n sets of sensing lines can be incorporated into the sensing area for ghost free detection of up to n−1 keys.

Abstract translation: 本发明的方面涉及用于扫描传感器阵列的方法和装置。 更具体地，本发明涉及扫描传感器阵列以精确地确定接触敏感表面上的致动传感器。 在一个实施例中，三组感测线可以并入到感测区域中，用于无重复检测多达两个键。 此外，在其他实施例中，可以将n组感测线路并入到感测区域中以用于无重复检测多达n-1个密钥。

公开(公告)号：US08232790B2

公开(公告)日：2012-07-31

申请号：US12580157

申请日：2009-10-15

Applicant: Kong Yin Leong ,  Soon Hwei Tan

Inventor： Kong Yin Leong ,  Soon Hwei Tan

IPC: G05F1/40

CPC classification number: H02M3/157 ,  H02M3/1582 ,  H02M3/1584

Abstract: A dual supply circuit uses a dual feedback control, single inductor, dual polarity boost architecture with a low side power FET for end of current recirculation sensing. A dual feedback system tracks the output voltage variations and a low side power FET end of current recirculation sensing utilizes the internal current limit sensing system. Logic defining the state of operations allows the regulator to operate in both single and dual mode to cater to wide application ranges. The positive boost regulator can be operated in a buck mode making the output voltage constant with high input supply.

Abstract translation: 双电源电路采用双反馈控制，单电感，双极性升压架构和低端功率FET，用于电流再循环检测。 双反馈系统跟踪输出电压变化，并且电流再循环感测的低端功率FET端利用内部限流检测系统。 定义操作状态的逻辑允许调节器以单模式和双模式运行，以适应广泛的应用范围。 正升压稳压器可以在降压模式下工作，使输出电压恒定，输入电源高。

公开(公告)号：US20120178213A1

公开(公告)日：2012-07-12

申请号：US13424610

申请日：2012-03-20

Applicant: Kim-Yong Goh ,  Jing-En Luan

Inventor： Kim-Yong Goh ,  Jing-En Luan

IPC: H01L21/60

CPC classification number: H01L23/367 ,  H01L23/04 ,  H01L23/3114 ,  H01L23/552 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test.

Abstract translation: 芯片级封装（CSP）器件包括具有电耦合到多个焊球的半导体管芯的CSP。 具有内顶表面和一个或多个侧壁的罐体限定了一个室。 CSP容纳在腔室中，并连接到罐的内部顶部表面。 印刷电路板附接到焊球和一个或多个侧壁以提供对CSP和罐的支撑。 CSP可能是晶片级CSP。 罐可以由金属物质或非金属物质制成。 在跌落测试期间和热循环测试期间，罐可以为CSP提供应力消除。