公开(公告)号：US20050184388A1

公开(公告)日：2005-08-25

申请号：US10782365

申请日：2004-02-19

Applicant: Hsin-Ching Shih ,  Kang-Cheng Lin ,  Chao-Cheng Chen ,  Hun-Jan Tao

Inventor： Hsin-Ching Shih ,  Kang-Cheng Lin ,  Chao-Cheng Chen ,  Hun-Jan Tao

IPC: H01L23/48 ,  H01L23/58

CPC classification number: H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In accordance with the objective of the invention a new method is provided for the creation of a seal ring having dissimilar elements. The Critical Dimensions of the seal ring are selected with respect to the CD of other device features, such a seal vias, such that the difference in etch sensitivity between the created seal ring and the via holes is removed. All etch of the simultaneously etched features is completed at the same time, avoiding punch through of an underlying layer of etch stop material.

Abstract translation: 根据本发明的目的，提供了一种用于创建具有不同元件的密封环的新方法。 密封环的临界尺寸相对于其它装置特征（例如密封通孔）的CD被选择，使得所产生的密封环和通孔之间的蚀刻敏感性的差异被去除。 同时蚀刻的特征的所有蚀刻同时完成，避免冲蚀下一层蚀刻停止材料。

公开(公告)号：US06821880B1

公开(公告)日：2004-11-23

申请号：US10725138

申请日：2003-12-01

Applicant: Hun-Jan Tao ,  Chao-Cheng Chen

Inventor： Hun-Jan Tao ,  Chao-Cheng Chen

IPC: H01L214763

CPC classification number: H01L21/76814 ,  H01L21/67155 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76838

Abstract: A process of dual damascene or damascene. The dual damascene process entails providing an etching apparatus, a DCM machine and a wafer, the wafer having a metal line, a stop layer, a dielectric layer, a contact, and a photoresist layer. The dielectric layer and the contact are etched in the etching apparatus to form a trench. The photoresist and the contact are ashed in the DCM machine. Finally the wafer is wet cleaned.

Abstract translation: 一个双镶嵌或镶嵌的过程。 双镶嵌工艺需要提供蚀刻装置，DCM机器和晶片，晶片具有金属线，阻挡层，介电层，接触和光致抗蚀剂层。 在蚀刻装置中蚀刻介电层和接触以形成沟槽。 在DCM机器中将光致抗蚀剂和接触物灰化。 最后将晶片湿式清洗。

公开(公告)号：US06444517B1

公开(公告)日：2002-09-03

申请号：US10055091

申请日：2002-01-23

Applicant: Heng-Ming Hsu ,  Shyh-Chyi Wong ,  Chaochieh Tsai ,  Ssu-Pin Ma ,  Chao-Cheng Chen ,  Liang-Kun Huang

Inventor： Heng-Ming Hsu ,  Shyh-Chyi Wong ,  Chaochieh Tsai ,  Ssu-Pin Ma ,  Chao-Cheng Chen ,  Liang-Kun Huang

IPC: H01L218244

CPC classification number: H01L28/10 ,  H01F17/0006 ,  H01F41/041 ,  H01L21/76838 ,  H01L27/08

Abstract: A new method is provided for the creation of an inductive over the surface of a semiconductor substrate. A first layer of metal is created in a layer of dielectric, a second layer of metal is created overlying the first layer of metal. The first layer of metal combined with the second layer of metal form an inductor of increased height, reducing the resistivity of the inductor, increasing the Q value of the inductor. The new method of creating an inductor can be combined with creating contact points that connect to contact points in the active region of the surface of a semiconductor substrate.

Abstract translation: 提供了一种用于在半导体衬底的表面上产生电感的新方法。 在电介质层中产生第一金属层，产生覆盖在第一金属层上的第二金属层。 第一层金属与第二层金属组合形成一个增加高度的电感器，降低了电感的电阻率，增加了电感的Q值。 创建电感器的新方法可以与产生连接到半导体衬底的表面的有源区域中的接触点的接触点组合。

公开(公告)号：US6130167A

公开(公告)日：2000-10-10

申请号：US270593

申请日：1999-03-18

Applicant: Hun-Jan Tao ,  Shu-Chin Yang ,  Chao-Cheng Chen

Inventor： Hun-Jan Tao ,  Shu-Chin Yang ,  Chao-Cheng Chen

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/308

CPC classification number: H01L21/02071 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/76814 ,  H01L21/76888 ,  H01L21/31116

Abstract: A process used to prevent attack of an aluminum based structure, exposed in a non-fully landed via hole, from solvents used during the wet stripping cycle, performed to remove the via hole defining photoresist shape, has been developed. The process features the formation of a protective aluminum oxide layer, on the exposed side of the aluminum based structure, via use of a plasma treatment, performed in an H.sub.2 O/N.sub.2 ambient. The H.sub.2 O/N.sub.2 plasma treatment procedure is performed after a dry plasma, photoresist stripping step, but prior to a final wet photoresist stripping step. The aluminum oxide layer offers protection of the exposed regions of the aluminum structure, located in the non-fully landed via hole, from reaction or corrosion, that can result from exposure of aluminum to the solvents used in the final wet photoresist stripping cycle.

Abstract translation: 已经开发了一种用于防止暴露在非完全着陆的通孔中的铝基结构从在湿式剥离循环期间使用的溶剂的侵蚀的过程，以去除限定光致抗蚀剂形状的通孔。 该方法的特征在于在基于铝的结构的暴露侧上通过使用在H 2 O / N 2环境中进行的等离子体处理形成保护性氧化铝层。 H 2 O / N 2等离子体处理程序在干等离子体，光致抗蚀剂剥离步骤之后，但在最后的湿光致抗蚀剂剥离步骤之前进行。 氧化铝层提供保护位于非完全着陆的通孔中的铝结构的暴露区域不受反应或腐蚀的影响，这可能是由于将铝暴露于最终湿光致抗蚀剂剥离循环中使用的溶剂而导致的。

公开(公告)号：US6107206A

公开(公告)日：2000-08-22

申请号：US152350

申请日：1998-09-14

Applicant: Li-Chih Chao ,  Chao-Cheng Chen

Inventor： Li-Chih Chao ,  Chao-Cheng Chen

IPC: H01L21/3065 ,  H01L21/762 ,  H01L21/302 ,  H01L21/461

CPC classification number: H01L21/3065 ,  H01L21/76232

Abstract: A method of etching closely spaced trenches in a silicon body wherein a masked silicon body is introduced into a plasma etching apparatus. An object having an exposed silicon surface that is consumable by a plasma environment is provided in the apparatus. A reactive plasma environment is established in the apparatus which removes silicon from the body and the silicon object. The additional silicon from the object in the plasma influences the silicon removal from the body to thereby provide tapered trench side walls.

Abstract translation: 在硅体中蚀刻紧密间隔的沟槽的方法，其中将掩模的硅体引入等离子体蚀刻装置中。 在该装置中设置有具有由等离子体环境消耗的暴露的硅表面的物体。 在从身体和硅物体中去除硅的装置中建立了反应等离子体环境。 来自等离子体中的物体的附加硅影响硅体从硅体移除，从而提供锥形的沟槽侧壁。

公开(公告)号：US5970376A

公开(公告)日：1999-10-19

申请号：US999075

申请日：1997-12-29

Applicant: Chao-Cheng Chen

Inventor： Chao-Cheng Chen

IPC: H01L21/311 ,  H01L21/4763

CPC classification number: H01L21/02063 ,  H01L21/31116 ,  H01L21/31138 ,  Y10S438/963

Abstract: A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a low dielectric constant dielectric layer, where the low dielectric constant dielectric layer is formed from a silsesquioxane spin-on-glass (SOG) dielectric material. There is then formed over the low dielectric constant dielectric layer a patterned photoresist layer. There is then etched through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the low dielectric constant dielectric layer to form a patterned low dielectric constant dielectric layer having a via formed therethrough. The fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via. There is then treated through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer. The plasma treated fluorocarbon polymer residue layer is susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned low dielectric constant dielectric layer. Finally, there is then stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned low dielectric constant dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.

Abstract translation: 在微电子学制造中通过介电层形成通孔的方法。 首先提供了在微电子制造中使用的衬底。 然后在衬底上形成低介电常数介电层，其中低介电常数电介质层由倍半硅氧烷旋涂玻璃（SOG）介电材料形成。 然后在低介电常数电介质层上形成图案化的光致抗蚀剂层。 然后通过使用含氟等离子体蚀刻方法蚀刻，同时使用图案化的光致抗蚀剂层作为光致抗蚀剂蚀刻掩模层的低介电常数介电层，以形成具有穿过其中形成的通孔的图案化的低介电常数介电层。 含氟等离子体蚀刻方法使用含氟蚀刻剂气体组合物，其同时在通孔的侧壁上形成氟碳聚合物残余层。 然后通过使用等离子体处理方法处理氟碳聚合物残余层以形成等离子体处理的氟碳聚合物残渣层。 等离子体处理的碳氟化合物聚合物残余层与氟碳聚合物残余物层相比，通过用于从微电子学制造中剥离的含氧等离子体剥离方法从通孔的侧壁剥离，使得具有衰减的横向蚀刻 的图案化低介电常数介电层。 最后，然后通过使用含氧等离子体剥离方法从图案化的低介电常数电介质层和经过该侧壁的等离子体处理的碳氟化合物残余物层剥离图案化的光致抗蚀剂层。

公开(公告)号：US11951122B2

公开(公告)日：2024-04-09

申请号：US17390048

申请日：2021-07-30

Applicant: Chao-Cheng Chen

Inventor： Chao-Cheng Chen

IPC: A61K31/716 ,  A61K9/00 ,  A61K45/06 ,  A61P1/12 ,  C12P19/04 ,  C12R1/02

CPC classification number: A61K31/716 ,  A61K9/0053 ,  A61K45/06 ,  A61P1/12 ,  C12P19/04 ,  C12R2001/02

Abstract: Provided is a use of fibers formed of β-1-4-glucan in manufacturing a composition for preventing or treating diarrhea, constipation or irritable bowel syndrome, wherein the fibers have a diameter between 15 nm to 35 nm and a mean length of between 1.5 μm and 3.5 μm. Also provided is a method for preventing or treating diarrhea, constipation or irritable bowel syndrome with the fibers formed of β-1-4-glucan.

公开(公告)号：US20150362239A1

公开(公告)日：2015-12-17

申请号：US14302629

申请日：2014-06-12

Applicant: CHAO-CHENG CHEN

Inventor： CHAO-CHENG CHEN

IPC: F25B49/02

CPC classification number: F25B49/022 ,  F25B2600/021 ,  F25B2700/21 ,  F25B2700/2115 ,  Y02B30/741

Abstract: A variable frequency control apparatus includes a variable frequency controller, and at least one temperature sensor, and the variable frequency controller is installed at a compressor of an air-conditioning equipment and electrically coupled to the compressor, and the temperature sensor is installed at a position where a refrigerant pipeline passes through the compressor. A temperature change of the refrigerant passing through the compressor is used as a basis for determining whether an air-conditioning host of the air-conditioning equipment situated in an indoor space has reached a predetermined air-conditioning effect, so as to control and adjust a rotational speed of the compressor and drive the compressor of a constant frequency air-conditioning equipment to produce a variable frequency operation effect.

Abstract translation: 变频控制装置包括变频控制器和至少一个温度传感器，并且变频控制器安装在空调设备的压缩机上并电耦合到压缩机，并且温度传感器安装在位置 制冷剂管道通过压缩机。 使用通过压缩机的制冷剂的温度变化作为确定位于室内空调器中的空调设备的空调主机是否达到预定空调效果的基础，以便控制和调节 压缩机的转速并驱动恒压空调设备的压缩机产生变频运行效果。

公开(公告)号：US08932962B2

公开(公告)日：2015-01-13

申请号：US13442040

申请日：2012-04-09

Applicant: Weibo Yu ,  Kuo Bin Huang ,  Chao-Cheng Chen ,  Syun-Ming Jang

Inventor： Weibo Yu ,  Kuo Bin Huang ,  Chao-Cheng Chen ,  Syun-Ming Jang

IPC: H01L21/302

CPC classification number: H01L21/6708 ,  H01L21/30608 ,  H01L21/31111 ,  H01L21/67109 ,  H01L22/12 ,  H01L22/20

Abstract: A method and apparatus for dispensing a liquid etchant onto a wafer dispenses the liquid etchant onto a wafer using a scanning dispensing nozzle while controlling the dispensing temperature of the etchant in real time as a function of the radial position of the dispensing nozzle over the wafer. The dispensing temperature of the etchant is controlled to enhance the effectiveness of the etchant and thus compensate for the lower etching rate zones in the wafer.

Abstract translation: 用于将液体蚀刻剂分配到晶片上的方法和设备使用扫描分配喷嘴将液体蚀刻剂分配到晶片上，同时根据分配喷嘴在晶片上的径向位置实时控制蚀刻剂的分配温度。 控制蚀刻剂的分配温度以提高蚀刻剂的有效性，从而补偿晶片中较低的蚀刻速率区域。

公开(公告)号：US20130320410A1

公开(公告)日：2013-12-05

申请号：US13484047

申请日：2012-05-30

Applicant: Jr-Jung Lin ,  Chih-Han Lin ,  Jin-Aun Ng ,  Ming-Ching Chang ,  Chao-Cheng Chen

Inventor： Jr-Jung Lin ,  Chih-Han Lin ,  Jin-Aun Ng ,  Ming-Ching Chang ,  Chao-Cheng Chen

IPC: H01L29/78 ,  H01L21/283

CPC classification number: H01L29/78 ,  H01L21/283 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/66545

Abstract: The invention relates to integrated circuit fabrication, and more particularly to a metal gate electrode. An exemplary structure for a semiconductor device comprises a substrate comprising a major surface; a first rectangular gate electrode on the major surface comprising a first layer of multi-layer material; a first dielectric material adjacent to one side of the first rectangular gate electrode; and a second dielectric material adjacent to the other 3 sides of the first rectangular gate electrode, wherein the first dielectric material and the second dielectric material collectively surround the first rectangular gate electrode.

Abstract translation: 本发明涉及集成电路制造，更具体地涉及金属栅电极。 半导体器件的示例性结构包括：包括主表面的衬底; 主表面上的第一矩形栅电极，包括第一层多层材料; 与第一矩形栅电极的一侧相邻的第一电介质材料; 以及与所述第一矩形栅电极的其他3侧相邻的第二电介质材料，其中所述第一电介质材料和所述第二电介质材料共同围绕所述第一矩形栅电极。