Seal ring design without stop layer punch through during via etch
    1.
    发明申请
    Seal ring design without stop layer punch through during via etch 审中-公开
    密封圈设计,无停止层通孔蚀刻过程中

    公开(公告)号:US20050184388A1

    公开(公告)日:2005-08-25

    申请号:US10782365

    申请日:2004-02-19

    IPC分类号: H01L23/48 H01L23/58

    摘要: In accordance with the objective of the invention a new method is provided for the creation of a seal ring having dissimilar elements. The Critical Dimensions of the seal ring are selected with respect to the CD of other device features, such a seal vias, such that the difference in etch sensitivity between the created seal ring and the via holes is removed. All etch of the simultaneously etched features is completed at the same time, avoiding punch through of an underlying layer of etch stop material.

    摘要翻译: 根据本发明的目的,提供了一种用于创建具有不同元件的密封环的新方法。 密封环的临界尺寸相对于其它装置特征(例如密封通孔)的CD被选择,使得所产生的密封环和通孔之间的蚀刻敏感性的差异被去除。 同时蚀刻的特征的所有蚀刻同时完成,避免冲蚀下一层蚀刻停止材料。

    Chemistry for etching organic low-k materials
    2.
    发明授权
    Chemistry for etching organic low-k materials 失效
    化学蚀刻有机低k材料

    公开(公告)号:US6040248A

    公开(公告)日:2000-03-21

    申请号:US104032

    申请日:1998-06-24

    CPC分类号: H01L21/31138 H01L21/76802

    摘要: A process for plasma etching of contact and via openings in low-k organic polymer dielectric layers is described which overcomes problems of sidewall bowing and hardmask pattern deterioration by etching the organic layer in a high density plasma etcher with a chlorine/inert gas plasma. By adding chlorine to the oxygen/inert gas plasma, the development of an angular aspect or faceting of the hardmask pattern edges by ion bombardment is abated. Essentially vertical sidewalls are obtained in the openings etched in the organic polymer layer while hardmask pattern integrity is maintained. The addition of a passivating agent such as nitrogen, BCl.sub.3, or CHF.sub.3 to the etchant gas mixture further improves the sidewall profile by reducing bowing through protective polymer formation.

    摘要翻译: 描述了一种用于等离子体蚀刻低k有机聚合物介电层中的接触和通孔开口的方法,其通过用氯/惰性气体等离子体在高密度等离子体蚀刻机中蚀刻有机层来克服侧壁弯曲和硬掩模图案劣化的问题。 通过向氧/惰性气体等离子体中加入氯,减少了通过离子轰击形成硬掩模图案边缘的角度方面或刻面。 在保持硬掩模图案完整性的同时,在有机聚合物层中蚀刻的开口中获得基本垂直的侧壁。 钝化剂如氮气,BCl3或CHF3添加到蚀刻剂气体混合物中,通过减少通过保护性聚合物形成的弯曲来进一步改善侧壁轮廓。

    Method and system for processing multi-layer films
    4.
    发明授权
    Method and system for processing multi-layer films 有权
    多层膜加工方法及系统

    公开(公告)号:US07354524B2

    公开(公告)日:2008-04-08

    申请号:US11358393

    申请日:2006-02-21

    IPC分类号: H01L21/00 G01N21/00

    摘要: A method of processing multi-layer films, the method including: (1) processing a plurality of layers according to selected parameters, (2) determining a plurality of optical characteristics each associated with one of the plurality of layers and determined during the processing of the associated one of the plurality of layers, and (3) determining dynamic processing progressions each based on one of the plurality of optical characteristics that is associated with a particular one of the plurality of layers undergoing the processing.

    摘要翻译: 一种处理多层薄膜的方法,该方法包括:(1)根据选定的参数处理多个层,(2)确定多个光学特性,每个光学特性与多个层之一相关联,并在处理过程中确定 所述多个层中的相关联的一个层,以及(3)基于与经历所述处理的所述多个层中的特定一个层相关联的所述多个光学特性中的一个来确定动态处理进度。

    Dual damascene intermediate structure and method of fabricating same
    5.
    发明申请
    Dual damascene intermediate structure and method of fabricating same 审中-公开
    双镶嵌中间结构及其制造方法

    公开(公告)号:US20050189653A1

    公开(公告)日:2005-09-01

    申请号:US10872946

    申请日:2004-06-21

    摘要: An intermediate structure from which a dual damascene structure may be fabricated includes a first-formed, unfaceted via hole and an intersecting trench both formed by gas plasma etching of a dielectric layer. The sidewall of the via hole is maintained unfaceted during and after trench formation by substantially filling it with a gas-plasma-etchable plug prior to trench formation. The presence of the plug in the via hole during gas plasma etching of the trench, also produces a trench bottom that is substantially flat.

    摘要翻译: 可以制造双镶嵌结构的中间结构包括通过电介质层的气体等离子体蚀刻形成的第一形成的非平行通孔和交叉沟槽。 在沟槽形成期间和之后通孔的侧壁通过在沟槽形成之前用气体等离子体可蚀刻的塞子基本上填充而保持不通气。 在沟槽的气体等离子体蚀刻期间,插塞在通孔中的存在也产生基本上平坦的沟槽底部。

    In-situ discharge to avoid arcing during plasma etch processes
    7.
    发明授权
    In-situ discharge to avoid arcing during plasma etch processes 有权
    原位放电以避免等离子体蚀刻过程中的电弧

    公开(公告)号:US06914007B2

    公开(公告)日:2005-07-05

    申请号:US10366206

    申请日:2003-02-13

    摘要: A method of reducing a charge on a substrate to prevent an arcing incident in a subsequent etch process is described. A patterned substrate is fastened to a chuck in a process chamber. A discharge process is performed that includes the three steps of (a) coupling the chuck to a 0 volt connection, (b) generating a plasma, and (c) coupling the chuck to a high voltage connection. The three steps are carried out in any sequence. An inert gas or an inert gas and an etching gas are flowed into the chamber during the discharge sequence. Alternatively, a fluorocarbon CXFYHZ or a fluorocarbon and a gas such as O2, H2, N2, N2O, CO, CO2, He or Ar is flowed into the chamber during the discharge sequence. The method is compatible with batch or single wafer processes and is extendable to etching low k dielectric layers with poor thermal conductivity.

    摘要翻译: 描述了一种减少衬底上的电荷以防止在后续蚀刻工艺中的电弧入射的方法。 图案化衬底被固定到处理室中的卡盘。 执行放电处理,其包括以下三个步骤:(a)将卡盘耦合到0伏连接,(b)产生等离子体,以及(c)将卡盘耦合到高压连接。 三个步骤以任何顺序进行。 在放电顺序期间,惰性气体或惰性气体和蚀刻气体流入腔室。 或者,碳氟化合物C 1 H Z,或碳氟化合物和气体如O 2 H,H N 2,N 2,N 2 O,CO,CO 2,He或Ar流入室 在放电序列期间。 该方法与批次或单晶片工艺兼容,并且可扩展到蚀刻导热性差的低k电介质层。

    Plasma etch method for forming patterned oxygen containing plasma etchable layer
    8.
    发明授权
    Plasma etch method for forming patterned oxygen containing plasma etchable layer 有权
    用于形成图案化含氧等离子体可刻蚀层的等离子体蚀刻方法

    公开(公告)号:US06440863B1

    公开(公告)日:2002-08-27

    申请号:US09148556

    申请日:1998-09-04

    IPC分类号: H01L21302

    摘要: A method for forming a patterned oxygen containing plasma etchable layer. There is first provided a substrate. There is then formed upon the substrate a blanket oxygen containing plasma etchable layer. There is then formed upon the blanket oxygen containing plasma etchable layer a blanket hard mask layer. There is then formed upon the blanket hard mask layer a patterned photoresist layer. There is then etched while employing a first plasma etch method in conjunction with the patterned photoresist layer as a first etch mask layer the blanket hard mask layer to form a patterned hard mask layer. There is then etched while employing a second plasma etch method in conjunction with at least the patterned hard mask layer as a second etch mask layer the blanket oxygen containing plasma etchable layer to form a patterned oxygen containing plasma etchable layer. The second plasma etch method employs a second etchant gas composition comprising: (1) an oxygen containing etchant gas which upon plasma activation provides an active oxygen etching species; and (2) boron trichloride.

    摘要翻译: 一种用于形成图案化含氧等离子体可刻蚀层的方法。 首先提供基板。 然后在衬底上形成包含氧气的等离子体可蚀刻层。 然后在橡皮布含氧等离子体可蚀刻层上形成橡皮布硬掩模层。 然后在橡皮布硬掩模层上形成图案化的光致抗蚀剂层。 然后蚀刻,同时采用第一等离子体蚀刻方法结合图案化的光致抗蚀剂层作为第一蚀刻掩模层,橡皮布硬掩模层以形成图案化的硬掩模层。 然后蚀刻,同时采用第二等离子体蚀刻方法结合至少图案化的硬掩模层作为第二蚀刻掩模层,该覆盖氧含氧等离子体可蚀刻层以形成图案化的含氧等离子体可蚀刻层。 第二等离子体蚀刻方法采用第二蚀刻剂气体组合物,其包括:(1)含氧蚀刻剂气体,其在等离子体激活时提供活性氧蚀刻物质; 和(2)三氯化硼。

    Process for forming an integrated contact or via
    9.
    发明授权
    Process for forming an integrated contact or via 有权
    用于形成集成接触或通孔的工艺

    公开(公告)号:US06319822B1

    公开(公告)日:2001-11-20

    申请号:US09164999

    申请日:1998-10-01

    IPC分类号: H01L214763

    摘要: A method for etching of sub-quarter micron openings in insulative layers for contacts and vias is described. The method uses hardmask formed of carbon enriched titanium nitride. The hardmask has a high selectivity for etching contact and via openings in relatively thick insulative layers. The high selectivity requires a relatively thin hardmask which can be readily patterned by thin photoresist masks, making the process highly desirable for DUV photolithography. The hardmask is formed by MOCVD using a metallorganic titanium precursor. By proper selection of the MOCVD deposition conditions, a controlled amount of carbon is incorporated into the TiN film. The carbon is released as the hardmask erodes during plasma etching and participates in the formation of a protective polymer coating along the sidewalls of the opening being etched in the insulative layer. The protective sidewall polymer inhibits lateral chemical etching and results in openings with smooth, straight, and near-vertical sidewalls without loss of dimensional integrity.

    摘要翻译: 描述了用于在接触和通孔的绝缘层中蚀刻二分之一微米开口的方法。 该方法使用由富碳氮化钛形成的硬掩模。 硬掩模在相对较厚的绝缘层中对蚀刻接触和通孔的选择性很高。 高选择性需要相对薄的硬掩模,其可以通过薄的光致抗蚀剂掩模容易地图案化,使得该工艺对于DUV光刻非常期望。 硬掩模由MOCVD使用金属有机钛前体形成。 通过适当选择MOCVD沉积条件,将受控量的碳纳入TiN膜中。 在等离子体蚀刻期间,随着硬掩模腐蚀而释放碳,并且参与沿着在绝缘层中蚀刻的开口的侧壁形成保护性聚合物涂层。 保护性侧壁聚合物抑制侧向化学蚀刻并导致具有平滑,直的和近垂直的侧壁的开口,而不损失尺寸完整性。

    Method for etching reliable small contact holes with improved profiles
for semiconductor integrated circuits using a carbon doped hard mask
    10.
    发明授权
    Method for etching reliable small contact holes with improved profiles for semiconductor integrated circuits using a carbon doped hard mask 失效
    用于使用碳掺杂的硬掩模来蚀刻具有改进的半导体集成电路的轮廓的可靠的小接触孔的方法

    公开(公告)号:US6025273A

    公开(公告)日:2000-02-15

    申请号:US55433

    申请日:1998-04-06

    摘要: A method is achieved for fabricating small contact holes in an interlevel dielectric (ILD) layer for integrated circuits. The method increases the ILD etch rate while reducing residue build-up on the contact hole sidewall. This provides a very desirable process for making contact holes small than 0.25 um in width. After depositing the ILD layer over the partially completed integrated circuit which includes patterned doped first polysilicon layers, a second polysilicon layer is deposited and doped with carbon by ion implantation. A photoresist mask is used to etch openings in the carbon doped polysilicon layer to form a hard mask. The photoresist is removed, and the contact holes are plasma etched in the ILD layer while free carbon released from the hard mask, during etching, reduces the free oxygen in the plasma. This results in an enhanced fluorine (F.sup.+) etch rate for the contact holes in the ILD layer and reduces the residue build-up on the sidewalls of the contact holes. The hard mask is anneal in O.sub.2 to form an oxide layer and any surface carbon is removed in a wet etch. Reliable metal plugs can now be formed by depositing a barrier layer, such as titanium (Ti) or titanium nitride (TiN) and a metal such as tungsten (W) and etching back or chemical/mechanical polishing back to the oxide layer.

    摘要翻译: 实现了用于在用于集成电路的层间电介质(ILD)层中制造小接触孔的方法。 该方法增加了ILD蚀刻速率,同时减少了接触孔侧壁上的残留物积聚。 这提供了使接触孔宽度小于0.25μm的非常理想的方法。 在包括图案化掺杂的第一多晶硅层的部分完成的集成电路上沉积ILD层之后,通过离子注入沉积第二多晶硅层并掺杂碳。 光致抗蚀剂掩模用于蚀刻碳掺杂多晶硅层中的开口以形成硬掩模。 去除光致抗蚀剂,并且在ILD层中对接触孔进行等离子体蚀刻,而在蚀刻期间从硬掩模释放出的游离碳降低了等离子体中的游离氧。 这导致ILD层中的接触孔的氟(F +)蚀刻速率增加,并减少了接触孔的侧壁上的残留物积聚。 硬掩模在O 2中退火以形成氧化物层,并且在湿蚀刻中除去任何表面碳。 现在可以通过沉积诸如钛(Ti)或氮化钛(TiN)和诸如钨(W)的金属的阻挡层并且将氧化物层回蚀刻或化学/机械抛光来形成可靠的金属插塞。