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    Audio amplifier with embedded buck controller for class-G application
    41.
    发明授权
    Audio amplifier with embedded buck controller for class-G application 有权

    公开(公告)号：US11018644B2

    公开(公告)日：2021-05-25

    申请号：US16695010

    申请日：2019-11-25

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

    Inventor： XiangSheng Li ,  Ru Feng Du

    IPC: H03G3/30 ,  H03F3/187 ,  H04R3/00 ,  H04R29/00

    Abstract: An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

    Two-stage error amplifier with nested-compensation for LDO with sink and source ability
    42.
    发明授权
    Two-stage error amplifier with nested-compensation for LDO with sink and source ability 有权

    公开(公告)号：US10725488B2

    公开(公告)日：2020-07-28

    申请号：US15679274

    申请日：2017-08-17

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

    Inventor： Ni Zeng

    IPC: G05F1/575

    Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

    CURRENT SENSING CIRCUIT AND METHOD
    43.
    发明申请
    CURRENT SENSING CIRCUIT AND METHOD 审中-公开

    公开(公告)号：US20190049511A1

    公开(公告)日：2019-02-14

    申请号：US16057089

    申请日：2018-08-07

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Shenzhen) R&D Co, Ltd.

    Inventor： Edoardo Botti ,  Davide Luigi Brambilla ,  Hong Wu Lin

    IPC: G01R31/26 ,  H03K17/687 ,  G01R19/00

    Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.

    Methods and circuits to reduce pop noise in an audio device
    44.
    发明授权
    Methods and circuits to reduce pop noise in an audio device 有权

    公开(公告)号：US10193506B2

    公开(公告)日：2019-01-29

    申请号：US15377929

    申请日：2016-12-13

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

    Inventor： Ru Feng Du ,  Qi Yu Liu

    IPC: H03F1/32 ,  H03G3/34 ,  H03F3/45 ,  H03F3/187 ,  H03F3/217 ,  H03F1/02 ,  H04R3/00 ,  H03F1/30 ,  H03F3/183 ,  H03F3/185 ,  H03F3/21

    Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.

    Proximity detector device with interconnect layers and related methods
    45.
    发明授权
    Proximity detector device with interconnect layers and related methods 有权

    公开(公告)号：US10141471B2

    公开(公告)日：2018-11-27

    申请号：US15668138

    申请日：2017-08-03

    Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO., LTD.

    Inventor： Jing-En Luan

    IPC: H01L31/173 ,  H01L31/0203 ,  H01L31/0232 ,  G01S7/481 ,  G01S17/02 ,  G01S17/08 ,  H01L23/00

    Abstract: A proximity detector device may include a first interconnect layer including a first dielectric layer, and first electrically conductive traces carried thereby, an IC layer above the first interconnect layer and having an image sensor IC, and a light source IC laterally spaced from the image sensor IC. The proximity detector device may include a second interconnect layer above the IC layer and having a second dielectric layer, and second electrically conductive traces carried thereby. The second interconnect layer may have first and second openings therein respectively aligned with the image sensor IC and the light source IC. Each of the image sensor IC and the light source IC may be coupled to the first and second electrically conductive traces. The proximity detector device may include a lens assembly above the second interconnect layer and having first and second lenses respectively aligned with the first and second openings.

    POWER ON RESET (POR) CIRCUIT
    47.
    发明申请
    POWER ON RESET (POR) CIRCUIT 审中-公开

    公开(公告)号：US20170336822A1

    公开(公告)日：2017-11-23

    申请号：US15671657

    申请日：2017-08-08

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

    Inventor： Yong Feng Liu

    IPC: G05F3/26

    CPC classification number: G05F3/267

    Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

    Current limiting circuit
    48.
    发明授权
    Current limiting circuit 有权

    公开(公告)号：US09778670B2

    公开(公告)日：2017-10-03

    申请号：US14267957

    申请日：2014-05-02

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

    Inventor： Ni Zeng

    IPC: G05F1/573

    CPC classification number: G05F1/573

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

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