Abstract:
A signal processor comprises a plurality of processing circuits for carrying out various kinds of processing which differ from one another; a memory circuit provided commonly for respective processing circuits, and a control circuit for carrying out access control between the respective processing circuits and the memory circuit, characterized in that the control circuit carries out address control in different units in accordance with the respective processing circuits.
Abstract:
A reproducing apparatus includes a reading unit configured to generate a reproduced signal containing information data recorded in a track using a reflected light of an optical beam, a clock generation unit configured to generate a clock having a frequency associated with a wobbling cycle of the track, and a control unit configured to detect a phase difference between the reproduced signal and the clock, and to control the clock generation unit using the phase difference detection result.
Abstract:
A signal recording apparatus, for recording a TV signal in which an audio signal such as a MUSE signal and a video signal are multiplexed in a time sharing manner in units of a given period of time, is arranged to code these video and audio signals alike, to dispersively allocate a discretely separated audio signal within the video signal, and to provide symbols other than the symbols the audio and video signals within each of synchronizing block for the purpose of permitting the use of other video signal recording apparatuses. The arrangement permits simplification and high-quality of the apparatus for recording the signals of this kind and thus contributes to the popularization of the apparatus.
Abstract:
The interface between two nonmagnetic fluids, typically liquid layers, in contact with each other is changed by applying a magnetic field thereto. The interface is raised or depressed into an upward or downward convex shape.
Abstract:
A signal processing device including a central processing block and plural signal processing function blocks, which are mutually connected by a common address bus and a common data bus, wherein analog signal lines are provided for analog signal transmission between the central processing block and the plural signal processing function blocks and the central processing block is provided with a D/A converter and an A/D converter connected to the analog signal lines. Thus there are only required a D/A converter and an A/D converter in the central processing block, for analog signal transmission between the central processing block and each of the processing function blocks. Also the wiring can be simplified as the number of analog signal lines is limited.
Abstract:
A digital signal to be recorded is converted into a digital signal having a suppressed low-frequency spectrum and having a shortest recording wavelength greater than half an original shortest recording wavelength, and the converted digital signal is recorded on a magnetic recording medium in which a plurality of metal evaporated films having different crystal-growth directions are laminated. The digital signal is reproduced from the magnetic recording medium in which the plurality of metal evaporated films having different crystal-growth directions are laminated. Waveform equalization is performed on the reproduced digital signal, and integration detection is performed on the waveform-equalized digital signal, thereby restoring an original digital signal.
Abstract:
In an apparatus for recording an information signal on a recording medium forming many parallel tracks on the medium and for reproducing the information signal from the medium, a tracking control system is arranged to record a pilot signal of a given frequency along with the information signal in the first of the many tracks; to have the pilot signal also recorded in second and third tracks adjoining the first track on both sides thereof but at pilot signal phases shifted from the pilot signal phase of the first track to equal degrees in the directions opposite to each other at parts of the second and third tracks aligned perpendicularly to the longitudinal direction of the first track; and, in reproducing the information signal, the position of the recording medium and that of a reproducing head relative to each other are controlled on the basis of the pilot signal of the given frequency reproduced by the reproducing head from the first track along with the information signal.
Abstract:
A video signal processing device is arranged to supply a digital video signal to an infinite impulse response digital filter, to supply the digital video signal from the filter to a look-up table circuit which has a non-linear input-output characteristic, and to emphasize a high-frequency component of the digital video signal by adding the output signal of the look-up table circuit to the digital video signal supplied to the filter, so that a non-linearly emphasizing process can be accomplished at a high speed on the digital video signal. Further, in the video signal processing device, a look-up table circuit is arranged to look up a table by using as an address the output signal of a first subtractor which receives a high-frequency-component-emphasized digital video signal as one of its inputs and to have a non-linear input-output characteristic, the output signal of the look-up table circuit is subtracted from the high-frequency-component-emphasized digital video signal to obtain a high-frequency-component-suppressed digital video signal, the video signal thus obtained is supplied to an infinite impulse response digital filter, and the output signal of the filter is supplied to the first subtracter as its other input, so that the digital video signal can be non-linearly deemphasized at a high speed.
Abstract:
A digital signal recording apparatus is provided with data compressing means for reducing the amount of data of digital information supplied; recording means which is arranged to be capable of selectively recording the digital data supplied or digital data compressed by the data compressing means by means of at least one pair of heads; and switching means for switching a cycle in which recording is performed by the pair of heads from one cycle over to another according to the information to be recorded by the recording means.
Abstract:
A video signal processing device includes first access circuitry for writing a video signal in a memory capable of storing a video signal of at least two picture frames, and second access circuitry for reading the video signal from the memory. Comparision circuitry then compares a first address accessed by the first access circuitry with a second address accessed by the second access circuitry. The second address is then shifted by the amount of an integer of picture frames in accordance with the result of the comparison either at the moment when the first access circuitry is granted access to the memory or when access of the first access circuitry to the memory is stopped.