公开(公告)号：US20120003769A1

公开(公告)日：2012-01-05

申请号：US13233399

申请日：2011-09-15

Applicant: Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

Inventor： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

IPC: H01L33/08

CPC classification number: H01L29/7869 ,  H01L27/1225

Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

Abstract translation: 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US08088653B2

公开(公告)日：2012-01-03

申请号：US12604318

申请日：2009-10-22

Applicant: Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

Inventor： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC: H01L21/00

CPC classification number: H01L29/78669 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

Abstract: A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.

Abstract translation: TFT包括栅电极，有源层，源电极，漏电极和缓冲层。 栅电极形成在基板上; 在栅电极上形成有源层。 形成在有源层上的源电极和漏电极分开预定的距离。 缓冲层形成在有源层与源极和漏极之间。 缓冲层具有对应于缓冲层厚度的基本连续变化的含量比。 形成缓冲层以抑制有源层的氧化，并降低接触电阻。

公开(公告)号：US20110261040A1

公开(公告)日：2011-10-27

申请号：US13090991

申请日：2011-04-20

Applicant: Sang-Youn HAN ,  Dong-Kwon KIM ,  Kyung-Sook JEON ,  Sung-Hoon YANG ,  Joo-Han KIM ,  Woong-Kwon KIM ,  Suk-Won JUNG ,  Byeong-Hoon CHO ,  Dae-Cheol KIM ,  Hui-Sung LEE ,  Ki-Hun JEONG ,  Seung-Mi SEO ,  Jung-Suk BANG ,  Kun-Wook HAN ,  Mi-Seon SEO

Inventor： Sang-Youn HAN ,  Dong-Kwon KIM ,  Kyung-Sook JEON ,  Sung-Hoon YANG ,  Joo-Han KIM ,  Woong-Kwon KIM ,  Suk-Won JUNG ,  Byeong-Hoon CHO ,  Dae-Cheol KIM ,  Hui-Sung LEE ,  Ki-Hun JEONG ,  Seung-Mi SEO ,  Jung-Suk BANG ,  Kun-Wook HAN ,  Mi-Seon SEO

IPC: G09G5/00

CPC classification number: G06F3/0418 ,  G06F3/042

Abstract: An information detection device includes: a plurality of light sensing units each configured to detect light; a plurality of sensor scanning drivers each configured to apply sensor scanning signals to the light sensing units; a sensing signal processor configured to receive position information detected by the light sensing units; a plurality of bias applying units each configured to apply bias voltages to the light sensing units; wherein each bias applying unit applies a different polarity of bias voltage.

Abstract translation: 信息检测装置包括：多个光检测单元，每个光检测单元被配置为检测光; 多个传感器扫描驱动器，每个传感器扫描驱动器被配置为将传感器扫描信号施加到光感测 感测信号处理器，被配置为接收由所述光感测单元检测到的位置信息; 多个偏置施加单元，每个偏置施加单元被配置为向所述光感测单元施加偏置电压; 其中每个偏置施加单元施加不同的偏置电压极性。

公开(公告)号：US08035100B2

公开(公告)日：2011-10-11

申请号：US12197573

申请日：2008-08-25

Applicant: Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

Inventor： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC: H01L29/12

CPC classification number: H01L29/7869 ,  H01L27/1225

Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

Abstract translation: 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US20110204370A1

公开(公告)日：2011-08-25

申请号：US13027453

申请日：2011-02-15

Applicant: Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

Inventor： Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

IPC: H01L33/08 ,  H01L29/786 ,  H01L21/44

CPC classification number: H01L29/78693 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/3248 ,  H01L27/3262 ,  H01L51/5203

Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

Abstract translation: 提供了一种薄膜晶体管（TFT）基板，其制造方法和包括该薄膜晶体管的显示装置。 TFT基板包括形成在基板上的栅电极，形成在栅电极上的栅极绝缘层，形成在栅极绝缘层上的氧化物半导体图案，形成在氧化物半导体图案上的源电极，形成在氧化物上的漏电极 面对源电极的半导体图案，以及形成在栅极绝缘层上的像素电极。

公开(公告)号：US20110183463A1

公开(公告)日：2011-07-28

申请号：US12961170

申请日：2010-12-06

Applicant: Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

Inventor： Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

IPC: H01L21/336

CPC classification number: H01L29/78618 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/7869

Abstract: A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

Abstract translation: 制造薄膜晶体管（“TFT”）基板的方法包括在基板上形成包括栅电极的第一导电图案组，在第一导电图案组上形成栅极绝缘层，形成半导体层和欧姆接触层 通过图案化非晶硅层和氧化物半导体层，在栅极绝缘层上，通过图案化数据金属层，在欧姆接触层上形成包括源电极和漏电极的第二导电图案组，形成包括接触的保护层 并且在保护层的接触孔上形成像素电极。 还提供了包括由氧化物半导体形成的欧姆接触层的TFT基板。

公开(公告)号：US20110109609A1

公开(公告)日：2011-05-12

申请号：US12899409

申请日：2010-10-06

Applicant: Ki-Hun Jeong ,  Sung-Hoon Yang ,  Kap-Soo Yoon ,  Kyung-Sook Jeon ,  Seung Mi Seo

Inventor： Ki-Hun Jeong ,  Sung-Hoon Yang ,  Kap-Soo Yoon ,  Kyung-Sook Jeon ,  Seung Mi Seo

IPC: G06F3/038 ,  H01L31/18 ,  H01L33/00

CPC classification number: H01L31/1136 ,  G02F1/13318 ,  G06F2203/04103

Abstract: A touch sensitive display device utilizing infrared ray sensing transistors. The transistors are configured, and comprise specified materials, to allow them to be formed with fewer photolithography processes, reducing cost and manufacturing time.

Abstract translation: 一种使用红外线感测晶体管的触敏显示装置。 晶体管被配置并且包括指定的材料，以允许它们用更少的光刻工艺形成，从而降低成本和制造时间。

公开(公告)号：US07902553B2

公开(公告)日：2011-03-08

申请号：US11930536

申请日：2007-10-31

Applicant: Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

Inventor： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

IPC: H01L29/04

CPC classification number: H01L27/1255 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765

Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.

Abstract translation: 薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层 该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

公开(公告)号：US07902549B2

公开(公告)日：2011-03-08

申请号：US11950476

申请日：2007-12-05

Applicant: Sung-Hoon Yang ,  Wan-Shick Hong ,  Kwan-Wook Jung

Inventor： Sung-Hoon Yang ,  Wan-Shick Hong ,  Kwan-Wook Jung

IPC: H01L31/036

CPC classification number: G02F1/136227 ,  C23C16/30 ,  G02F2001/136222 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/1288 ,  H01L27/3244 ,  H01L29/458 ,  H01L29/4908 ,  H01L51/56

Abstract: The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Abstract translation: 本发明涉及一种用于气相沉积低介电绝缘膜的方法，使用其的薄膜晶体管及其制备方法，更具体地涉及可以显着改善蒸气的低介电绝缘膜的气相沉积方法 同时保持低介电绝缘膜的性能，从而解决了寄生电容问题，以实现高开口率结构，并且通过使用硅烷气体通过CVD或PECVD方法蒸镀绝缘膜时可以减少处理时间，以形成 用于半导体器件的保护膜。 本发明还涉及使用该方法及其制备方法的薄膜晶体管。

公开(公告)号：US20100127961A1

公开(公告)日：2010-05-27

申请号：US12537702

申请日：2009-08-07

Applicant: CHUL HUH ,  Ki-Hun Jeong ,  Jae-Ho Choi ,  Yang-Ho Jung ,  Jin-Seuk Kim ,  Sang-Hun Lee ,  Gwan-Soo Kim ,  Sung-Hoon Yang

Inventor： CHUL HUH ,  Ki-Hun Jeong ,  Jae-Ho Choi ,  Yang-Ho Jung ,  Jin-Seuk Kim ,  Sang-Hun Lee ,  Gwan-Soo Kim ,  Sung-Hoon Yang

IPC: G09G3/36

CPC classification number: G02F1/136227 ,  G02F2001/134345 ,  G02F2001/136222

Abstract: A thin film transistor array panel including a substrate, gate lines formed on the substrate and extending in a first direction, data lines formed on the substrate and extending in a second direction, wherein the data lines cross and are insulated from the gate lines, and thin film transistors each with a control terminal, an input terminal, and an output terminal. The control and input terminals of the thin film transistor are connected to the gate and data lines. A barrier rib is formed on the gate lines, the data lines, and the thin film transistors. The barrier rib has the same pattern as the gate lines, the data lines, and the thin film transistors. Color filters fill regions demarcated by the barrier rib. Pixel electrodes are formed on the color filters. The output terminal of the thin film transistor has an opening, and a portion of the barrier rib formed on the output terminal has an output opening. The barrier rib output terminal portion has the same pattern as the output terminal. With the thin film transistor array panel, a barrier rib for forming contact holes is formed through exposing a positive photosensitive organic layer formed on a passivation layer to light from the backside of a substrate by using drain electrodes with openings as a light blocking film.

Abstract translation: 一种薄膜晶体管阵列面板，包括基板，形成在基板上并沿第一方向延伸的栅极线，形成在基板上并沿第二方向延伸的数据线，其中数据线交叉并与栅极线绝缘，以及 薄膜晶体管分别具有控制端子，输入端子和输出端子。 薄膜晶体管的控制和输入端子连接到栅极和数据线。 在栅极线，数据线和薄膜晶体管上形成障壁。 阻挡肋具有与栅极线，数据线和薄膜晶体管相同的图案。 彩色滤光片填充由障壁划分的区域。 像素电极形成在滤色器上。 薄膜晶体管的输出端子具有开口，并且形成在输出端子上的阻挡肋的一部分具有输出开口。 隔壁输出端子部分具有与输出端子相同的图案。 利用薄膜晶体管阵列面板，通过使用具有开口的漏极作为遮光膜，形成用于形成接触孔的阻挡肋，其通过将形成在钝化层上的正性光敏有机层暴露于来自衬底背面的光而形成。