公开(公告)号：US5557201A

公开(公告)日：1996-09-17

申请号：US430697

申请日：1995-04-28

申请人： Robert L. Kleinberg ,  Abdurrahman Sezginer

发明人： Robert L. Kleinberg ,  Abdurrahman Sezginer

IPC分类号： G01R33/383 ,  G01R33/44 ,  G01V3/32 ,  G01R33/20

CPC分类号： G01N24/081 ,  G01V3/32 ,  G01R33/383

摘要： The instruments of a pulsed nuclear magnetic resonance (NMR) device are included in a drill collar for evaluating earth formations. The resulting tool makes NMR measurements while the formation is being drilled.

摘要翻译： 脉冲核磁共振（NMR）装置的仪器被包括在用于评估地层的钻铤中。 所得到的工具在钻探地层时进行NMR测量。

公开(公告)号：US08716135B1

公开(公告)日：2014-05-06

申请号：US12264139

申请日：2008-11-03

申请人： Judy Huckabay ,  Milind Weling ,  Abdurrahman Sezginer

发明人： Judy Huckabay ,  Milind Weling ,  Abdurrahman Sezginer

IPC分类号： H01L21/308 ,  H01L21/033 ,  H01L21/306

CPC分类号： H01L21/0338 ,  H01L21/0334 ,  H01L21/0337 ,  H01L21/30621

摘要： Methods of semiconductor device fabrication techniques using double patterning are disclosed. According to various embodiments of the invention, methods of semiconductor device fabrication using self-aligned double patterning are provided. Particular embodiments of the invention allow creation of logic circuit patterns using two lithographic operations. One embodiment of the invention employs self-aligned double patterning to define two or more sets of parallel line features with a connection feature between the sets. In such embodiments, the sets of parallel line features along with the connection features are formed using two lithographic masks, without the need for an additional mask layer to form the connection. In other embodiments, other features in addition to the connection can be added in the same mask layer.

摘要翻译： 公开了使用双重图案化的半导体器件制造技术的方法。 根据本发明的各种实施例，提供了使用自对准双重图案化的半导体器件制造方法。 本发明的特定实施例允许使用两个光刻操作创建逻辑电路图案。 本发明的一个实施例采用自对准双重图案化来定义两组或更多组具有组之间的连接特征的平行线特征。 在这样的实施例中，使用两个光刻掩模来形成平行线特征的集合以及连接特征，而不需要额外的掩模层来形成连接。 在其他实施例中，除了连接之外的其他特征可以添加在相同的掩模层中。

公开(公告)号：US08440569B2

公开(公告)日：2013-05-14

申请号：US11952703

申请日：2007-12-07

申请人： Milind Weling ,  Abdurrahman Sezginer

发明人： Milind Weling ,  Abdurrahman Sezginer

IPC分类号： H01L21/302

CPC分类号： H01L21/0337 ,  H01L21/0338 ,  H01L21/32139

摘要： Methods of semiconductor device fabrication are disclosed. An exemplary method includes processes of depositing a first pattern on a semiconductor substrate, wherein the first pattern defines wide and narrow spaces; depositing spacer material over the first pattern on the substrate; etching the spacer material such that the spacer material is removed from horizontal surfaces of the substrate and the first pattern but remains adjacent to vertical surfaces of a wide space defined by the first pattern and remains within narrow a space defined by the first pattern; and removing the first pattern from the substrate. In one embodiment, the first pattern can comprise sacrificial material, which can include, for example, polysilicon material. The deposition can comprise physical vapor deposition, chemical vapor deposition, electrochemical deposition, molecular beam epitaxy, atomic layer deposition or other deposition techniques. According to another embodiment, features for lines and logic device components having a width greater than that of the lines are formed in the spacer material in the same mask layer.

摘要翻译： 公开了半导体器件制造方法。 示例性方法包括在半导体衬底上沉积第一图案的过程，其中第一图案限定宽而窄的空间; 在衬底上的第一图案上沉积间隔物材料; 蚀刻间隔物材料，使得间隔物材料从基底和第一图案的水平表面移除，但保持邻近由第一图案限定的宽空间的垂直表面，并保持在由第一图案限定的狭窄空间内; 并从衬底去除第一图案。 在一个实施例中，第一图案可以包括牺牲材料，其可以包括例如多晶硅材料。 沉积可以包括物理气相沉积，化学气相沉积，电化学沉积，分子束外延，原子层沉积或其它沉积技术。 根据另一个实施例，在相同掩模层中的间隔物材料中形成具有大于线的宽度的线和逻辑器件部件的特征。

公开(公告)号：US20120102442A1

公开(公告)日：2012-04-26

申请号：US13271194

申请日：2011-10-11

申请人： Justin Ghan ,  Abdurrahman Sezginer

发明人： Justin Ghan ,  Abdurrahman Sezginer

IPC分类号： G06F17/50

CPC分类号： G03F7/70466 ,  G03F1/70

摘要： Some embodiments provide a method for optimally decomposing patterns within particular spatial regions of interest on a particular layer of a design layout for a multi-exposure photolithographic process. Specifically, some embodiments model the spatial region using a mathematical equation in terms of two or more intensities. Some embodiments then optimize the model across a set of feasible intensities. The optimization yields a set of intensities such that the union of the patterns created/printed from each exposure intensity most closely approximates the patterns within the particular regions. Based on the set of intensities, some embodiments then determine a decomposition solution for the patterns that satisfies design constraints of a multi-exposure photolithographic printing process. In this manner, some embodiments achieve an optimal photolithographic printing of the particular regions of interest without performing geometric rule based decomposition.

摘要翻译： 一些实施例提供了一种用于在用于多曝光光刻工艺的设计布局的特定层上的特定空间区域内最佳分解图案的方法。 具体地，一些实施例使用两个或更多个强度的数学方程来建模空间区域。 一些实施例然后在一组可行的强度上优化模型。 优化产生一组强度，使得从每个曝光强度创建/打印的图案的并集最接近于特定区域内的图案。 基于强度集合，一些实施例然后确定满足多曝光光刻印刷处理的设计约束的图案的分解解。 以这种方式，一些实施例在不执行基于几何规则的分解的情况下实现特定感兴趣区域的最佳光刻印刷。

公开(公告)号：US08069423B2

公开(公告)日：2011-11-29

申请号：US12189692

申请日：2008-08-11

申请人： Justin Ghan ,  Abdurrahman Sezginer

发明人： Justin Ghan ,  Abdurrahman Sezginer

IPC分类号： G06F17/50

CPC分类号： G03F7/70466 ,  G03F1/70

摘要： Some embodiments provide a method for optimally decomposing patterns within particular spatial regions of interest on a particular layer of a design layout for a multi-exposure photolithographic process. Specifically, some embodiments model the spatial region using a mathematical equation in terms of two or more intensities. Some embodiments then optimize the model across a set of feasible intensities. The optimization yields a set of intensities such that the union of the patterns created/printed from each exposure intensity most closely approximates the patterns within the particular regions. Based on the set of intensities, some embodiments then determine a decomposition solution for the patterns that satisfies design constraints of a multi-exposure photolithographic printing process. In this manner, some embodiments achieve an optimal photolithographic printing of the particular regions of interest without performing geometric rule based decomposition.

摘要翻译： 一些实施例提供了一种用于在用于多曝光光刻工艺的设计布局的特定层上的特定空间区域内最佳分解图案的方法。 具体地，一些实施例使用两个或更多个强度的数学方程来建模空间区域。 一些实施例然后在一组可行的强度上优化模型。 优化产生一组强度，使得从每个曝光强度创建/打印的图案的并集最接近于特定区域内的图案。 基于强度集合，一些实施例然后确定满足多曝光光刻印刷处理的设计约束的图案的分解解。 以这种方式，一些实施例在不执行基于几何规则的分解的情况下实现特定感兴趣区域的最佳光刻印刷。

公开(公告)号：US07913197B1

公开(公告)日：2011-03-22

申请号：US12035413

申请日：2008-02-21

申请人： Michiel Victor Paul Kruger ,  Bayram Yenikaya ,  Anwei Liu ,  Abdurrahman Sezginer ,  Wolf Staud

发明人： Michiel Victor Paul Kruger ,  Bayram Yenikaya ,  Anwei Liu ,  Abdurrahman Sezginer ,  Wolf Staud

IPC分类号： G06F17/50 ,  G06F19/00 ,  G03F1/00 ,  G21K5/00

CPC分类号： G03F7/70466 ,  G03F7/70475

摘要： According to various embodiments of the invention systems and methods for multiple pattern lithography, wherein a target layout pattern that is not capable of being printed in one lithography step is decomposed into multiple patterns that are printable in one lithography operation and, when appropriate, a continuous junction is utilized for where patterns overlap. In a further embodiment, where a continuous junction is not utilized, a splice is utilized at overlap locations. In yet another embodiment, where splices are utilized for overlap locations, identifying where critical nets are located in the target layout pattern, determining how close a component of the critical net is to a splice, and changing the target layout pattern as to avoid the condition of a component of the critical net being in proximity to a splice. In another embodiment of the invention, where splices are utilized at overlap locations, placing a landing pad of contacts or vias at the same location as the splice.

摘要翻译： 根据本发明的各种实施例，用于多图案光刻的系统和方法，其中不能在一个光刻步骤中打印的目标布局图案被分解成可在一个光刻操作中可打印的多个图案，并且在适当时将其连续 结点用于图案重叠的位置。 在另一实施例中，在不使用连续结的情况下，在重叠位置处使用接头。 在另一个实施例中，其中接头用于重叠位置，识别关键网位于目标布局图案中的位置，确定关键网络的部件对拼接有多接近，并且改变目标布局图案以避免条件 关键网的组件位于接头附近。 在本发明的另一个实施例中，其中在重叠位置处使用接头时，将接触点或通孔的接合垫放置在与接头相同的位置处。

公开(公告)号：US20110014786A1

公开(公告)日：2011-01-20

申请号：US12582366

申请日：2009-10-20

申请人： Abdurrahman Sezginer ,  David Cooke Noice ,  Jason Sweis ,  Vassilios Gerousis ,  Sozen Yao

发明人： Abdurrahman Sezginer ,  David Cooke Noice ,  Jason Sweis ,  Vassilios Gerousis ,  Sozen Yao

IPC分类号： H01L21/768 ,  G06F17/50

CPC分类号： G06F17/5077 ,  G06F2217/12 ,  Y02P90/265

摘要： Disclosed are a method, apparatus, and program product for routing an electronic design using double patenting that is correct by construction. The layout that has been routed will by construction be designed to allow successful manufacturing with double patenting, since the router will not allow a routing configuration in the layout that cannot be successfully manufactured with double patterning.

摘要翻译： 公开了一种用于通过构造正确的双重专利路由选择电子设计的方法，装置和程序产品。 已经布线的布局将通过结构设计，以允许成功制造双重专利，因为路由器将不允许布局中的路由配置不能用双重图案化成功制造。

公开(公告)号：US20090307649A1

公开(公告)日：2009-12-10

申请号：US12136277

申请日：2008-06-10

申请人： Dipankar Pramanik ,  Michiel Victor Paul Kruger ,  Roy V. Prasad ,  Abdurrahman Sezginer

发明人： Dipankar Pramanik ,  Michiel Victor Paul Kruger ,  Roy V. Prasad ,  Abdurrahman Sezginer

IPC分类号： G06F17/50

CPC分类号： G06F17/50 ,  G03F1/144 ,  G03F1/36

摘要： The present invention provides a method for compensating, infidelities of a process that transfers a pattern to a layer of an integrated circuit, by minimizing, with respect to a photomask pattern, a cost function that quantifies the deviation between designed and simulated values of circuit parameters of the pattern formed on a semiconductor wafer.

摘要翻译： 本发明提供了一种用于通过使关于光掩模图案最小化量化电路参数的设计值和模拟值之间的偏差的成本函数来补偿将图案转移到集成电路层的过程的不忠 形成在半导体晶片上的图案。

公开(公告)号：US07170604B2

公开(公告)日：2007-01-30

申请号：US10613378

申请日：2003-07-03

申请人： Abdurrahman Sezginer ,  Kenneth Johnson

发明人： Abdurrahman Sezginer ,  Kenneth Johnson

IPC分类号： G01B11/00 ,  G03F9/00 ,  G03C5/00 ,  H01L23/544 ,  H01L21/76

CPC分类号： H01L23/544 ,  G03F7/70633 ,  H01L22/24 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： An overlay target includes two pairs of test patterns used to measure overlay in x and y directions, respectively. Each test pattern includes upper and lower grating layers. A single pitch (periodic spacing) is used for all gratings. Within each test pattern, the upper and lower grating layers are laterally offset from each other to define an offset bias. Each pair of test patterns has offset biases that differ by the grating pitch/4. This has the important result that the combined optical response of the test patterns is sensitive to overlay for all values of overlay. An algorithm obtains overlay and other physical properties of the two or more test patterns from their optical responses in one combined regression operation.

摘要翻译： 覆盖目标包括两对测试模式，分别用于测量x和y方向上的覆盖。 每个测试图案包括上和下光栅层。 所有光栅都使用单个间距（周期性间隔）。 在每个测试图案中，上和下光栅层彼此横向偏移以限定偏移偏移。 每对测试图案具有由光栅间距/ 4不同的偏移偏移。 这具有重要的结果，测试图案的组合光学响应对于所有覆盖值都对覆盖敏感。 在一个组合回归操作中，算法从它们的光学响应中获得两个或更多个测试模式的覆盖和其他物理特性。

公开(公告)号：US20060251994A1

公开(公告)日：2006-11-09

申请号：US11203331

申请日：2005-08-13

申请人： Hsu-Ting Huang ,  Abdurrahman Sezginer

发明人： Hsu-Ting Huang ,  Abdurrahman Sezginer

IPC分类号： G03C5/00

CPC分类号： G03F7/706

摘要： A system and method for characterizing an imaging system causes a diffraction image indicative of a test structure having a generalized line-grating to be formed and then extracts from a measurement of the diffraction image a lens transmittance function, a photoresist property or a defocus distance.

摘要翻译： 用于表征成像系统的系统和方法使得将形成指示具有广义线光栅的测试结构的衍射图像，然后从衍射图像的测量中提取透镜透射函数，光致抗蚀剂性质或散焦距离。