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    SHUTTER EYEWEAR
    2.
    发明申请
    SHUTTER EYEWEAR 有权
    快门眼镜

    公开(公告)号：US20140132913A1

    公开(公告)日：2014-05-15

    申请号：US14072784

    申请日：2013-11-05

    Applicant: Jason Sweis ,  Vivian Liane Rice ,  David Chao ,  Zhiyang Guo

    Inventor： Jason Sweis ,  Vivian Liane Rice ,  David Chao ,  Zhiyang Guo

    IPC: G02C7/16 ,  G02C11/00

    CPC classification number: A61H5/00 ,  A61H2205/024 ,  G02C7/08 ,  G02C7/101 ,  G02C11/10

    Abstract: Apparatuses and methods of shuttering glasses are disclosed. One apparatus includes a first lens operable to blank for a first blocking time, a second lens operable to blank for a second blocking time, and a controller for controllably setting at least one of the first blocking time and the second blocking time.

    Abstract translation: 公开了一种用于制作眼镜的装置和方法。 一种装置包括可操作以消除第一阻塞时间的第一透镜，可操作以空白第二阻断时间的第二透镜，以及用于可控地设置第一阻塞时间和第二阻塞时间中的至少一个的控制器。

    Method of forming interface between die and chip carrier
    4.
    发明授权
    Method of forming interface between die and chip carrier 失效
    在芯片和芯片载体之间形成界面的方法

    公开(公告)号：US5477611A

    公开(公告)日：1995-12-26

    申请号：US123882

    申请日：1993-09-20

    Applicant: Jason Sweis ,  Kenneth B. Gilleo

    Inventor： Jason Sweis ,  Kenneth B. Gilleo

    IPC: H01L23/12 ,  G06K19/077 ,  H01L21/54 ,  H01L23/24 ,  H05K3/34

    CPC classification number: G06K19/07745 ,  H01L21/54 ,  H01L23/24 ,  H01L2924/0002 ,  Y10T29/49144

    Abstract: A method for creating an interface between a chip and chip carrier includes spacing the chip a given distance above the chip carrier, and then introducing a liquid in the gap between the chip and carrier. Preferably, the liquid is an elastomer which is hardened into a resilient layer after its introduction into the gap. In another preferred embodiment, the terminals on a chip carrier are planarized or otherwise vertically positioned by deforming the terminals into set vertical locations with a plate, and then hardening a liquid between the chip carrier and chip.

    Abstract translation: 用于在芯片和芯片载体之间创建接口的方法包括将芯片与芯片载体之上的给定距离间隔开，然后在芯片和载体之间的间隙中引入液体。 优选地，液体是在其引入间隙之后被硬化成弹性层的弹性体。 在另一个优选实施例中，芯片载体上的端子被平坦化或以其它方式垂直定位，通过使端子变形成具有板的设定的垂直位置，然后在芯片载体和芯片之间固化液体。

    Method and System for Implementing Controlled Breaks Between Features Using Sub-Resolution Assist Features
    7.
    发明申请
    Method and System for Implementing Controlled Breaks Between Features Using Sub-Resolution Assist Features 有权
    使用子分辨率辅助功能实现特征间可控断点的方法和系统

    公开(公告)号：US20090119634A1

    公开(公告)日：2009-05-07

    申请号：US11934662

    申请日：2007-11-02

    Applicant: Jason Sweis

    Inventor： Jason Sweis

    IPC: G06F17/50

    CPC classification number: G03F1/36 ,  G03F1/70

    Abstract: Disclosed is a method, system, and computer program product for implementing controlled breaks using sub-resolution assist features. Sub-resolution bridging features are added to implement controlled breaks between features on the layout. The bridging features may also be used to facilitate or optimize multiple mask/exposure techniques that split a layout or features on a layout to address pitch problems.

    Abstract translation: 公开了一种使用子分辨率辅助特征来实现受控断点的方法，系统和计算机程序产品。 添加子分辨率桥接功能以实现布局上的功能之间的受控中断。 桥接特征还可以用于促进或优化在布局上分割布局或特征以解决间距问题的多个掩模/曝光技术。

    Shaped lead structure and method
    9.
    发明授权
    Shaped lead structure and method 失效
    形铅笔结构及方法

    公开(公告)号：US5398863A

    公开(公告)日：1995-03-21

    申请号：US96693

    申请日：1993-07-23

    Applicant: Gary W. Grube ,  Gaetan Mathieu ,  Jason Sweis ,  John A. Grange

    Inventor： Gary W. Grube ,  Gaetan Mathieu ,  Jason Sweis ,  John A. Grange

    IPC: H01L23/12 ,  B23K20/10 ,  H01L21/60 ,  H05K3/34 ,  B23K31/02

    CPC classification number: H01L24/50 ,  B23K20/10 ,  B23K2201/40 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/01082

    Abstract: In a semiconductor inner lead bonding process, a connection component having leads is disposed on the chip surface so that the leads lie above the contacts. A bond region of each lead is forced downwardly by a tool into engagement with a contact on the chip while a first or proximal end of the lead remains attached to a dielectric support structure. The lead is deformed into an S-shaped configuration by moving the bonding tool horizontally towards the proximal or first end of the lead, thereby forcing the bonding region towards the first end and bending or buckling the lead. Alternatively, the lead is bent downwardly by a tool and the tool may then be disengaged from the lead, shifted away from the proximal end of the lead and again advanced downwardly to secure the lead to the chip contact.

    Abstract translation: 在半导体内引线接合工艺中，具有引线的连接部件设置在芯片表面上，使得引线位于触点上方。 每个引线的接合区域被工具向下压迫与芯片上的接触件接合，而引线的第一或近端保持附接到电介质支撑结构。 通过将接合工具水平地朝向引线的近端或第一端移动，从而将引线变形为S形构造，从而迫使接合区朝向第一端并弯曲或弯曲引线。 或者，引线通过工具向下弯曲，然后工具可以从引线脱离，从引线的近端移开，并再次向前推进以将引线固定到芯片接触。

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