Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology
    43.
    发明授权
    Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology 有权
    具有低介电常数材料的封装间隔物,以减少CMOS技术中栅极和漏极之间的寄生电容

    公开(公告)号:US07033897B2

    公开(公告)日:2006-04-25

    申请号:US10692388

    申请日:2003-10-23

    IPC分类号: H01L21/336

    摘要: The present invention pertains to formation of a transistor in a manner that mitigates parasitic capacitance, thereby facilitating, inter alia, enhanced switching speeds. More particularly, a sidewall spacer formed upon a semiconductor substrate adjacent a conductive gate structure includes a material having a low dielectric constant (low-k) to mitigate parasitic capacitance between the gate structure, the sidewall spacer and a conductive drain formed within the semiconductor substrate. The low-k sidewall spacer is encapsulated within a nitride material which is selective to etchants such that the spacer is not altered during subsequent processing. The spacer thus retains its shape and remains effective to guide dopants into desired locations within the substrate.

    摘要翻译: 本发明涉及以减轻寄生电容的方式形成晶体管,从而促进了切换速度的提高。 更具体地,形成在与导电栅极结构相邻的半导体衬底上的侧壁间隔物包括具有低介电常数(低k)的材料,以减轻栅极结构,侧壁间隔物和形成在半导体衬底内的导电漏极之间的寄生电容 。 低k侧壁间隔物被封装在对蚀刻剂有选择性的氮化物材料内,使得间隔物在随后的处理期间不改变。 间隔物因此保持其形状并且仍然有效地将掺杂剂引导到衬底内的期望位置。

    Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
    47.
    发明授权
    Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures 有权
    使用氧化剂/氢混合物退火超薄,高质量的栅氧化层的方法

    公开(公告)号:US06780719B2

    公开(公告)日:2004-08-24

    申请号:US09885744

    申请日:2001-06-20

    IPC分类号: H01L21336

    摘要: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density. This annealing step is selected from a group of four re-oxidizing techniques: Consecutive annealing in a mixture of H2 and N2 (preferably less than 20% H2), and then a mixture of O2 and N2 (preferably less than 20% O2); annealing by a spike-like temperature rise (preferably less than 1 s at 1000 to 1150° C.) in nitrogen-comprising atmosphere (preferably N2/O2 or N2O/H2); annealing by rapid thermal heating in ammonia of reduced pressure (preferably at 600 to 1000° C. for 5 to 60 s); annealing in an oxidizer/hydrogen mixture (preferably N2O with 1% H2) for 5 to 60 s at 800 to 1050° C.

    摘要翻译: 本发明的一个实施例是形成超薄介电层的方法,该方法包括以下步骤:提供具有半导体表面的基板; 在半导体表面上形成含氧层; 将含氧层暴露于含氮等离子体以在整个含氧层中产生均匀的氮分布; 并重新氧化和退火层以稳定氮分布,治愈等离子体诱导的损伤并降低界面缺陷密度。该退火步骤选自四种再氧化技术:在H2和N2的混合物中连续退火 (优选小于20%H 2),然后是O 2和N 2(优选小于20%O 2)的混合物;通过尖峰状升温(优选在1000至1150℃下优选小于1秒)在氮气中退火 (优选为N 2 / O 2或N 2 O / H 2);通过在减压的氨中快速热加热(优选在600至1000℃下5至60秒)进行退火;在氧化剂/氢气混合物(优选N 2 O 1%H 2)在800至1050℃下进行5至60秒。