公开(公告)号：US20160350303A1

公开(公告)日：2016-12-01

申请号：US14722403

申请日：2015-05-27

申请人： Mark Fischer ,  Prakash Khot ,  Daniel Philip Arcari

发明人： Mark Fischer ,  Prakash Khot ,  Daniel Philip Arcari

IPC分类号： G06F17/30

CPC分类号： G06F16/284 ,  G06F16/2452 ,  G06F16/9024

摘要： Disclosed is a network of systems that includes plural disparate storage systems that store user data, the disparate storage systems including NoSQL server databases that provide storage and retrieval of data modeled in forms besides tabular relations used in relational databases, and index storage system, a relational graph storage system and one or more data storage query platforms in communication with the plural disparate storage that have queries produced in a modeling language that abstracts application programmer functionality from network functionality.

摘要翻译： 公开了一种系统网络，其包括存储用户数据的多个不同的存储系统，不同的存储系统包括NoSQL服务器数据库，其提供除了在关系数据库中使用的表格关系之外的形式的建模的数据的存储和检索，以及索引存储系统 图形存储系统和与多个不同存储器通信的一个或多个数据存储查询平台，其具有以建模语言生成的查询，其将应用程序编程器功能从网络功能抽象出来。

公开(公告)号：US09098458B1

公开(公告)日：2015-08-04

申请号：US13625431

申请日：2012-09-24

申请人： Mark Fischer

发明人： Mark Fischer

IPC分类号： G06F17/14 ,  G06K9/00 ,  G10L17/26 ,  A61B5/00 ,  H04N19/63

CPC分类号： G06F17/148 ,  A01K29/005 ,  A61B5/726 ,  G06K9/00516 ,  G06K9/00536 ,  G10L17/26 ,  H04N19/63

摘要： A method and apparatus for profiling and identifying the source of a signal is provided. A first method includes receiving a signal produced by a known source and creating a matrix of wavelet coefficients corresponding to a wavelet transform of the signal. The method also includes profiling the signal according to an output of a wavelet transform utilizing a particular base function and a particular scale set. A second method includes performing a wavelet transform having a particular profile on a received signal and determining the presence of a particular signal-producing entity as a function of wavelet coefficients exceeding a threshold. An apparatus includes a receiver configured to receive a signal and a processor coupled to the receiver, such that the processor is configured to perform wavelet transforms on the signals. A database is coupled to the processor and configured to store wavelet transform profiles.

公开(公告)号：US08981444B2

公开(公告)日：2015-03-17

申请号：US13302090

申请日：2011-11-22

申请人： Kevin J. Torek ,  Mark Fischer ,  Robert J. Hanson

发明人： Kevin J. Torek ,  Mark Fischer ,  Robert J. Hanson

IPC分类号： H01L27/06 ,  H01L29/78 ,  H01L29/66 ,  H01L27/108

CPC分类号： H01L29/7851 ,  H01L27/10808 ,  H01L27/10826 ,  H01L27/10879 ,  H01L29/66795 ,  H01L29/7853 ,  H01L29/7854

摘要： Novel etch techniques are provided for shaping silicon features below the photolithographic resolution limits. FinFET devices are defined by recessing oxide and exposing a silicon protrusion to an isotropic etch, at least in the channel region. In one implementation, the protrusion is contoured by a dry isotropic etch having excellent selectivity, using a downstream microwave plasma etch.

摘要翻译： 提供了新颖的蚀刻技术，用于在低于光刻分辨率极限的条件下成形硅特征。 FinFET器件通过凹陷氧化物和至少在沟道区域中将硅突起暴露于各向同性蚀刻来限定。 在一个实施方案中，使用下游微波等离子体蚀刻，通过具有优异选择性的干各向同性蚀刻来形成突起。

公开(公告)号：US08742483B2

公开(公告)日：2014-06-03

申请号：US13490369

申请日：2012-06-06

申请人： Mark Fischer

发明人： Mark Fischer

IPC分类号： H01L27/108

CPC分类号： H01L27/108 ,  H01L27/0207 ,  H01L27/10873

摘要： The invention includes methods for utilizing partial silicon-on-insulator (SOI) technology in combination with fin field effect transistor (finFET) technology to form transistors particularly suitable for utilization in dynamic random access memory (DRAM) arrays. The invention also includes DRAM arrays having low rates of refresh. Additionally, the invention includes semiconductor constructions containing transistors with horizontally-opposing source/drain regions and channel regions between the source/drain regions. The transistors can include gates that encircle at least three-fourths of at least portions of the channel regions, and in some aspects can include gates that encircle substantially an entirety of at least portions of the channel regions.

摘要翻译： 本发明包括与鳍式场效应晶体管（finFET）技术结合使用部分绝缘体上硅（SOI）技术的方法，以形成特别适用于动态随机存取存储器（DRAM）阵列的晶体管。 本发明还包括具有低刷新率的DRAM阵列。 另外，本发明包括含有水平相对的源极/漏极区域和在源极/漏极区域之间的沟道区域的晶体管的半导体构造。 晶体管可以包括围绕通道区域的至少部分的至少四分之三的栅极，并且在一些方面可包括围绕通道区域的至少部分的整体的栅极。

公开(公告)号：US08666937B2

公开(公告)日：2014-03-04

申请号：US13047697

申请日：2011-03-14

申请人： Simon Wong ,  Walter Macklem ,  Mark Fischer ,  Orjan Kjellberg ,  Oliver Pin ,  Sonali Agrawal ,  Ron Pragides ,  Etienne Giraudy

发明人： Simon Wong ,  Walter Macklem ,  Mark Fischer ,  Orjan Kjellberg ,  Oliver Pin ,  Sonali Agrawal ,  Ron Pragides ,  Etienne Giraudy

IPC分类号： G06F17/00

CPC分类号： G06F17/30309 ,  G06F17/30607

摘要： In accordance with embodiments, there are provided mechanisms and methods for versioning content in a database system using content type specific objects. These mechanisms and methods for versioning content in a database system using content type specific objects can enable embodiments to provide a database system which stores information associated with multiple versions of content. The ability of embodiments to provide a database system which supports content versioning can enable an efficient and comprehensive storage of content types having different features by the database system.

摘要翻译： 根据实施例，提供了使用内容类型特定对象在数据库系统中对内容进行版本化的机制和方法。 用于使用内容类型特定对象对数据库系统中的内容进行版本化的这些机制和方法可使实施例能够提供存储与多个内容版本相关联的信息的数据库系统。 实施例提供支持内容版本化的数据库系统的能力可以实现数据库系统具有不同特征的内容类型的有效和全面的存储。

公开(公告)号：US20120190184A1

公开(公告)日：2012-07-26

申请号：US13440383

申请日：2012-04-05

申请人： Mark Fischer ,  T. Earl Allen ,  H. Montgomery Manning

发明人： Mark Fischer ,  T. Earl Allen ,  H. Montgomery Manning

IPC分类号： H01L21/283 ,  H01L21/302

CPC分类号： H01L29/785 ,  H01L29/66818 ,  H01L29/7853 ,  Y10S438/947

摘要： A process may include forming a mask directly on and above a region selected as an initial semiconductor fin on a substrate and reducing the initial semiconductor fin forming a semiconductor fin that is laterally thinned from the initial semiconductor fin. The process may be carried out causing the mask to recede to a greater degree in the lateral direction than the vertical direction. In various embodiments, the process may include removing material from the fin semiconductor to achieve a thinned semiconductor fin, which has receded beneath the shadow of the laterally receded mask. Electronic devices may include the thinned semiconductor fin as part of a semiconductor device.

摘要翻译： 工艺可以包括在衬底上直接在选择为初始半导体鳍片的区域之上和之上形成掩模，并且减少形成从初始半导体鳍片横向变薄的半导体鳍片的初始半导体鳍片。 可以进行该处理，使得掩模在横向上比垂直方向更大程度地退回。 在各种实施例中，该方法可以包括从散热片半导体去除材料以实现已经在横向退绕的掩模的阴影之下的减薄的半导体鳍片。 电子器件可以包括作为半导体器件的一部分的变薄的半导体鳍片。

公开(公告)号：US08217441B2

公开(公告)日：2012-07-10

申请号：US12186726

申请日：2008-08-06

申请人： Mark Fischer

发明人： Mark Fischer

IPC分类号： H01L27/108 ,  H01L21/94 ,  H01L21/336

CPC分类号： H01L27/108 ,  H01L27/0207 ,  H01L27/10873

摘要： The invention includes methods for utilizing partial silicon-on-insulator (SOI) technology in combination with fin field effect transistor (finFET) technology to form transistors particularly suitable for utilization in dynamic random access memory (DRAM) arrays. The invention also includes DRAM arrays having low rates of refresh. Additionally, the invention includes semiconductor constructions containing transistors with horizontally-opposing source/drain regions and channel regions between the source/drain regions. The transistors can include gates that encircle at least three-fourths of at least portions of the channel regions, and in some aspects can include gates that encircle substantially an entirety of at least portions of the channel regions.

摘要翻译： 本发明包括与鳍式场效应晶体管（finFET）技术结合使用部分绝缘体上硅（SOI）技术的方法，以形成特别适用于动态随机存取存储器（DRAM）阵列的晶体管。 本发明还包括具有低刷新率的DRAM阵列。 另外，本发明包括含有水平相对的源极/漏极区域和在源极/漏极区域之间的沟道区域的晶体管的半导体构造。 晶体管可以包括围绕通道区域的至少部分的至少四分之三的栅极，并且在一些方面可包括围绕通道区域的至少部分的整体的栅极。

公开(公告)号：US08207032B2

公开(公告)日：2012-06-26

申请号：US12872705

申请日：2010-08-31

申请人： Mark Fischer ,  Sanh D. Tang

发明人： Mark Fischer ,  Sanh D. Tang

IPC分类号： H01L21/8242 ,  H01L21/8238

CPC分类号： H01L27/10876 ,  H01L21/823425 ,  H01L21/823487 ,  H01L27/2454 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/66666 ,  H01L29/7827 ,  H01L45/06 ,  H01L45/1233

摘要： Some embodiments include methods of forming vertical transistors. A construction may have a plurality of spaced apart fins extending upwardly from a semiconductor substrate. Each of the fins may have vertical transistor pillars, and each of the vertical transistor pillars may have a bottom source/drain region location, a channel region location over the bottom source/drain region location, and a top source/drain region location over the channel region location. Electrically conductive gate material may be formed along the fins while using oxide within spaces along the bottoms of the fins to offset the electrically conductive gate material to be above the bottom source/drain region locations of the vertical transistor pillars. The oxide may be an oxide which etches at a rate of at least about 100 Å/minute with dilute HF at room temperature. In some embodiments the oxide may be removed after the electrically conductive gate material is formed.

摘要翻译： 一些实施例包括形成垂直晶体管的方法。 结构可以具有从半导体衬底向上延伸的多个间隔开的翅片。 每个鳍片可以具有垂直的晶体管柱，并且每个垂直晶体管柱可以具有底部源极/漏极区域位置，在底部源极/漏极区域位置上方的沟道区域位置，以及顶部源极/漏极区域 渠道区域位置。 导电栅极材料可以沿着鳍片形成，同时沿着鳍状物的底部在空间内使用氧化物以将导电栅极材料偏移到垂直晶体管柱的底部源极/漏极区域的上方。 氧化物可以是在室温下用稀释HF以至少约100埃/分钟的速率蚀刻的氧化物。 在一些实施例中，可以在形成导电栅极材料之后去除氧化物。

公开(公告)号：US20110276535A1

公开(公告)日：2011-11-10

申请号：US12895833

申请日：2010-09-30

申请人： Olivier Pin ,  Etienne Giraudy ,  Orjan Kjellberg ,  Mark Fischer ,  Steven Tamm ,  Varadarajan Rajaram

发明人： Olivier Pin ,  Etienne Giraudy ,  Orjan Kjellberg ,  Mark Fischer ,  Steven Tamm ,  Varadarajan Rajaram

IPC分类号： G06F17/00

CPC分类号： G06Q10/10

摘要： A computer implemented method a document management workflow in a multi-tenant system environment is disclosed. The method includes receiving instructions to create a composition a document. The document is encapsulated in a knowledge article version and the knowledge article version having a document category. The knowledge article version is associated with a knowledge article. The method further includes invoking the document management workflow that is specific to the knowledge article, the knowledge article version and the document category and configuring the document management workflow to include a plurality of workflow steps based on the knowledge article, the knowledge article version and the document category. Each of the plurality of workflow steps are then associated with one or more triggers and actor roles. The actor roles define permissible actions in each of the plurality of workflow steps. Data in the knowledge article and the knowledge article version are configured to be updated with the movement of a document in the plurality of workflow steps. The document management workflow provides cyclic processing steps with no termination state.

摘要翻译： 公开了一种在多租户系统环境中的文档管理工作流程的计算机实现方法。 该方法包括接收用于创建文档的组合的指令。 该文档封装在知识文章版本中，知识文章版本具有文档类别。 知识文章版本与知识文章相关联。 该方法还包括调用特定于知识文章，知识文章版本和文档类别的文档管理工作流，并且将文档管理工作流配置为包括基于知识文章，知识文章版本和 文件类别。 然后，多个工作流步骤中的每一个与一个或多个触发器和演员角色相关联。 演员角色定义了多个工作流程步骤中的每一个中的允许动作。 知识文章和知识文章版本中的数据被配置为随着多个工作流步骤中文档的移动而被更新。 文档管理工作流提供无终止状态的循环处理步骤。

公开(公告)号：US07859112B2

公开(公告)日：2010-12-28

申请号：US11331951

申请日：2006-01-13

申请人： Terry McDaniel ,  James Green ,  Mark Fischer

发明人： Terry McDaniel ,  James Green ,  Mark Fischer

IPC分类号： H01L23/52

CPC分类号： H01L27/105 ,  H01L21/823475 ,  H01L21/823871 ,  H01L27/1052 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/11531 ,  H01L29/66545

摘要： Memory devices, such as DRAM memory devices, may include one or more metal layers above a local interconnect of the DRAM memory that make contact to lower gate regions of the memory device. As the size of semiconductor components decreases and circuit densities increase, the density of the metal routing in these upper metal layers becomes increasingly difficult to fabricate. By providing additional metal routing in the lower gate regions that may be coupled to the upper metal layers, the spacing requirements of the upper metal layers may be eased, while maintaining the size of the semiconductor device. In addition, the additional metal routing formed in the gate regions of the memory devices may be disposed parallel to other metal contacts in a strapping configuration, thus reducing a resistance of the metal contacts, such as buried digit lines of a DRAM memory cell.

摘要翻译： 诸如DRAM存储器件的存储器件可以包括与存储器件的下部栅极区域接触的DRAM存储器的局部互连上方的一个或多个金属层。 随着半导体元件的尺寸减小和电路密度增加，这些上层金属层中的金属布线的密度越来越难于制造。 通过在可以耦合到上金属层的下栅极区域中提供额外的金属布线，可以在保持半导体器件的尺寸的同时，缓和上金属层的间隔要求。 此外，形成在存储器件的栅极区域中的附加金属布线可以以带状构造平行于其它金属触点设置，从而减小金属触点（例如DRAM存储单元的埋置数字线）的电阻。