Integrated Photonic Array Fed by Free-Space Optics

    公开(公告)号:US20190006753A1

    公开(公告)日:2019-01-03

    申请号:US16018537

    申请日:2018-06-26

    Applicant: Eric Swanson

    Inventor: Eric Swanson

    Abstract: An optical system for producing an optical probe beam includes an optical source that generates a free-space optical beam. An optical element is positioned in a path of the free-space optical beam to project the free-space optical beam to generate a projected free-space optical beam. A photonic integrated phased-array component positioned in a path of the projected free-space optical beam to reflect the projected free space optical beam, thereby generating the optical probe beam. The photonic integrated phased-array component comprises a plurality of antenna elements and a substrate positioned proximate to the plurality of antenna elements, wherein the substrate includes a plurality of fan-out electrical connections from at least some of the plurality of antenna elements such that a size of a region comprising the fan-out electrical connections is larger than a size of a region comprising the plurality of antenna elements.

    Integrated Optical System with Optical Phased Array Photonic Integrated Circuit

    公开(公告)号:US20170299500A1

    公开(公告)日:2017-10-19

    申请号:US15467828

    申请日:2017-03-23

    Applicant: Eric Swanson

    Inventor: Eric Swanson

    Abstract: Disclosed herein are optical integration technologies, designs, systems and methods directed toward Optical Coherence Tomography (OCT) and other interferometric optical sensor, ranging, and imaging systems wherein such systems, methods and structures employ tunable optical sources, coherent detection and other structures on a single or multichip monolithic integration. In contrast to contemporary, prior-art OCT systems and structures that employ simple, miniature optical bench technology using small optical components positioned on a substrate, systems and methods according to the present disclosure employ one or more photonic integrated circuits (PICs), use swept-source techniques, and employ a widely tunable optical source(s).In another embodiment the system uses an optical photonic phased array. The phase array can be a static phased array to eliminate or augment the lens that couples light to and from a sample of interest or can be static and use a spectrally dispersive antenna and a tunable source to perform angular sweeping. The phased array can be active in 1 or 2 dimensions so as to scan the light beam in angle. The phased array can also adjust focus. The phased array can implement an optical waveform that will extend depth of field focus for imaging. The phase array can also be a separate standalone element that is fed by one or more optical fibers. The phased array can be for scanning a biomedical specimen used in conjunction with a swept-source OCT system, can be used in a free-space coherent optical communication system for beam pointing or tracking, used in LIDAR applications, or many other beam control or beam steering applications

    Reconfigurable DSP Performance in Optical Transceivers
    43.
    发明申请
    Reconfigurable DSP Performance in Optical Transceivers 有权
    光收发器中可重构DSP性能

    公开(公告)号:US20120076502A1

    公开(公告)日:2012-03-29

    申请号:US12892327

    申请日:2010-09-28

    CPC classification number: H04B10/0795

    Abstract: A method for setting transceiver transmission parameters, in a transceiver having a plurality of components, to achieve the predetermined acceptable end-to-end bit error rate while reducing power consumption. In another aspect the invention relates to an optical transceiver system that uses digital signal processing to process the data stream sent through a fiber optical channel to compensate for transmission, reception and channel impairments to achieve the a predetermined end-to-end bit error rate and to alter its power dissipation to that sufficient to meet said end-to-end bit error rate. In one embodiment the optical transceiver system includes an optical transmitter; an optical receiver comprising an ASIC, FPGA, or other circuitry; and a controller in electrical communication with the optical receiver, wherein the controller controls power to portions of the ASIC so as to reduce power dissipation while meeting the end-to-end bit error rate.

    Abstract translation: 一种用于在具有多个组件的收发机中设置收发器传输参数以在降低功耗的同时实现预定的可接受的端对端误码率的方法。 在另一方面,本发明涉及一种使用数字信号处理来处理通过光纤光信道发送的数据流以补偿传输,接收和信道损伤以实现预定的端到端误码率的光收发器系统,以及 以将其功率消耗改变为足以满足所述端对端误码率。 在一个实施例中,光收发器系统包括光发射机; 包括ASIC,FPGA或其他电路的光接收器; 以及与所述光接收器电通信的控制器,其中所述控制器控制对所述ASIC的部分的功率,以便在满足所述端对端误码率的同时降低功耗。

    Transfer line for measurement systems
    44.
    发明申请
    Transfer line for measurement systems 审中-公开
    传输线用于测量系统

    公开(公告)号:US20060071177A1

    公开(公告)日:2006-04-06

    申请号:US11284470

    申请日:2005-11-21

    CPC classification number: H01J49/10 H01J49/04

    Abstract: An enhanced transfer system that increases the accuracy and sensitivity of a measurement system is disclosed. In one embodiment, the transfer system includes transfer tubing that transports samples from a spray chamber to an ionizer in a mass spectrometer system. The transfer system also includes a transfer gas line that is connected to the transfer tubing. The transfer gas line supplies a gas that assists with the transferring of the samples from the spray chamber to the ionizer. In one embodiment, the transfer gas line is angled relative to a portion of the transfer tubing. In another embodiment, the transfer gas line is perpendicular relative to a portion of the transfer tubing. The injected gas increases the quantity and quality of the samples transferred to the mass spectrometry system, thereby increasing the overall accuracy and sensitivity of the measurement system.

    Abstract translation: 公开了一种提高测量系统的精度和灵敏度的增强型传送系统。 在一个实施例中,传送系统包括将质谱仪系统中的样品从喷雾室输送到离子发生器的输送管道。 转印系统还包括连接到转印管的转印气体管线。 转移气体管线提供有助于将样品从喷雾室转移到离子发生器的气体。 在一个实施例中,转移气体管线相对于输送管道的一部分成角度。 在另一个实施例中,转移气体管线相对于输送管道的一部分垂直。 注入的气体增加了转移到质谱系统的样品的数量和质量,从而提高了测量系统的整体精度和灵敏度。

    SAR with partial capacitor sampling to reduce parasitic capacitance
    45.
    发明授权
    SAR with partial capacitor sampling to reduce parasitic capacitance 失效
    SAR采用部分电容采样,以减少寄生电容

    公开(公告)号:US06977607B2

    公开(公告)日:2005-12-20

    申请号:US10752930

    申请日:2004-01-07

    CPC classification number: H03M1/1057 H03M1/468

    Abstract: SAR with partial capacitor sampling to reduce parasitic capacitance. An analog-to-digital convertor is disclosed with reduced parasitic capacitance on the input during a sampling operation. A charge-redistribution, binary-weighted switched-capacitor array is included having a plurality of array capacitors that each have a commonly connected plate interfaced to a first common node and a switched plate, the switched plate operable to be switched between first and second reference voltages during a redistribution phase and select ones of the capacitors additionally operable to be switched to the input during a sampling phase. Each of the array capacitors has a parasitic capacitance associated therewith. A compensation capacitor having a common plate is connected to the first common node and a switched plate, the compensation capacitor operable to be switched to the input during the sampling phase and to the first reference voltage during the redistribution phase. The compensation capacitor has a parasitic capacitance less than the parasitic capacitance of the combination of all of the non select ones of the array capacitors. A comparator compares the voltage on the first common node to a compare reference voltage during the redistribution phase. A successive approximation controller is provided for switching the switched plate of the array capacitors between the first and second reference voltages in accordance with a successive approximation algorithm during the redistribution phase.

    Abstract translation: SAR采用部分电容采样,以减少寄生电容。 公开了一种模拟 - 数字转换器,其在采样操作期间在输入端具有降低的寄生电容。 包括电荷再分配二进制加权的开关电容器阵列,其具有多个阵列电容器,每个阵列电容器具有与第一公共节点和开关板接口的共同连接的板,所述开关板可操作以在第一和第二参考 在再分配阶段期间的电压,并且选择另外可操作以在采样阶段切换到输入的电容器。 每个阵列电容器具有与其相关联的寄生电容。 具有公共板的补偿电容器连接到第一公共节点和开关板,补偿电容器可操作以在再分配阶段期间切换到采样阶段期间的输入和第一参考电压。 补偿电容器的寄生电容小于阵列电容器中所有未选择的组合的寄生电容。 在再分配阶段期间,比较器将第一公共节点上的电压与比较参考电压进行比较。 提供逐次逼近控制器,用于根据再分配阶段期间的逐次逼近算法在第一和第二参考电压之间切换阵列电容器的开关板。

    Data converter with statistical domain output

    公开(公告)号:US20050038942A1

    公开(公告)日:2005-02-17

    申请号:US10868180

    申请日:2004-06-15

    Applicant: Eric Swanson

    Inventor: Eric Swanson

    CPC classification number: G01R23/167

    Abstract: An integrated circuit having statistical processing capability. The integrated circuit has an input for receiving input data in a first data domain. A data converter is provided for converting received input data from the first domain to a second domain different from the first domain. A statistical processor is provided for obtaining statistical information from the output of the data converter and processing the obtained statistical information in accordance with a predetermined processing algorithm. An output on the integrated circuit allow access of the processed statistical information by the statistical processor external to the integrated circuit.

    Time domain data converter with output frequency domain conversion
    47.
    发明授权
    Time domain data converter with output frequency domain conversion 有权
    具有输出频域转换的时域数据转换器

    公开(公告)号:US06751641B1

    公开(公告)日:2004-06-15

    申请号:US09376761

    申请日:1999-08-17

    Applicant: Eric Swanson

    Inventor: Eric Swanson

    CPC classification number: G01R23/167

    Abstract: A time domain data converter with output frequency domain conversion. A data conversion circuit is operable to receive a signal in the time domain and provide an output in the frequency domain. It includes a data converter for converting data from an analog format to a digital format in the time domain. It also includes a processor for processing the data in the digital format output from the data converter through a time domain/frequency domain transform to provide data in the digital format in the frequency domain.

    Abstract translation: 具有输出频域转换的时域数据转换器。 数据转换电路可操作以在时域中接收信号并在频域中提供输出。 它包括一个数据转换器,用于在时域中将数据从模拟格式转换为数字格式。 它还包括一个处理器,用于通过时域/频域变换处理从数据转换器输出的数字格式的数据,以提供数字格式的频域数据。

    Integrated Photonic Chip with Coherent Receiver and Variable Optical Delay for Imaging, Sensing, and Ranging Applications

    公开(公告)号:US20210356249A1

    公开(公告)日:2021-11-18

    申请号:US17221835

    申请日:2021-04-04

    Applicant: Eric Swanson

    Inventor: Eric Swanson

    Abstract: An interferometric measurement system includes ports configured to receive an optical signal from an optical source and an optical signal from a target. A photonic integrated circuit includes a variable delay configured to select between at least two optical paths from the input to an output such that the optical signal from the optical source passes to the output while experiencing an optical delay based on a selected one of the at least two optical paths where a loss of the optical signal from the optical source provided to the input that passes to the output is nominally the same for each of the at least two optical paths. An optical receiver is configured to receive the optical signal from the target and to receive the optical signal from the optical source that experiences the optical delay based on the selected one of the at least two optical paths and generates a corresponding electrical receive signal at an electrical output. A processor is configured to generate an interferometric measurement signal based on the receive signal.

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