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公开(公告)号：US5815021A
公开(公告)日：1998-09-29
申请号：US686761
申请日：1996-07-26
摘要： The present invention provides a weighted addition circuit for sampling, holding and performing weighted addition by a circuit smaller than a conventional one. In the weighted addition circuit of to the present invention, a capacitive coupling is connected to a plurality of switches which are further connected only to an input voltage. A voltage is held and a weight is added in the capacitive coupling.
摘要翻译： 本发明提供一种加权加法电路，用于通过比传统电路小的电路进行采样，保持和执行加权相加。 在本发明的加权加法电路中，电容耦合连接到多个开关，该开关进一步仅与输入电压相连。 在电容耦合中保持电压并加上重量。
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公开(公告)号：US5811859A
公开(公告)日：1998-09-22
申请号：US743161
申请日：1996-11-04
IPC分类号： H01L27/02 , H01L27/07 , H01L27/092 , H03K19/003 , H01L29/76
CPC分类号： H01L27/0705 , H01L27/0203 , H01L27/0207 , H01L27/092 , H03K19/00384 , H01L2924/0002
摘要： MOS inverter forming method within a large scale integrated circuit (LSI) for providing a pair of circuits with the same performance each of which comprise a plurality of MOS inverters serially connected from the first stage to the last stage, each the MOS inverters being provided with an input, characterized in that, the input of the MOS inverters of the first stage are adjacently positioned with facing to each other.
摘要翻译： 在大规模集成电路（LSI）中的MOS反相器形成方法，用于提供具有相同性能的一对电路，每个电路包括从第一级至最后级串联连接的多个MOS反相器，每个MOS反相器设置有 输入，其特征在于，所述第一级的MOS反相器的输入相邻地相邻定位。
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公开(公告)号：US5793321A
公开(公告)日：1998-08-11
申请号：US764638
申请日：1996-12-11
CPC分类号： H03M1/804
摘要： An A/D converting circuit for realizing a stable performance without being influenced by variations in characteristic values of each inverter. The A/D converting circuit includes a quantizing inverter which is constructed by a number of unit inverters parallelly connected.
摘要翻译： 一种用于在不受每个逆变器的特性值的变化的影响的情况下实现稳定性能的A / D转换电路。 A / D转换电路包括由多个并联连接的单元逆变器构成的量化逆变器。
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44.发明授权
公开(公告)号：US5754134A
公开(公告)日：1998-05-19
申请号：US534869
申请日：1995-09-27
摘要： An A/D converter including a first inverter having a linear characteristic and receiving an analog input voltage, a first quantizing circuit for quantizing the analog input voltage, a capacitive coupling to which an output of the first inverter and the first quantizing circuit are inputted, a second inverter receiving an output of the capacitive coupling and having the same characteristic of the first inverter, and a second quantizing circuit for receiving and quantizing an output of the second inverter. The A/D converter performs successive steps of quantizing/digitizing so as to achieve A/D conversion.
摘要翻译： 一种A / D转换器，包括具有线性特征并接收模拟输入电压的第一反相器，用于量化模拟输入电压的第一量化电路，输入第一反相器和第一量化电路的输出的电容耦合， 接收所述电容耦合的输出并具有与所述第一反相器相同的特性的第二反相器，以及用于接收和量化所述第二反相器的输出的第二量化电路。 A / D转换器执行量化/数字化的连续步骤，以实现A / D转换。
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公开(公告)号：US5754133A
公开(公告)日：1998-05-19
申请号：US513657
申请日：1995-08-11
申请人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
发明人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
摘要： A register circuit for holding an analog input voltage includes a plurality of thresholding circuits of stepwise thresholds, an integrating circuit for integrating outputs of the thresholding circuits and a switching circuit for alternatively inputting an output of the integrating circuit or the analog input voltage to the thresholding circuits as the input voltage of the capacitive coupling.
摘要翻译： 用于保持模拟输入电压的寄存器电路包括多个阶跃阈值阈值电路，用于积分阈值电路的输出的积分电路和用于交替地将积分电路的输出或模拟输入电压输入到阈值的开关电路 电路作为电容耦合的输入电压。
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公开(公告)号：US5686861A
公开(公告)日：1997-11-11
申请号：US630505
申请日：1996-04-10
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
CPC分类号： H03H11/04
摘要： A filter circuit that consumes very little electric power. The active filter is a linear inverter constructed by 1) an inverting amplifying portion composed of an odd number of MOS inverters serially connected, 2) a grounded capacitance connected between an output of the inverting amplifying portion and ground, 3) a balancing resistance having a pair of resistances for connecting an output of one of the MOS inverters, other than the last MOS inverter, to the supply voltage and the ground, respectively, and 4) a feedback impedance for connecting the output and input of the inverting amplifying portion. A coupling capacitance is connected to the input of the linear inverter and a plurality of filter circuits are connected to an input of the coupling capacitance.
摘要翻译： 一种消耗很少电力的滤波电路。 有源滤波器是一种线性反相器，由1）由串联连接的奇数个MOS反相器组成的反相放大部分，2）连接在反相放大部分的输出端和地之间的接地电容，3）平衡电阻，具有 一对电阻分别用于将MOS逆变器之一以外的输出连接到电源电压和接地，以及4）用于连接反相放大部分的输出和输入的反馈阻抗。 耦合电容连接到线性反相器的输入，并且多个滤波电路连接到耦合电容的输入。
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公开(公告)号：US5650752A
公开(公告)日：1997-07-22
申请号：US458179
申请日：1995-06-02
申请人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
发明人： Guoliang Shou , Makoto Yamamoto , Sunao Takatori
摘要： An amplifier circuit has a wide frequency range which is broader than the frequency range expected from its circuit parameters. The amplifier circuit comprises a plurality of unit amplifier circuits connected in parallel. Each unit amplifier circuit contains an odd number of inverters serially connected from the first stage to the last stage, an input capacitance connected to the input terminal of the first stage, and a feedback capacitance connecting the output terminal of the inverter of the last stage to the input terminal of the inverter of the first stage. Thus, the amplifier circuit operates in a wide frequency range with little decrease in gain at high frequencies.
摘要翻译： 放大器电路具有比从其电路参数预期的频率范围宽的宽的频率范围。 放大器电路包括并联连接的多个单元放大器电路。 每个单位放大器电路包括从第一级到最后级串联连接的奇数个反相器，连接到第一级的输入端的输入电容和将最后级的反相器的输出端连接到 第一级逆变器的输入端。 因此，放大器电路在宽频率范围内工作，在高频下的增益几乎没有降低。
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公开(公告)号：US5604458A
公开(公告)日：1997-02-18
申请号：US457445
申请日：1995-06-01
申请人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
CPC分类号： G06J1/00 , G06G7/12 , H03G1/0094
摘要： A scalar circuit includes serially connected inverters connected to one another via a plurality of connecting lines. A plurality of input lines are provided to the input of a first inverter in the serially connected inverters. A plurality of feedback lines are provided between the input and output of each inverter. A capacitance and a switch is provided in each connecting line, input line and feedback line. The switch connects a terminal of the capacitance to ground while simultaneously disconnecting the ends of that line from one another. The switches are cooperatively actuated so that the effective composite capacitance in the feedback lines and the connecting lines are substantially equal. In addition, the composite capacitance of in the input lines and the connecting lines are substantially equal.
摘要翻译： 标量电路包括通过多条连接线彼此连接的串联逆变器。 多个输入线被提供给串联逆变器中的第一反相器的输入端。 在每个逆变器的输入和输出之间提供多条反馈线。 每个连接线，输入线和反馈线都提供电容和开关。 开关将电容的端子连接到地，同时断开该线的端部。 这些开关被协同地致动，使得反馈线和连接线中的有效复合电容基本相等。 此外，输入线和连接线中的复合电容基本相等。
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49.发明授权High-speed circuit for performing pattern matching of image data and the like suitable for large scale integration implementation 失效用于执行适合于大规模集成实现的图像数据等的图案匹配的高速电路
公开(公告)号：US5579411A
公开(公告)日：1996-11-26
申请号：US426587
申请日：1995-04-21
申请人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Sunao Takatori , Makoto Yamamoto
CPC分类号： G06K9/6202 , G06F17/153
摘要： A pattern matching system includes a circuit that matches an input image with a template based on a correlation function. The circuit has a structure which makes it particularly suitable for implementation in Large Scale Integration (LSI) technologies. A pattern matching circuit according to this invention sets up a threshold value of a correlation coefficient and evaluates the following formula,E=N.sup.2 {.SIGMA.(f.sub.i -f.sub.m) (g.sub.i -g.sub.m)}.sup.2 -p.sub.th.sup.2 N.sup.2 .sigma..sub.f.sup.2 .sigma..sub.g.sup.2where N is a number of input data points. f.sub.1 is an input data point. f.sub.m is a mean value of input data points. g.sub.1 is a template data point. g.sub.m is a mean value of template data points. .sigma..sub.f is a standard deviation of input data points and .sigma..sub.g is a standard deviation of template data points in a range over a threshold value.
摘要翻译： 模式匹配系统包括基于相关函数将输入图像与模板匹配的电路。 该电路具有特别适用于大规模集成（LSI）技术实现的结构。 根据本发明的模式匹配电路建立相关系数的阈值，并且评估下列公式：E = N2 {SIGMA（fi-fm）（gi-gm）} 2-pth2N2 sigma f2 sigma g2其中N是 输入数据点数。 f1是输入数据点。 fm是输入数据点的平均值。 g1是模板数据点。 gm是模板数据点的平均值。 西格玛f是输入数据点的标准偏差，σg是在超过阈值的范围内的模板数据点的标准偏差。
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公开(公告)号：US5490099A
公开(公告)日：1996-02-06
申请号：US304475
申请日：1994-09-12
申请人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
摘要： A method for directly multiplying an analog and a digital data without converting from analog-to-digital or digital-to-analog. An analog input voltage is provided to a plurality of switches. A digital input voltage including bits b.sub.0 to b.sub.7 which are provided as control signals to the switches. The switch output is integrated giving weights by means of a capacitive coupling, and a sign bit is added by a capacitive coupling CP with a double weight of the most significant bit ("MSB") of the digital input.
摘要翻译： 一种用于直接将模拟和数字数字相乘而不从模数转换为数模或数模转换的方法。 模拟输入电压被提供给多个开关。 包括作为开关的控制信号提供的位b0至b7的数字输入电压。 开关输出通过电容耦合进行积分给出权重，并且通过具有数字输入的最高有效位（“MSB”）的双重权重的电容耦合CP添加符号位。
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