公开(公告)号：US20090173943A1

公开(公告)日：2009-07-09

申请号：US12102027

申请日：2008-04-14

申请人： Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

发明人： Wei-Sheng Yu ,  Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Hsien-Chieh Tseng ,  Han-Tu Lin

IPC分类号： H01L33/00

CPC分类号： H01L27/124 ,  H01L27/1248 ,  H01L27/1288

摘要： An active matrix array structure, disposed on a substrate, includes a first patterned conductive layer, a patterned gate insulating layer, a patterned semiconductor layer, a second patterned conductive layer, a patterned overcoat layer and a transparent conductive layer. The patterned gate insulating layer has first openings that expose a part of the first patterned conductive layer. The patterned semiconductor layer is disposed on the patterned gate insulating layer. The second patterned conductive layer is disposed on the patterned semiconductor layer. The patterned overcoat layer has second openings that expose a part of the first patterned conductive layer and a part of the second patterned conductive layer. The transparent conductive layer is completely disposed on the substrate. The transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.

摘要翻译： 设置在基板上的有源矩阵阵列结构包括第一图案化导电层，图案化栅极绝缘层，图案化半导体层，第二图案化导电层，图案化外涂层和透明导电层。 图案化栅极绝缘层具有暴露第一图案化导电层的一部分的第一开口。 图案化的半导体层设置在图案化的栅极绝缘层上。 第二图案化导电层设置在图案化的半导体层上。 图案化的外涂层具有暴露第一图案化导电层的一部分和第二图案化导电层的一部分的第二开口。 透明导电层完全设置在基板上。 设置在第一开口和第二开口中的透明导电层在基板和图案化外涂层之间的位置处断开。

公开(公告)号：US20090108280A1

公开(公告)日：2009-04-30

申请号：US11951321

申请日：2007-12-05

申请人： Shiun-Chang Jan ,  Han-Tu Lin

发明人： Shiun-Chang Jan ,  Han-Tu Lin

IPC分类号： H01L33/00 ,  H01L21/02

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： A fabrication method of a pixel structure includes utilizing only a single photomask in two different lithographic processes for defining patterns of the source/drain and passivation layer respectively. Therefore, the total amount of photomasks of the fabrication process can be decreased.

摘要翻译： 像素结构的制造方法包括仅在两个不同的光刻工艺中使用单个光掩模来分别限定源极/漏极和钝化层的图案。 因此，可以减少制造工艺的光掩模的总量。

公开(公告)号：US20080009107A1

公开(公告)日：2008-01-10

申请号：US11812823

申请日：2007-06-22

申请人： Wen-Ching Tsai ,  Yeong-Shyang Lee ,  Kuo-Yuan Tu ,  Han-Tu Lin

发明人： Wen-Ching Tsai ,  Yeong-Shyang Lee ,  Kuo-Yuan Tu ,  Han-Tu Lin

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  H01L29/458 ,  H01L29/4908

摘要： A thin film transistor (TFT) and the manufacturing method thereof are disclosed, and the thin film transistor comprises: a substrate, a gate electrode, a first CuSix layer, a gate-insulting layer, a semiconductor layer, a second CuSix layer, and a source electrode and a drain electrode. The gate electrode is disposed on the substrate, wherein the gate electrode includes the material of copper (Cu). The first CuSix layer is disposed between the gate electrode and the substrate. The gate insulating layer is disposed on the gate electrode. The semiconductor layer is disposed on the gate insulating layer. The second CuSix layer is disposed between the source electrode and the semiconductor layer and is disposed between the drain electrode and the semiconductor layer, wherein the source electrode and the drain electrode include the material of copper (Cu). The source electrode and the drain electrode are disposed on the second CuSix layer. Accordingly, the reliable TFT is provided through providing at last one CuSix layer for enhancing the adhesion of copper and silicon and avoiding the diffusion, and the yield is improved as well.

公开(公告)号：US20060146396A1

公开(公告)日：2006-07-06

申请号：US11133101

申请日：2005-05-19

申请人： Chia-Sheng Lee ,  Han-Tu Lin ,  Jia-Fam Wong

发明人： Chia-Sheng Lee ,  Han-Tu Lin ,  Jia-Fam Wong

IPC分类号： G02F1/00

CPC分类号： G02B26/001

摘要： An optical microelectromechanical systems (MEMS) device includes a transparent substrate with a plurality of discrete conductive lines, an dielectric layer disposed on the substrate and the conductive lines, reflective members and edge supporters. The reflective members and conductive lines are orthogonal, defining a plurality of pixel areas. Each reflective member is supported by edge supporters arranged around each pixel area and over the dielectric layer by a predetermined gap. The reflective members cover the connecting end of each edge supporter, providing protection from damage during fabrication.

摘要翻译： 光学微机电系统（MEMS）装置包括具有多个离散导电线的透明基板，设置在基板上的电介质层和导电线，反射构件和边缘支撑件。 反射构件和导线是正交的，限定了多个像素区域。 每个反射构件由围绕每个像素区域布置的边缘支撑件支撑并且在介电层上方以预定间隙支撑。 反射构件覆盖每个边缘支撑件的连接端，在制造期间提供防止损坏。

公开(公告)号：US20060111244A1

公开(公告)日：2006-05-25

申请号：US11143698

申请日：2005-06-02

申请人： Feng-Yuan Gan ,  Han-Tu Lin

发明人： Feng-Yuan Gan ,  Han-Tu Lin

IPC分类号： H01L39/14

CPC分类号： H01L29/66765 ,  H01L29/4908

摘要： A fabrication method of thin film transistor. A patterned gate is formed on an insulator substrate. A buffer layer is formed on the insulating substrate. The patterned gate is formed by plasma enhanced chemical vapor deposition (PECVD) using a mixture of silane, argon, nitrogen to serve as reactants at a temperature of approximately 20-200° C. A gate insulating layer is formed on the buffer layer. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor layer. The buffer layer protects the metal gate from damage during subsequent plasma enhanced chemical vapor deposition.

摘要翻译： 薄膜晶体管的制造方法。 图案化栅极形成在绝缘体基板上。 在绝缘基板上形成缓冲层。 图案化的栅极通过使用硅烷，氩，氮的混合物的等离子体增强化学气相沉积（PECVD）形成，以在约20-200℃的温度下用作反应物。在缓冲层上形成栅极绝缘层。 在栅极绝缘层上形成半导体层。 源极/漏极层形成在半导体层上。 缓冲层在随后的等离子体增强化学气相沉积期间保护金属栅极免受损坏。

公开(公告)号：US20060110871A1

公开(公告)日：2006-05-25

申请号：US11142930

申请日：2005-06-02

申请人： Feng-Yuan Gan ,  Han-Tu Lin

发明人： Feng-Yuan Gan ,  Han-Tu Lin

IPC分类号： H01L21/8234

CPC分类号： H01L29/66765 ,  H01L29/42384 ,  H01L29/4908

摘要： Fabrication methods for thin film transistors. A metal gate stack structure is formed on an insulating substrate. The substrate is performed using thermal annealing to create an oxide layer on the sidewalls of the metal gate stack structure. A gate insulating layer is formed on the substrate covering the metal gate stack structure. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor.

摘要翻译： 薄膜晶体管的制造方法。 在绝缘基板上形成金属栅堆叠结构。 使用热退火进行衬底，以在金属栅极堆叠结构的侧壁上产生氧化物层。 在覆盖金属栅堆叠结构的基板上形成栅极绝缘层。 在栅极绝缘层上形成半导体层。 在半导体上形成源极/漏极层。

公开(公告)号：US08349631B2

公开(公告)日：2013-01-08

申请号：US13225568

申请日：2011-09-06

申请人： Shine-Kai Tseng ,  Han-Tu Lin ,  Shiun-Chang Jan ,  Kuo-Lung Fang

发明人： Shine-Kai Tseng ,  Han-Tu Lin ,  Shiun-Chang Jan ,  Kuo-Lung Fang

IPC分类号： H01L21/338 ,  H01L31/112

CPC分类号： H01L27/1248 ,  H01L27/1288

摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.

摘要翻译： 制造TFT阵列基板的方法包括以下步骤。 在基板上形成栅极图案和第一焊盘图案。 依次形成覆盖这两个图案的栅绝缘层和半导体层。 形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。 通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。 在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。 图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

公开(公告)号：US20120222729A1

公开(公告)日：2012-09-06

申请号：US13037508

申请日：2011-03-01

申请人： Ming-Jeng Huang ,  Han-Tu Lin

发明人： Ming-Jeng Huang ,  Han-Tu Lin

IPC分类号： H01L31/06

CPC分类号： H01L31/0687 ,  H01L31/022441 ,  H01L31/03529 ,  H01L31/0475 ,  H01L31/0504 ,  H01L31/0508 ,  H01L31/0682 ,  H01L31/0684 ,  Y02E10/545 ,  Y02E10/546 ,  Y02E10/547 ,  Y02E10/548

摘要： The present invention, a photovoltaic device includes a substrate having a first doped-type, a first doped region having a second doped-type in the substrate, a second doped region in a portion of the first doped region and exposing the other portion of the first doped region, and a third doped region in the exposed portion of the first doped region. The polarity of the second doped-type is substantially reversed with that of the first doped-type. The second doped region has a polarity substantially identical to that of the first doped-type and a doped concentration substantially greater than that of the substrate. The third doped region has a polarity substantially identical to that of the second doped-type and a doped concentration substantially greater than that of the first doped region. The first doped-type is one of N-type and P-type, while the second doped-type is the other of P-type and N-type.

摘要翻译： 本发明的光电器件包括具有第一掺杂型的衬底，在衬底中具有第二掺杂型的第一掺杂区，在第一掺杂区的一部分中的第二掺杂区， 第一掺杂区域和第一掺杂区域的暴露部分中的第三掺杂区域。 第二掺杂型的极性与第一掺杂型的极性基本相反。 第二掺杂区具有与第一掺杂型基本相同的极性，掺杂浓度基本上大于衬底的掺杂浓度。 第三掺杂区具有与第二掺杂型基本相同的极性，掺杂浓度基本上大于第一掺杂区的掺杂浓度。 第一掺杂型是N型和P型之一，而第二掺杂型是P型和N型的另一种。

公开(公告)号：US20120189947A1

公开(公告)日：2012-07-26

申请号：US13437013

申请日：2012-04-02

申请人： Chun-Chieh Tsao ,  Han-Tu Lin

发明人： Chun-Chieh Tsao ,  Han-Tu Lin

IPC分类号： G03F7/20 ,  B05D5/00 ,  B05D5/06

CPC分类号： G03F7/0007 ,  G02B5/201 ,  G02B5/223

摘要： A method of manufacturing a color filter substrate is provided. The color filter substrate includes a substrate, a light-shielding layer, and a plurality of color filter patterns. The substrate has a plurality of annular trough areas, a plurality of central areas, and a light-shielding area positioned among the annular trough areas. Each of the annular trough areas has an inner edge connected to the central area and an outer edge connected to the light-shielding area. The light-shielding layer is disposed on the light-shielding area and extends from the outer edges of the annular trough areas to the top of the annular trough areas. The color filter patterns are disposed on the annular trough areas and the central areas, and the color filter patterns are in contact with a side surface and a part of the bottom surface of the light-shielding layer.

摘要翻译： 提供一种制造滤色器基板的方法。 滤色器基板包括基板，遮光层和多个滤色器图案。 基板具有多个环形槽区域，多个中心区域和位于环形槽区域之间的遮光区域。 每个环形槽区域具有连接到中心区域的内边缘和连接到遮光区域的外边缘。 遮光层设置在遮光区域上，并且从环形槽区域的外边缘延伸到环形槽区域的顶部。 滤色器图案设置在环形槽区域和中心区域上，并且滤色器图案与遮光层的侧表面和底表面的一部分接触。

公开(公告)号：US08187776B2

公开(公告)日：2012-05-29

申请号：US12242935

申请日：2008-10-01

申请人： Chun-Chieh Tsao ,  Han-Tu Lin

发明人： Chun-Chieh Tsao ,  Han-Tu Lin

IPC分类号： G02B5/20 ,  G03F1/00

CPC分类号： G03F7/0007 ,  G02B5/201 ,  G02B5/223

摘要： A color filter substrate is provided. The color filter substrate includes a substrate, a light-shielding layer, and a plurality of color filter patterns. The substrate has a plurality of annular trough areas, a plurality of central areas, and a light-shielding area positioned among the annular trough areas. Each of the annular trough areas has an inner edge connected to the central area and an outer edge connected to the light-shielding area. The light-shielding layer is disposed on the light-shielding area and extends from the outer edges of the annular trough areas to the top of the annular trough areas. The color filter patterns are disposed on the annular trough areas and the central areas, and the color filter patterns are in contact with a side surface and a part of the bottom surface of the light-shielding layer.

摘要翻译： 提供滤色器基板。 滤色器基板包括基板，遮光层和多个滤色器图案。 基板具有多个环形槽区域，多个中心区域和位于环形槽区域之间的遮光区域。 每个环形槽区域具有连接到中心区域的内边缘和连接到遮光区域的外边缘。 遮光层设置在遮光区域上，并且从环形槽区域的外边缘延伸到环形槽区域的顶部。 滤色器图案设置在环形槽区域和中心区域上，并且滤色器图案与遮光层的侧表面和底表面的一部分接触。