公开(公告)号：US5757870A

公开(公告)日：1998-05-26

申请号：US517408

申请日：1995-08-21

申请人： Kazuyuki Miya ,  Roland Go ,  Hiroyuki Kanaya

发明人： Kazuyuki Miya ,  Roland Go ,  Hiroyuki Kanaya

IPC分类号： H04B1/707 ,  H04B1/7073 ,  H04B1/7075 ,  H04B7/26 ,  H04W56/00 ,  H04J13/04 ,  H04L7/02

CPC分类号： H04B1/70752 ,  H04B1/70754 ,  H04B1/70757

摘要： A synchronizing method and circuit accurately and stably operates a direct spread spectrum multiple access communication system. A signal transmitted by modulating the spreading code with data at the transmission side is sampled by a signal of n times (n: 1 or larger integer) the clock speed of the spread spectrum signal at the reception side, and the correlation is detected by a digital matched filter. Consequently, the detection output in every sample in the symbol period is compared with the envelope detection output determined in every sampling period, and the sample positions for a specific number of determined samples are stored in the descending order of the output. The number of times of storage of large sample positions in the stored detection output is counted in every symbol period, and the position of the largest number of storage times is detected as the peak position. From this peak position, capturing or holding the symbol period and setting of the reception window position results.

摘要翻译： 一种同步方法和电路准确稳定地操作直扩扩频多址通信系统。 通过在发送侧用数据调制扩展码发送的信号由接收侧的扩频信号的时钟速度的n倍（n = 1或更大整数）的信号进行采样，并且相关性由 数字匹配滤波器 因此，将符号周期中的每个采样中的检测输出与在每个采样周期中确定的包络检测输出进行比较，并且以输出的降序存储特定数量的确定采样的采样位置。 在每个符号周期中对存储的检测输出中的大样本位置的存储次数进行计数，并且检测最大数量的存储时间的位置作为峰值位置。 从该峰值位置，捕获或保持符号周期和接收窗口位置的设置结果。

公开(公告)号：US08969983B2

公开(公告)日：2015-03-03

申请号：US13425067

申请日：2012-03-20

申请人： Hiroyuki Kanaya

发明人： Hiroyuki Kanaya

IPC分类号： H01L29/82 ,  G11C11/00 ,  H01L43/12 ,  H01L43/08 ,  H01L27/22 ,  H01L21/00

CPC分类号： H01L43/12 ,  H01L27/226 ,  H01L27/228 ,  H01L43/08

摘要： A memory includes a semiconductor substrate. Cell transistors are on the substrate. Contact plugs each of which is buried between the adjacent cell transistors and electrically connected to a diffusion layer between the adjacent cell transistors. An interlayer dielectric film buries gaps between the contact plugs. A storage element is provided not above the contact plugs but above the interlayer dielectric film. A sidewall film covers a part of a side surface of the storage element, and is provided to overlap with one of the contact plugs as viewed from above a surface of the semiconductor substrate. A lower electrode is provided between a bottom of the storage element and the interlayer dielectric film and between the sidewall film and one of the contact plugs, and electrically connects the storage element to one of the contact plugs.

摘要翻译： 存储器包括半导体衬底。 单元晶体管在基板上。 接触插塞每个都埋在相邻的单元晶体管之间，并且电连接到相邻单元晶体管之间的扩散层。 层间电介质膜埋入接触插塞之间的间隙。 存储元件不设置在接触插塞上方，而是位于层间电介质膜之上。 侧壁膜覆盖存储元件的侧表面的一部分，并且设置成从半导体衬底的表面上方观察到与一个接触插塞重叠。 下部电极设置在存储元件的底部和层间电介质膜之间以及侧壁膜和其中一个接触插塞之间，并将存储元件电连接到一个接触插塞。

公开(公告)号：US20120193693A1

公开(公告)日：2012-08-02

申请号：US13235272

申请日：2011-09-16

申请人： Hiroyuki Kanaya

发明人： Hiroyuki Kanaya

IPC分类号： H01L27/22 ,  H01L43/12

CPC分类号： H01L27/228 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  H01L43/12

摘要： An aspect of the present embodiment, there is provided magnetic random access memory device including a semiconductor substrate, a selection transistor on the semiconductor substrate, the selection transistor including a diffusion layer, a contact plug on diffusion layer, an amorphous film on the contact plug, a lower electrode provided on the amorphous film, a first magnetic layer, a nonmagnetic layer, a second magnetic layer, an upper electrode stacked in an order and a sidewall contact film on the contact plug, the sidewall contact film being in contact with a sidewall of the upper electrode.

摘要翻译： 本实施例的一个方面，提供了一种磁性随机存取存储器件，包括半导体衬底，半导体衬底上的选择晶体管，选择晶体管包括扩散层，扩散层上的接触插塞，接触插塞上的非晶膜 设置在非晶膜上的下电极，第一磁性层，非磁性层，第二磁性层，按顺序堆叠的上电极和接触插塞上的侧壁接触膜，所述侧壁接触膜与 上电极的侧壁。

公开(公告)号：US20120056253A1

公开(公告)日：2012-03-08

申请号：US12943404

申请日：2010-11-10

申请人： Masayoshi IWAYAMA ,  Hiroyuki Kanaya

发明人： Masayoshi IWAYAMA ,  Hiroyuki Kanaya

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L27/228 ,  H01L43/08 ,  H01L43/12

摘要： A semiconductor memory device according to the present embodiment includes a semiconductor substrate, a select transistor, a lower electrode, a magnetic tunnel junction element, a first protection film, an upper electrode, and a second protection film. The select transistor is formed on the semiconductor substrate. The lower electrode is electrically connected to one diffusion layer of the select transistor. The magnetic tunnel junction element is provided on the lower electrode. The first protection film is provided on a side surface of the magnetic tunnel junction element. The upper electrode is provided on the magnetic tunnel junction element and the first protection film. The second protection film is provided on side surfaces of the upper electrode, the first protection film, and the lower electrode.

摘要翻译： 根据本实施例的半导体存储器件包括半导体衬底，选择晶体管，下电极，磁隧道结元件，第一保护膜，上电极和第二保护膜。 选择晶体管形成在半导体衬底上。 下电极电连接到选择晶体管的一个扩散层。 磁性隧道结元件设置在下电极上。 第一保护膜设置在磁隧道结元件的侧表面上。 上电极设置在磁隧道结元件和第一保护膜上。 第二保护膜设置在上电极，第一保护膜和下电极的侧表面上。

公开(公告)号：US07821049B2

公开(公告)日：2010-10-26

申请号：US12038226

申请日：2008-02-27

申请人： Hiroyuki Kanaya

发明人： Hiroyuki Kanaya

IPC分类号： H01L27/105

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

摘要： According to an aspect of the present invention, there is provided a semiconductor memory device comprising, a first transistor and a second transistor formed on a semiconductor substrate, a memory capacitor formed above the first transistor, the memory capacitor being connected to the first transistor, a dummy memory capacitor formed above the second transistor, a wiring layer formed above the memory capacitor and the dummy memory capacitor, the wiring layer being connected to the first transistor and the memory capacitor, a first plug connecting between the second transistor and the dummy memory capacitor, and a second plug connecting between the dummy memory capacitor and the wiring layer.

摘要翻译： 根据本发明的一个方面，提供了一种半导体存储器件，包括形成在半导体衬底上的第一晶体管和第二晶体管，形成在第一晶体管上方的存储电容器，存储电容器连接到第一晶体管， 形成在所述第二晶体管上方的虚拟存储电容器，形成在所述存储电容器和所述虚拟存储电容器上方的布线层，所述布线层连接到所述第一晶体管和所述存储电容器，第一插头，连接在所述第二晶体管和所述虚拟存储器之间 电容器和连接在虚拟存储电容器和布线层之间的第二插头。

公开(公告)号：US07429508B2

公开(公告)日：2008-09-30

申请号：US11941776

申请日：2007-11-16

申请人： Osamu Hidaka ,  Iwao Kunishima ,  Hiroyuki Kanaya

发明人： Osamu Hidaka ,  Iwao Kunishima ,  Hiroyuki Kanaya

IPC分类号： H01L21/8242

CPC分类号： H01L27/11502 ,  H01L21/76802 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

公开(公告)号：US20080076192A1

公开(公告)日：2008-03-27

申请号：US11941776

申请日：2007-11-16

申请人： Osamu Hidaka ,  Iwao Kunishima ,  Hiroyuki Kanaya

发明人： Osamu Hidaka ,  Iwao Kunishima ,  Hiroyuki Kanaya

IPC分类号： H01L21/8239

CPC分类号： H01L27/11502 ,  H01L21/76802 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

摘要翻译： 半导体存储器件包括具有第一区域和第二区域的半导体衬底，放置在半导体衬底的第一区域中的晶体管，在第一和第二区域中的晶体管上形成在半导体衬底上的第一绝缘膜， 形成在第一区域的第一绝缘膜上并与晶体管电连接的第一铁电电容器，形成在第一铁电电容器上方的第一和第二区域上的第一绝缘膜上方的氢阻挡膜， 并且电连接到第一铁电电容器，以及第二触点，其穿过第二区域中的氢阻挡膜并处于浮置状态。

公开(公告)号：US20080073684A1

公开(公告)日：2008-03-27

申请号：US11941791

申请日：2007-11-16

申请人： Osamu Hidaka ,  Iwao Kunishima ,  Hiroyuki Kanaya

发明人： Osamu Hidaka ,  Iwao Kunishima ,  Hiroyuki Kanaya

IPC分类号： H01L27/105

CPC分类号： H01L27/11502 ,  H01L21/76802 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

公开(公告)号：US20080073683A1

公开(公告)日：2008-03-27

申请号：US11941755

申请日：2007-11-16

申请人： Osamu HIDAKA ,  Iwao Kunishima ,  Hiroyuki Kanaya

发明人： Osamu HIDAKA ,  Iwao Kunishima ,  Hiroyuki Kanaya

IPC分类号： H01L29/76

CPC分类号： H01L27/11502 ,  H01L21/76802 ,  H01L27/105 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.

公开(公告)号：US07190015B2

公开(公告)日：2007-03-13

申请号：US10878051

申请日：2004-06-29

申请人： Katsuaki Natori ,  Koji Yamakawa ,  Hiroyuki Kanaya

发明人： Katsuaki Natori ,  Koji Yamakawa ,  Hiroyuki Kanaya

IPC分类号： H01L27/108

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： A semiconductor device including a semiconductor substrate, a capacitor formed above the semiconductor substrate, a first interlayer insulating film formed above the capacitor and having a trench, a wiring formed above the capacitor and formed in the trench, the wiring have a top surface flush with a top surface of the first interlayer insulating film, a first hydrogen barrier film formed in contact with the top surface of the wiring and the top surface of the first interlayer insulating film and preventing hydrogen from diffusing into the capacitor and a second interlayer insulating film formed on the first hydrogen barrier film.

摘要翻译： 一种半导体器件，包括半导体衬底，形成在半导体衬底上的电容器，形成在电容器上方并具有沟槽的第一层间绝缘膜，形成在电容器上方并形成在沟槽中的布线，布线具有与 第一层间绝缘膜的顶表面，与布线的顶表面接触形成的第一氢阻挡膜和第一层间绝缘膜的顶表面，并且防止氢扩散到电容器中，形成第二层间绝缘膜 在第一个氢气阻挡膜上。