公开(公告)号：US20180076303A1

公开(公告)日：2018-03-15

申请号：US15815605

申请日：2017-11-16

Applicant: International Business Machines Corporation

Inventor： Miaomiao Wang ,  Tenko Yamashita ,  Chun-chen Yeh ,  Hui Zang

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/76898 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/4232 ,  H01L29/66545

Abstract: In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into a substrate interfacing with the gate. The recess is filled at least partially with a first conductive material. The first conductive material is insulated from the gate. The fin is replaced with a replacement structure. The replacement structure is electrically connected to the first conductive material using a second conductive material. The second conductive material is insulated from a first surface of the finFET. A first electrical contact structure is fabricated on the first surface. A second electrical contact structure is fabricated on a second surface of the finFET, the second surface being on a different spatial plane than the first surface.

公开(公告)号：US09425108B1

公开(公告)日：2016-08-23

申请号：US14960378

申请日：2015-12-05

Applicant: International Business Machines Corporation

Inventor： Balasubramanian Pranatharthiharan ,  Hui Zang

IPC: H01L21/84 ,  H01L29/66 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/225 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238

CPC classification number: H01L27/1104 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/26506 ,  H01L21/3086 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/76 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1116 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A method for preventing epitaxial growth in a semiconductor device is described. The method includes cutting the fins of FinFET structure to form a set of exposed fin ends. A set of sidewall spacers are formed on the set of exposed fin ends, forming a set of spacer covered fin ends. The set of sidewall spacers prevent epitaxial growth at the set of spacer covered fin ends. A semiconductor device includes a set of fin structures having a set of fin ends. A set of inhibitory layers are disposed at the set of fin ends to inhibit excessive epitaxial growth at the fin ends.

Abstract translation: 描述了一种用于防止半导体器件中的外延生长的方法。 该方法包括切割FinFET结构的翅片以形成一组暴露的翅片末端。 一组侧壁间隔件形成在一组露出的翅片端部上，形成一组间隔件覆盖的翅片端部。 该侧壁间隔物组防止了在间隔物覆盖的翅片端部处的外延生长。 一种半导体器件包括具有一组翅片端部的翅片结构的集合。 一组抑制层设置在鳍片端部，以抑制翅片端部处的过度的外延生长。

公开(公告)号：US20150076498A1

公开(公告)日：2015-03-19

申请号：US14026172

申请日：2013-09-13

Applicant: Global Foundries, Inc. ,  International Business Machines Corporation

Inventor： Tenko Yamashita ,  Chun-Chen Yeh ,  Jin Cho ,  Hui Zang

IPC: H01L21/66

CPC classification number: H01L22/14 ,  G03F7/70466 ,  H01L21/823431 ,  H01L22/10 ,  H01L22/12 ,  H01L22/34

Abstract: A method for forming an integrated circuit having a test macro using a multiple patterning lithography process (MPLP) is provided. The method includes forming an active area of the test macro having a first and second gate region during a first step of MPLP, and forming a first and second source/drain regions in the active area during a second step of the MPLP. The method also includes forming a first contact connected to the first gate region, a second contact connected to the second gate region, a third contact connected to the first source/drain region, and a forth contact connected to the source/drain region and determining if an overlay shift occurred between the first step and the second step of the step of the MPLP by testing for a short between one or more of the first contact, the second contact, the third contact, or the fourth contact.

公开(公告)号：US20180083124A1

公开(公告)日：2018-03-22

申请号：US15815616

申请日：2017-11-16

Applicant: International Business Machines Corporation

Inventor： Miaomiao Wang ,  Tenko Yamashita ,  Chun-chen Yeh ,  Hui Zang

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/76898 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/4232 ,  H01L29/66545

Abstract: In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into a substrate interfacing with the gate. The recess is filled at least partially with a first conductive material. The first conductive material is insulated from the gate. The fin is replaced with a replacement structure. The replacement structure is electrically connected to the first conductive material using a second conductive material. the second conductive material is insulated from a first surface of the finFET. A first electrical contact structure is fabricated on the first surface. A second electrical contact structure is fabricated on a second surface of the finFET, the second surface being on a different spatial plane than the first surface.

公开(公告)号：US11443982B2

公开(公告)日：2022-09-13

申请号：US16183785

申请日：2018-11-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Andrew Greene ,  Ruilong Xie ,  Laertis Economikos ,  Veeraraghavan S. Basker ,  Chanro Park ,  Hui Zang

IPC: H01L21/768 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

Abstract: A semiconductor device includes one or more fins extending from a substrate, the one or more fins having source/drain epitaxial grown material (S/D epitaxy) thereon that merges one or more fins, a gate formed over the one or more fins, the gate including high k metal gate disposed between gate spacers and a metal liner over the S/D epitaxy and sides of the gate spacers. The gate includes a self-aligned contact cap over the HKMG and the metal liner.

公开(公告)号：US20200152509A1

公开(公告)日：2020-05-14

申请号：US16183785

申请日：2018-11-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Andrew Greene ,  Ruilong Xie ,  Laertis Economikos ,  Veeraraghavan S. Basker ,  Chanro Park ,  Hui Zang

IPC: H01L21/768 ,  H01L29/66 ,  H01L29/78 ,  H01L29/49 ,  H01L29/51 ,  H01L21/8234

Abstract: A semiconductor device includes one or more fins extending from a substrate, the one or more fins having source/drain epitaxial grown material (S/D epitaxy) thereon that merges one or more fins, a gate formed over the one or more fins, the gate including high k metal gate disposed between gate spacers and a metal liner over the S/D epitaxy and sides of the gate spacers. The gate includes a self-aligned contact cap over the HKMG and the metal liner.

公开(公告)号：US10388769B2

公开(公告)日：2019-08-20

申请号：US15815626

申请日：2017-11-16

Applicant: International Business Machines Corporation

Inventor： Miaomiao Wang ,  Tenko Yamashita ,  Chun-chen Yeh ,  Hui Zang

IPC: H01L29/08 ,  H01L29/66 ,  H01L21/768 ,  H01L29/417 ,  H01L29/423 ,  H01L21/8234

Abstract: In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into a substrate interfacing with the gate. The recess is filled at least partially with a first conductive material. The first conductive material is insulated from the gate. The fin is replaced with a replacement structure. The replacement structure is electrically connected to the first conductive material using a second conductive material. The second conductive material is insulated from a first surface of the finFET. A first electrical contact structure is fabricated on the first surface. A second electrical contact structure is fabricated on a second surface of the finFET, the second surface being on a different spatial plane than the first surface.

公开(公告)号：US10396183B2

公开(公告)日：2019-08-27

申请号：US15815605

申请日：2017-11-16

Applicant: International Business Machines Corporation

Inventor： Miaomiao Wang ,  Tenko Yamashita ,  Chun-chen Yeh ,  Hui Zang

IPC: H01L29/08 ,  H01L29/66 ,  H01L21/768 ,  H01L29/417 ,  H01L29/423 ,  H01L21/8234

Abstract: In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into a substrate interfacing with the gate. The recess is filled at least partially with a first conductive material. The first conductive material is insulated from the gate. The fin is replaced with a replacement structure. The replacement structure is electrically connected to the first conductive material using a second conductive material. the second conductive material is insulated from a first surface of the finFET. A first electrical contact structure is fabricated on the first surface. A second electrical contact structure is fabricated on a second surface of the finFET, the second surface being on a different spatial plane than the first surface.

公开(公告)号：US10038076B2

公开(公告)日：2018-07-31

申请号：US15230871

申请日：2016-08-08

Applicant: International Business Machines Corporation

Inventor： Miaomiao Wang ,  Tenko Yamashita ,  Chun-chen Yeh ,  Hui Zang

IPC: H01L21/768 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/423 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/76898 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/4232 ,  H01L29/66545

Abstract: In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into a substrate interfacing with the gate. The recess is filled at least partially with a first conductive material. The first conductive material is insulated from the gate. The fin is replaced with a replacement structure. The replacement structure is electrically connected to the first conductive material using a second conductive material. the second conductive material is insulated from a first surface of the finFET. A first electrical contact structure is fabricated on the first surface. A second electrical contact structure is fabricated on a second surface of the finFET, the second surface being on a different spatial plane than the first surface.

公开(公告)号：US20180076304A1

公开(公告)日：2018-03-15

申请号：US15815626

申请日：2017-11-16

Applicant: International Business Machines Corporation

Inventor： Miaomiao Wang ,  Tenko Yamashita ,  Chun-chen Yeh ,  Hui Zang

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/76898 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/4232 ,  H01L29/66545

Abstract: In a fin-Field Effect Transistor (finFET), a recess is created at a location of a fin, the fin being coupled to a gate of the finFET, the recess extending into a substrate interfacing with the gate. The recess is filled at least partially with a first conductive material. The first conductive material is insulated from the gate. The fin is replaced with a replacement structure. The replacement structure is electrically connected to the first conductive material using a second conductive material. the second conductive material is insulated from a first surface of the finFET. A first electrical contact structure is fabricated on the first surface. A second electrical contact structure is fabricated on a second surface of the finFET, the second surface being on a different spatial plane than the first surface.