公开(公告)号：US20070206657A1

公开(公告)日：2007-09-06

申请号：US11590886

申请日：2006-11-01

Applicant: Kevin Lin ,  Vincent Weng ,  Joy Liao

Inventor： Kevin Lin ,  Vincent Weng ,  Joy Liao

IPC: G01K1/00

CPC classification number: G01J5/06 ,  G01J5/0022 ,  G01J5/0025 ,  G01J5/04 ,  G01J5/049 ,  G01J5/08 ,  G01J5/0815

Abstract: The present invention discloses an improved probe structure, which comprises: a casing having an opening; a sleeve arranged inside the casing and around the opening; a temperature sensor installed inside the sleeve; a curved solid circularly arranged along the inner rim of the opening and above the temperature sensor. Owing to the curved solid, the detection angle can be reduced, and the detected temperature is closer to the eardrum temperature; further, the gap between the casing and the temperature sensor can be decreased, and the volume of the probe structure can be reduced.

Abstract translation: 本发明公开了一种改进的探针结构，其包括：具有开口的壳体; 套筒布置在壳体内并围绕开口; 安装在套筒内的温度传感器; 沿着开口的内边缘并且在温度传感器上方圆形地设置的弯曲实体。 由于弯曲的实心，检测角度可以降低，检测温度更接近鼓膜温度; 此外，壳体和温度传感器之间的间隙可以减小，并且可以减小探针结构的体积。

公开(公告)号：USD545411S1

公开(公告)日：2007-06-26

申请号：US29248460

申请日：2006-08-17

Applicant: Kevin Lin ,  Camel Hou

Designer： Kevin Lin ,  Camel Hou

公开(公告)号：US20070090151A1

公开(公告)日：2007-04-26

申请号：US11255318

申请日：2005-10-20

Applicant: Tomy Lin ,  Kevin Lin

Inventor： Tomy Lin ,  Kevin Lin

IPC: B23K1/00

CPC classification number: B23K5/22

Abstract: A welding head with heat-conducting structure for a gas welding gun comprises: a housing, a welding head and a non-flat net-like heating member. The housing is formed with a recess and a plurality of air holes in communication with the recess. The welding head is installed on the housing and formed with a guiding slope being located correspondingly to the air holes of the housing, and between the guiding slope and the air holes of the housing is formed a space. The non-flat net-like heating member received in the recess of the housing. The heating effect of the heating member is substantially increased by improving the contacting area. The heat produced during gas combustion will be discharged via the air holes and then guided to flow in the direction of the guide slope, and thus it can be prevented from damaging the neighboring electronic components.

Abstract translation: 一种用于气体焊枪的导热结构的焊接头包括：壳体，焊接头和非扁平网状加热构件。 壳体形成有与凹部连通的凹部和多个气孔。 焊接头安装在壳体上并且形成有与壳体的气孔相对应的引导斜面，并且在引导斜面和壳体的气孔之间形成空间。 非扁平网状加热构件容纳在壳体的凹部中。 加热部件的加热效果通过改善接触面积而显着提高。 气体燃烧时产生的热量将通过空气孔排出，然后被引导以沿着导向斜坡的方向流动，从而可以防止相邻电子部件的损坏。

公开(公告)号：US07192662B2

公开(公告)日：2007-03-20

申请号：US10909529

申请日：2004-08-02

Applicant: Chaopeng Chen ,  Kevin Lin ,  Jei Wei Chang

Inventor： Chaopeng Chen ,  Kevin Lin ,  Jei Wei Chang

IPC: G11B5/33

CPC classification number: C25D5/18 ,  C25D3/562 ,  C25D5/006 ,  C25D7/001 ,  G11B5/3109 ,  G11B5/3163 ,  H01F10/16 ,  H01F41/26 ,  Y10T428/115 ,  Y10T428/12493

Abstract: A plated magnetic thin film of high saturation magnetization and low coercivity having the general form Co100-a-bFeaMb, where M can be Mo, Cr, W, Ni or Rh, which is suitable for use in magnetic recording heads that write on narrow trackwidth, high coercivity media. The plating method that produces the alloy includes four current application processes: direct current, pulsed current, pulse reversed current and conditioned pulse reversed current.

Abstract translation: 具有高饱和磁化强度和低矫顽力的电镀磁性薄膜具有一般形式，其中M可以是 Mo，Cr，W，Ni或Rh，其适用于写在窄轨道宽度，高矫顽力介质上的磁记录头。 生产合金的电镀方法包括四个电流施加工艺：直流，脉冲电流，脉冲反向电流和调节脉冲反向电流。

公开(公告)号：US07136323B2

公开(公告)日：2006-11-14

申请号：US11162972

申请日：2005-09-29

Applicant: Kevin Lin ,  Alex Chang

Inventor： Kevin Lin ,  Alex Chang

IPC: G11C8/00

CPC classification number: G06F13/4234

Abstract: Apparatus and method for generating a variable-frequency clock is disclosed. A control state machine defines various commands and generates corresponding control signals. A variable-frequency clock generator then outputs the variable-frequency clock that has a specific pattern corresponding with the respective command, where the variable-frequency clock is constructed with a first clock and a second clock having a frequency different from the first clock. A control signals generator accordingly outputs the control signals that are also constructed with the first clock and the second clock.

Abstract translation: 公开了一种用于产生可变频率时钟的装置和方法。 控制状态机定义各种命令并产生相应的控制信号。 然后，可变频率时钟发生器输出具有与相应命令对应的特定模式的可变频率时钟，其中可变频率时钟由第一时钟构成，第二时钟具有与第一时钟不同的频率。 控制信号发生器相应地输出也由第一时钟和第二时钟构成的控制信号。

公开(公告)号：US20050249025A1

公开(公告)日：2005-11-10

申请号：US10709299

申请日：2004-04-27

Applicant: Kevin Lin ,  Alex Chang

Inventor： Kevin Lin ,  Alex Chang

IPC: G06F13/42 ,  G11C8/00 ,  G11C11/407

CPC classification number: G06F13/4234

Abstract: A method for providing a variable frequency clock for a SDRAM. First, receiving a clock with a fixed frequency and a plurality of signals, wherein each the signal is an interlace combination of a plurality of high level signals and a plurality of low levels signals. Second, extracting a plurality of proper positions from the signals, wherein each low level of each the signal corresponds to a proper position. Third, amending the frequency of the clock such that each the proper position corresponds to a rising edge of the clock.

Abstract translation: 一种用于为SDRAM提供可变频率时钟的方法。 首先，接收具有固定频率和多个信号的时钟，其中每个信号是多个高电平信号和多个低电平信号的隔行组合。 第二，从信号中提取多个适当的位置，其中每个信号的每个低电平对应于适当的位置。 第三，修改时钟的频率，使得每个正确的位置对应于时钟的上升沿。

公开(公告)号：US06403411B1

公开(公告)日：2002-06-11

申请号：US09208601

申请日：1998-12-08

Applicant: Chih-Hsun Chu ,  Horng-Nan Chern ,  Kevin Lin ,  Kuo-Tai Huang ,  Wen-Yi Hsieh ,  Tri-Rung Yew

Inventor： Chih-Hsun Chu ,  Horng-Nan Chern ,  Kevin Lin ,  Kuo-Tai Huang ,  Wen-Yi Hsieh ,  Tri-Rung Yew

IPC: H01L218234

CPC classification number: H01L28/84 ,  H01L21/76895

Abstract: A method for manufacturing the lower electrode of a DRAM capacitor. The method includes depositing polysilicon instead of amorphous silicon to form the lower electrode. Because polysilicon has a higher depositing temperature, it has a higher depositing rate capable of shortening depositing time. After forming the polysilicon lower electrode, the upper portion of the polysilicon layer is transformed into an amorphous layer by bombarding the polysilicon layer with ions to damage its internal structure. Eventually, hemispherical grain silicon is able to grow over the lower electrode, thereby increasing its surface area.

Abstract translation: 一种用于制造DRAM电容器的下电极的方法。 该方法包括沉积多晶硅而不是非晶硅以形成下电极。 由于多晶硅具有较高的沉积温度，因此具有更高的沉积速率，能够缩短沉积时间。 在形成多晶硅下电极之后，通过用离子轰击多晶硅层将多晶硅层的上部转变成非晶层，以破坏其内部结构。 最终，半球形晶粒硅能够在下电极上生长，从而增加其表面积。

公开(公告)号：USD445699S1

公开(公告)日：2001-07-31

申请号：US29132741

申请日：2000-11-13

Applicant: Kevin Lin

Designer： Kevin Lin

公开(公告)号：US06238974B1

公开(公告)日：2001-05-29

申请号：US09475212

申请日：1999-12-29

Applicant: Horng-Nan Chern ,  Kevin Lin ,  Kun-Chi Lin

Inventor： Horng-Nan Chern ,  Kevin Lin ,  Kun-Chi Lin

IPC: H01L218242

CPC classification number: H01L28/84 ,  H01L21/76895 ,  H01L27/10852

Abstract: A process of fabricating a bottom electrode for the storage capacitors of DRAM is disclosed. The process includes first forming an insulation layer on the surface of the device substrate, with the insulation layer patterned to form a contact opening that exposes a source/drain region of the memory cell transistor. A first conductive layer then covers the insulation layer and fills into the contact opening, with the first conductive layer contacting the exposed source/drain region. A native oxide layer is then formed on the surface of the first conductive layer. A second electrically conductive layer is then formed and patterned to form a recess substantially above the location of the contact opening in the insulation layer. A layer of HSG—Si then covers the surface of the second conductive layer and the surface of the recess, and the HSG—Si layer and the second conductive layer are patterned to form the bottom electrode of the capacitor. The recess and its covering HSG—Si layer increase the effective surface area of the bottom electrode of the capacitor.

Abstract translation: 公开了制造用于DRAM的存储电容器的底部电极的工艺。 该方法包括首先在器件衬底的表面上形成绝缘层，其中图案化绝缘层以形成暴露存储单元晶体管的源/漏区的接触开口。 然后，第一导电层覆盖绝缘层并填充到接触开口中，第一导电层与暴露的源极/漏极区接触。 然后在第一导电层的表面上形成自然氧化物层。 然后形成第二导电层并图案化以形成基本上在绝缘层中的接触开口位置上方的凹部。 然后，HSG-Si层覆盖第二导电层的表面和凹部的表面，并且对HSG-Si层和第二导电层进行图案化以形成电容器的底部电极。 凹槽及其覆盖的HSG-Si层增加了电容器底部电极的有效表面积。

公开(公告)号：US6074955A

公开(公告)日：2000-06-13

申请号：US189116

申请日：1998-11-09

Applicant: Kevin Lin ,  Chia-Wen Liang ,  Kun-Chi Lin

Inventor： Kevin Lin ,  Chia-Wen Liang ,  Kun-Chi Lin

IPC: H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242

CPC classification number: H01L27/10852 ,  H01L21/76816 ,  H01L21/76897 ,  H01L21/31144 ,  H01L27/10873 ,  H01L27/10882

Abstract: A method of fabricating a node contact window. A substrate having devices and a first dielectric layer is provided. Bit lines having spacer are formed on the first dielectric layer and a second is formed on the first dielectric layer. A hard material layer is then formed on the second dielectric layer. An opening is formed within the second dielectric layer to expose the spacer and the first dielectric layer. A polysilicon spacer is then formed on the sidewalls of the opening. A node contact window is formed by etching through the first dielectric layer to expose the substrate.

Abstract translation: 一种制造节点接触窗口的方法。 提供具有器件和第一介电层的衬底。 具有间隔物的位线形成在第一电介质层上，第二电极形成在第一电介质层上。 然后在第二电介质层上形成硬质材料层。 在第二电介质层内形成开口以露出间隔物和第一介电层。 然后在开口的侧壁上形成多晶硅间隔物。 通过蚀刻穿过第一电介质层形成节点接触窗，露出衬底。