利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

83 条记录 (耗时 0.036 秒)

    POLYPYRROLE AND SILVER VANADIUM OXIDE COMPOSITE
    43.
    发明申请
    POLYPYRROLE AND SILVER VANADIUM OXIDE COMPOSITE 有权
    POLYPYRROLE和SILVER VANADIUM OXIDE COMPOSITE

    公开(公告)号：US20090142664A1

    公开(公告)日：2009-06-04

    申请号：US12090292

    申请日：2006-10-17

    申请人： Branko N. Popov ,  Jong-Won Lee

    发明人： Branko N. Popov ,  Jong-Won Lee

    IPC分类号： H01M4/60 ,  C08G73/06

    CPC分类号： H01M4/54 ,  H01M4/06 ,  H01M4/364 ,  H01M4/382 ,  H01M4/60 ,  H01M4/606 ,  H01M6/16

    摘要： In one embodiment of the present disclosure, a composite electrode for a battery is provided. The composite electrode includes silver vanadium oxide present in an amount from about 75 weight percent to about 99 weight percent and polypyrrole present in an amount from about 1 weight percent to about 25 weight percent.

    摘要翻译： 在本公开的一个实施例中，提供了一种用于电池的复合电极。 复合电极包括以约75重量％至约99重量％的量存在的银钒氧化物，并且存在量为约1重量％至约25重量％的聚吡咯。

    Method of forming metal pattern using selective electroplating process
    44.
    发明申请
    Method of forming metal pattern using selective electroplating process 审中-公开
    使用选择性电镀工艺形成金属图案的方法

    公开(公告)号：US20060270228A1

    公开(公告)日：2006-11-30

    申请号：US11501791

    申请日：2006-08-09

    申请人： Hyo-Jong Lee ,  Jong-Won Lee ,  Duk-Ho Hong ,  Sang-Rok Hah ,  Hong-Seong Son ,  Jin-Sung Chung ,  Jae-Soo Ahn

    发明人： Hyo-Jong Lee ,  Jong-Won Lee ,  Duk-Ho Hong ,  Sang-Rok Hah ,  Hong-Seong Son ,  Jin-Sung Chung ,  Jae-Soo Ahn

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76846 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a metal pattern using a selective electroplating process is provided. First, a dielectric layer is formed on an underlying layer. Then, a trench defining blanket region is formed by patterning the dielectric layer. A diffusion barrier layer is conformally formed in the trench and on the blanket region. A polishing/plating stop layer and an upper seed layer are conformally formed on the diffusion barrier layer in a successive manner. The polishing/plating layer in the blanket region is exposed by selectively removing the upper seed layer in the blanket region, and, at the same time, a seed layer pattern remaining in the trenches is formed. An upper conductive layer is formed to fill the trench surrounded by the seed layer pattern using an electroplating process. Then, the dielectric layer in the blanket region is exposed by planarizing the upper conductive layer, the polishing/plating stop layer, the seed layer pattern, and the diffusion barrier layer.

    摘要翻译： 提供了使用选择性电镀工艺形成金属图案的方法。 首先，在下层形成介电层。 然后，通过图案化介电层形成限定覆盖区域的沟槽。 扩散阻挡层在沟槽和覆盖区域中共形地形成。 抛光/电镀停止层和上部种子层以连续的方式共形地形成在扩散阻挡层上。 通过选择性地去除覆盖区域中的上部种子层，暴露覆盖区域中的抛光/镀覆层，并且同时形成留在沟槽中的晶种层图案。 形成上导电层以使用电镀工艺填充由种子层图案包围的沟槽。 然后，通过平坦化上导电层，抛光/电镀停止层，种子层图案和扩散阻挡层来曝光覆盖区域中的电介质层。

    Refresh control circuit and method thereof and bank address signal change circuit and methods thereof
    45.
    发明申请
    Refresh control circuit and method thereof and bank address signal change circuit and methods thereof 有权

    公开(公告)号：US20060250874A1

    公开(公告)日：2006-11-09

    申请号：US11332477

    申请日：2006-01-17

    申请人： Jong-Won Lee ,  Tao-Seong Jang

    发明人： Jong-Won Lee ,  Tao-Seong Jang

    IPC分类号： G11C7/00

    CPC分类号： G11C11/40618 ,  G11C11/406 ,  G11C2211/4068

    摘要： A refresh control circuit and method thereof and a bank address signal change circuit and methods thereof. The bank address signal change circuit may receive bank address signals from a bank address signal generation circuit. The received bank address signals may designate a first at least one of a plurality of memory banks. The bank address signal change circuit may determine whether the first at least one designated memory bank is associated with the longest refresh cycles from among the plurality of memory banks. Based on the determination, the bank address signal change circuit may generate a plurality of bank address signal change signals designating a second at least one of the plurality of memory banks. A refresh operation circuit may perform a refreshing operation on the second at least one memory banks in accordance with the bank address signal change signals. The bank address signal generation circuit, bank address signal change circuit and refresh operation circuit may each be included in a refresh control circuit.

    Gain flattening device for an optical fiber amplifier
    46.
    发明授权
    Gain flattening device for an optical fiber amplifier 失效

    公开(公告)号：US07068879B2

    公开(公告)日：2006-06-27

    申请号：US10202529

    申请日：2002-07-24

    申请人： Jeong-Hwan Song ,  Oh-Dal Kwon ,  Jong-Won Lee

    发明人： Jeong-Hwan Song ,  Oh-Dal Kwon ,  Jong-Won Lee

    IPC分类号： G02B6/26

    CPC分类号： G02B6/266 ,  G02B6/02085 ,  H01S3/06754 ,  H01S2301/04

    摘要： A gain flattening device for an optical fiber amplifier. In the gain flattening device, a first end portion, having first and second ends, receives an amplified optical signal from a first amplification fiber via the first end. A second end portion, having third and fourth ends, outputs the amplified optical signal to a second amplification fiber via the fourth end. A first connector is included for connecting the first end to the third end. A second connector is included for connecting the second end to the fourth end. At least one reflective grating is further included with a predetermined gain curve at a predetermined wavelength band. An optical coupling portion couples the amplified optical signal from the first connector to the second connector in at least one coupling region where the first and second connectors are closer to each other than in any other area, and outputs part of the amplified optical signal reflected from the reflective grating via the second end.

    Vehicle air duct assembly of an integrated beam structure
    49.
    发明申请
    Vehicle air duct assembly of an integrated beam structure 审中-公开
    车辆风道组合的一体化梁结构

    公开(公告)号：US20050048904A1

    公开(公告)日：2005-03-03

    申请号：US10682974

    申请日：2003-10-14

    申请人： Jong-Won Lee

    发明人： Jong-Won Lee

    IPC分类号： B60H1/34 ,  B60H1/00 ,  B62D25/14 ,  B60S1/54

    CPC分类号： B62D25/142 ,  B60H1/0055 ,  B62D25/145

    摘要： A vehicle air duct assembly of an integrated beam structure includes a front beam member which is formed with an air vent duct for guiding air for the air conditioning of an automobile, a cowl cross bar for reinforcing the rigidity of the vehicle body and brackets for attaching a plurality of electrical equipment parts including an air bag; and a rear beam member which is coupled to the rear side of the front beam member and guides parts of air flowing through the air vent duct toward a front window glass of the automobile. According to the air duct, the number of parts is reduced, thus the manufacturing process is simplified, and a mixed material of steel and thermoplastic resin is used, thus the overall strength is increased and the weight is reduced.

    摘要翻译： 一体式梁结构的车辆空气导管组件包括前梁构件，前梁构件形成有用于引导用于汽车空调的空气的通气导管，用于增强车身刚性的前围横梁和用于附接的支架 多个电气设备部件，包括气囊; 以及后梁构件，其联接到前梁构件的后侧并将流过通气导管的空气的部分引向汽车的前窗玻璃。 根据空气管道，部件数量减少，制造过程简化，并且使用钢和热塑性树脂的混合材料，因此总体强度增加并且重量减轻。

    Memory array plane select and methods
    50.
    发明授权
    Memory array plane select and methods 有权
    内存阵列平面选择和方法

    公开(公告)号：US09117503B2

    公开(公告)日：2015-08-25

    申请号：US13597520

    申请日：2012-08-29

    申请人： Jong-Won Lee ,  Gianpaolo Spadini

    发明人： Jong-Won Lee ,  Gianpaolo Spadini

    IPC分类号： G11C13/04 ,  G11C8/12 ,  G11C5/02 ,  G11C13/00 ,  G11C11/16

    CPC分类号： G11C13/0023 ,  G11C5/025 ,  G11C8/12 ,  G11C11/1653 ,  G11C11/1659 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C2213/71

    摘要： Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.

    摘要翻译： 提供了存储器阵列及其形成方法。 示例性存储器阵列可以包括具有以矩阵形式布置的多个存储单元和多个平面选择装置的至少一个平面。 多个存储器单元的组通信地耦合到多个平面选择装置中的相应一个。 具有元件的解码逻辑形成在衬底材料中并且通信地耦合到多个平面选择装置。 多个存储单元和多个平面选择装置不形成在基板材料中。