Method of forming poly-silicon thin film transistors
    41.
    发明授权
    Method of forming poly-silicon thin film transistors 有权
    形成多晶硅薄膜晶体管的方法

    公开(公告)号:US07361566B2

    公开(公告)日:2008-04-22

    申请号:US11479895

    申请日:2006-06-30

    IPC分类号: H01L21/336

    摘要: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

    摘要翻译: 描述形成多晶硅薄膜晶体管的方法。 在基板上形成非晶硅薄膜晶体管,然后使用红外(IR)加热工艺。 栅极金属和源极/漏极金属被快速加热,并将热能传导到非晶硅层。 接下来,在非晶硅层中发生结晶以形成多晶硅。 因此,制造多晶硅薄膜晶体管。

    Thin Film Transistor (TFT) and Method for Fabricating the Same
    42.
    发明申请
    Thin Film Transistor (TFT) and Method for Fabricating the Same 审中-公开
    薄膜晶体管(TFT)及其制造方法

    公开(公告)号:US20070243670A1

    公开(公告)日:2007-10-18

    申请号:US11279933

    申请日:2006-04-17

    IPC分类号: H01L21/84 H01L21/20

    摘要: A method for fabricating a thin film transistor (“TFT”) device includes providing a substrate, forming a patterned amorphous silicon layer over the substrate including a pair of first regions, a second region disposed between the pair of first regions, and at least one third region, each of which being disposed between and contiguous with the second region and each of the pair of first regions, the second region including a sub-region contiguous with each of the at least one third region, forming a heat retaining layer over the substrate, irradiating the patterned amorphous silicon layer with a laser through the heat retaining layer to form a patterned crystallized silicon layer corresponding to the patterned amorphous silicon layer including a grain boundary extending substantially across a crystallized sub-region corresponding to the sub-region, and forming a patterned conductive layer over a portion of a crystallized second region of the patterned crystallized silicon layer corresponding to the second region of the patterned amorphous silicon layer.

    摘要翻译: 一种制造薄膜晶体管(“TFT”)器件的方法包括提供衬底,在衬底上形成图案化的非晶硅层,该衬底包括一对第一区域,设置在该对第一区域之间的第二区域和至少一个 第三区域,每个区域设置在第二区域之间并与第二区域和第一区域中的每一个相邻并且与第一区域中的每一个邻接,第二区域包括与至少一个第三区域中的每一个邻接的子区域, 衬底,通过所述保温层用激光照射所述图案化非晶硅层,以形成对应于所述图案化非晶硅层的图案化结晶硅层,所述图案化非晶硅层包括基本上跨越对应于所述子区域的结晶子区域延伸的晶界,以及 在图案化的结晶硅层对角结晶的第二区域的一部分上形成图案化的导电层 结合到图案化非晶硅层的第二区域。

    Active organic light emitting diode display structure
    43.
    发明授权
    Active organic light emitting diode display structure 有权
    主动有机发光二极管显示结构

    公开(公告)号:US07215073B2

    公开(公告)日:2007-05-08

    申请号:US10673324

    申请日:2003-09-30

    IPC分类号: H05B33/00 H01L51/50

    摘要: The present invention discloses an active organic light emitting diode (AOLED) display structure. A color filter and thin film transistor organic light emitting diode (TFT-OLED) are incorporated on one substrate of the AOLED. Moreover, a Indium Tin Oxide(ITO)layer of the AOLED is deposited with a black matrix layer so as to lower light leakage effect and increase the contrast and color purity level in between pixels of the display. By adopting such technology, a flat panel display having large area, high resolution and low product cost is accordingly implemented.

    摘要翻译: 本发明公开了一种有源有机发光二极管(AOLED)显示结构。 滤色器和薄膜晶体管有机发光二极管(TFT-OLED)结合在AOLED的一个基板上。 此外,AOLED的氧化铟锡(ITO)层沉积有黑矩阵层,以便降低漏光效应并增加显示器的像素之间的对比度和色纯度水平。 通过采用这种技术,可以实现面积大,分辨率高,产品成本低的平板显示器。

    Method of forming poly-silicon thin film transistors
    45.
    发明授权
    Method of forming poly-silicon thin film transistors 有权
    形成多晶硅薄膜晶体管的方法

    公开(公告)号:US07094656B2

    公开(公告)日:2006-08-22

    申请号:US10733721

    申请日:2003-12-11

    IPC分类号: H01L21/336

    摘要: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

    摘要翻译: 描述形成多晶硅薄膜晶体管的方法。 在基板上形成非晶硅薄膜晶体管,然后使用红外(IR)加热工艺。 栅极金属和源极/漏极金属被快速加热,并将热能传导到非晶硅层。 接下来,在非晶硅层中发生结晶以形成多晶硅。 因此,制造多晶硅薄膜晶体管。

    Method of forming poly-silicon crystallization
    46.
    发明授权
    Method of forming poly-silicon crystallization 有权
    形成多晶硅结晶的方法

    公开(公告)号:US06982195B2

    公开(公告)日:2006-01-03

    申请号:US10780589

    申请日:2004-02-19

    IPC分类号: H01L21/84

    摘要: An amorphous silicon layer is formed on a substrate, and then a protective layer and a reflective layer are formed in turn to form a film stack on portions of the amorphous silicon layer. The reflective layer is a metal material with reflectivity of laser, and the protective layer is able to prevent metal diffusion. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer under the film stack of the protective layer and the reflective layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer to form poly-silicon having crystal grains with size of micrometers and high grain order.

    摘要翻译: 在基板上形成非晶硅层,然后依次形成保护层和反射层,以在非晶硅层的部分上形成膜堆叠。 反射层是具有激光反射率的金属材料,保护层能够防止金属扩散。 当准分子激光器加热非晶硅层以使非晶硅结晶时,在保护层和反射层的膜堆叠下面的非晶硅层中形成成核位置。 接下来,在非晶硅层中发生横向膨胀结晶,形成晶粒大小为微米,晶粒度高的多晶硅。

    Multi-layered complementary wire structure and manufacturing method thereof
    47.
    发明申请
    Multi-layered complementary wire structure and manufacturing method thereof 有权
    多层互补线结构及其制造方法

    公开(公告)号:US20050253249A1

    公开(公告)日:2005-11-17

    申请号:US11131084

    申请日:2005-05-17

    摘要: A multi-layered wire structure includes a substrate, a plurality of first conductive lines formed in a first layer over the substrate extending in parallel to each other in a first direction, a plurality of second conductive lines formed in a second layer over the first layer extending in parallel to each other in a second direction orthogonal to the first direction, a plurality of sets of third conductive lines formed in the second layer extending in the first direction, each set of third conductive lines corresponding to one of the first conductive lines, and a plurality of sets of conductive paths formed between the first layer and the second layer, each set of conductive paths corresponding to one of the first conductive lines and one set of third conductive lines and electrically connecting the corresponding first conductive line to the corresponding set of third conductive lines.

    摘要翻译: 一种多层导线结构,包括:基板,形成在第一层上的多个第一导电线,该第一导电线在基板上沿着第一方向彼此平行地延伸;多个第二导电线,形成在第一层上的第一层 在与第一方向正交的第二方向上彼此平行地延伸的多个第三导线组,所述第二导电线形成在第一方向上延伸,每组第三导线对应于第一导线之一, 以及形成在所述第一层和所述第二层之间的多组导电路径,每组导电路径对应于所述第一导电线中的一条和一组第三导电线,并将相应的第一导电线电连接到相应的集合 的第三导线。

    Digital programmable direct current to direct current (DC-DC) voltage-down converter
    48.
    发明授权
    Digital programmable direct current to direct current (DC-DC) voltage-down converter 失效
    数字可编程直流直流直流(DC-DC)降压转换器

    公开(公告)号:US06181123B2

    公开(公告)日:2001-01-30

    申请号:US09267879

    申请日:1999-03-11

    IPC分类号: G05B2402

    CPC分类号: H02M3/157

    摘要: A digital programmable DC—DC voltage-down converter which can be used in a low voltage and low power digital circuit design is disclosed. The DC—DC voltage-down converter includes at least a digitally controlled oscillator (DCO), a pulse-width modulator (PWM), a gate driver, and a switching-type voltage-down converter. Duty cycle and operating frequency of the modulated signal are controlled by using two digital control signals. Furthermore, combining the pulse-width modulator and the digitally controlled oscillator (DCO), the duty cycle of the generated clock is more robustly stable for different frequencies during process variation.

    摘要翻译: 公开了可用于低电压和低功率数字电路设计的数字可编程DC-DC降压转换器。 DC-DC降压转换器至少包括数字控制振荡器(DCO),脉冲宽度调制器(PWM),栅极驱动器和开关型降压转换器。 通过使用两个数字控制信号来控制调制信号的占空比和工作频率。 此外,组合脉冲宽度调制器和数字控制振荡器(DCO)时,生成的时钟的占空比在过程变化期间对于不同的频率更稳健。

    Multi-layered complementary conductive line structure
    49.
    发明授权
    Multi-layered complementary conductive line structure 有权
    多层互补导线结构

    公开(公告)号:US07960731B2

    公开(公告)日:2011-06-14

    申请号:US11870426

    申请日:2007-10-11

    IPC分类号: H01L21/84

    摘要: A multi-layered complementary conductive line structure, a manufacturing method thereof and a manufacturing method of a TFT (thin film transistor) display array are provided. The process of TFT having multi-layered complementary conductive line structures does not need to increase the mask number in comparison with the currently process and is able to solve the resistance problem of the lines inside a display.

    摘要翻译: 提供多层互补导电线结构,其制造方法和TFT(薄膜晶体管)显示阵列的制造方法。 具有多层互补导电线结构的TFT的工艺与当前工艺相比不需要增加掩模数,并且能够解决显示器内部的线的电阻问题。