公开(公告)号：US20050289490A1

公开(公告)日：2005-12-29

申请号：US11159283

申请日：2005-06-22

申请人： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

发明人： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

IPC分类号： G06F17/50 ,  G06G7/62

CPC分类号： G06F17/5036 ,  G06F17/5068

摘要： Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: (1) digital electronic integrated circuit elements; (2) analog/mixed signal electronic integrated circuit elements; and (3) opto-electronic elements (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated. A physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified, to assess the properties of the overall physical design. The results of the co-simulation are compared to the results of the co-verification, with alterations made in the logic design and/or the physical layout until the desired operating parameters are obtained. Once the desired results are generated, conventional wafer-level fabrication operations are then considered to provide a final product (“tape out”).

摘要翻译： 计算机辅助设计（CAD）工具用于在单片硅基电光芯片中执行电气和光学部件的集成设计，验证和布局。 为最终的硅基单片结构中包含的三种不同类型的元件准备了独立的顶级行为逻辑设计：（1）数字电子集成电路元件; （2）模拟/混合信号电子集成电路元件; 和（3）光电元件（包括无源和有源光学元件）。 一旦行为逻辑设计完成，结果将被合并并共同模拟。 为电路中的每种不同类型的元件开发和验证物理布局设计。 然后将单独的物理布局共同验证，以评估整体物理设计的属性。 将共模拟的结果与协同验证的结果进行比较，在逻辑设计和/或物理布局中进行改变，直到获得所需的操作参数。 一旦产生期望的结果，则常规晶圆级制造操作被认为是提供最终产品（“磁带输出”）。

公开(公告)号：US07269809B2

公开(公告)日：2007-09-11

申请号：US11159283

申请日：2005-06-22

申请人： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

发明人： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

IPC分类号： G06F17/50 ,  G06F17/10

CPC分类号： G06F17/5036 ,  G06F17/5068

摘要： Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: (1) digital electronic integrated circuit elements; (2) analog/mixed signal electronic integrated circuit elements; and (3) opto-electronic elements (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated. A physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified, to assess the properties of the overall physical design. The results of the co-simulation are compared to the results of the co-verification, with alterations made in the logic design and/or the physical layout until the desired operating parameters are obtained. Once the desired results are generated, conventional wafer-level fabrication operations are then considered to provide a final product (“tape out”).

摘要翻译： 计算机辅助设计（CAD）工具用于在单片硅基电光芯片中执行电气和光学部件的集成设计，验证和布局。 为最终的硅基单片结构中包含的三种不同类型的元件准备了独立的顶级行为逻辑设计：（1）数字电子集成电路元件; （2）模拟/混合信号电子集成电路元件; 和（3）光电元件（包括无源和有源光学元件）。 一旦行为逻辑设计完成，结果将被合并并共同模拟。 为电路中的每种不同类型的元件开发和验证物理布局设计。 然后将单独的物理布局共同验证，以评估整体物理设计的属性。 将共模拟的结果与协同验证的结果进行比较，在逻辑设计和/或物理布局中进行改变，直到获得所需的操作参数。 一旦产生期望的结果，则常规晶圆级制造操作被认为是提供最终产品（“磁带输出”）。

公开(公告)号：US20130182996A1

公开(公告)日：2013-07-18

申请号：US13737029

申请日：2013-01-09

申请人： Kalpendu Shastri ,  Soham Pathak ,  John Fangman ,  Vipulkumar Patel ,  Kishor Desai ,  Ravinder Kachru

发明人： Kalpendu Shastri ,  Soham Pathak ,  John Fangman ,  Vipulkumar Patel ,  Kishor Desai ,  Ravinder Kachru

IPC分类号： G02B6/42 ,  G02B6/12

CPC分类号： G02B6/42 ,  G02B6/12 ,  G02B6/3886 ,  G02B6/4214 ,  G02B6/4259 ,  G02B6/4292 ,  Y10T29/49155

摘要： An apparatus for providing releasable attachment between a fiber connector and an opto-electronic assembly, the opto-electronic assembly utilizing an interposer substrate to support a plurality of opto-electronic components that generates optical output signals and receives optical input signals. An enclosure is used to cover the interposer substrate and includes a transparent region through which the optical output and input signals pass unimpeded. A magnetic connector component is attached to the lid and positioned to surround the transparent region, with a fiber connector for supporting one or more optical fibers magnetically attached to the connector component by virtue of a metallic component contained in the fiber connector. This arrangement provides releasable attachment of the fiber connector to the enclosure in a manner where the optical output and input signals align with the optical fibers in the connector.

摘要翻译： 一种用于在光纤连接器和光电子组件之间提供可释放附件的装置，所述光电组件利用插入器基板来支撑产生光输出信号并接收光输入信号的多个光电元件。 外壳用于覆盖插入器基板，并且包括透明区域，光输出和输入信号通过该透明区域畅通无阻。 磁性连接器部件附接到盖子并且被定位成围绕透明区域，光纤连接器用于通过光纤连接器中包含的金属部件来支撑一个或多个磁性地附接到连接器部件的光纤。 这种布置以光输出和输入信号与连接器中的光纤对准的方式提供光纤连接器到外壳的可释放附接。

公开(公告)号：US20130183008A1

公开(公告)日：2013-07-18

申请号：US13737080

申请日：2013-01-09

申请人： Kalpendu Shastri ,  Soham Pathak ,  Utpal Chakrabarti ,  Vipulkumar Patel ,  Bipin Dama ,  Ravinder Kachru ,  Kishor Desai

发明人： Kalpendu Shastri ,  Soham Pathak ,  Utpal Chakrabarti ,  Vipulkumar Patel ,  Bipin Dama ,  Ravinder Kachru ,  Kishor Desai

IPC分类号： G02B6/42

CPC分类号： G02B6/4292 ,  B82Y20/00 ,  C03C15/00 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4246 ,  G02B6/4259 ,  Y10T29/4978

摘要： An apparatus for providing self-aligned optical coupling between an opto-electronic substrate and a fiber array, where the substrate is enclosed by a transparent lid such that the associated optical signals enter and exit the arrangement through the transparent lid. The apparatus takes the form of a two-part connectorized fiber array assembly where the two pieces uniquely mate to form a self-aligned configuration. A first part, in the form of a plate, is attached to the transparent lid in the area where the optical signals pass through. The first plate includes a central opening with inwardly-tapering sidewalls surrounding its periphery. A second plate is also formed to include a central opening and has a lower protrusion with inwardly-tapering sidewalls that mate with the inwardly-tapering sidewalls of the first plate to form the self-aligned connectorized fiber array assembly. The fiber array is then attached to the second plate in a self-aligned fashion.

摘要翻译： 一种用于在光电子基板和光纤阵列之间提供自对准光耦合的装置，其中基板由透明盖包围，使得相关联的光信号通过透明盖进入和离开布置。 该装置采取两部分连接的光纤阵列组件的形式，其中两个部件独特地配合以形成自对准配置。 在光信号通过的区域中，透明盖附着有板的形式的第一部分。 第一板包括具有围绕其周边的向内逐渐变细的侧壁的中心开口。 第二板也形成为包括中心开口并且具有下突起，其具有向内渐缩的侧壁，与第一板的向内渐缩的侧壁配合形成自对准的连接纤维阵列组件。 然后将纤维阵列以自对准的方式附接到第二板。

公开(公告)号：US20130101250A1

公开(公告)日：2013-04-25

申请号：US13656528

申请日：2012-10-19

申请人： Kishor Desai ,  Ravinder Kachru ,  Vipulkumar Patel ,  Bipin Dama ,  Kalpendu Shastri ,  Soham Pathak

发明人： Kishor Desai ,  Ravinder Kachru ,  Vipulkumar Patel ,  Bipin Dama ,  Kalpendu Shastri ,  Soham Pathak

IPC分类号： G02B6/12 ,  H01L33/52

CPC分类号： G02B6/4255 ,  G02B6/12 ,  G02B6/13 ,  G02B6/4201 ,  G02B6/4257 ,  G02B6/4292 ,  G02B6/43 ,  H01L21/50 ,  H01L23/04 ,  H01L23/48 ,  H01L25/167 ,  H01L31/0203 ,  H01L33/52 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1616 ,  H01L2924/165 ,  H01L2924/16788 ,  H05K1/0268 ,  H05K1/0274 ,  H05K2201/10121 ,  H01L2924/0105 ,  H01L2924/01079

摘要： An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.

摘要翻译： 提供了一种光电子组件，其包括用于支撑多个互连的光学和电气部件的基板（通常为硅或玻璃）。 设置一层密封材料以概述衬底的限定的周边区域。 将模制的玻璃盖设置在基底上并结合到基底上，其中模制的玻璃盖构造成产生与限定的基底周边区域匹配的覆盖区。 模制玻璃盖的底表面包括一层接合材料，其在接触时接触基底的密封材料层，形成结合组件。 在一种形式中，提出了一种晶片级组装工艺，其中多个光电组件设置在硅晶片上，并且多个玻璃盖被模制在一片玻璃中，然后将其粘合到硅晶片上。

公开(公告)号：US07327911B2

公开(公告)日：2008-02-05

申请号：US11253456

申请日：2005-10-19

申请人： David Piede ,  Kalpendu Shastri ,  Robert Keith Montgomery ,  Prakash Gothoskar ,  Vipulkumar Patel ,  Mary Nadeau

发明人： David Piede ,  Kalpendu Shastri ,  Robert Keith Montgomery ,  Prakash Gothoskar ,  Vipulkumar Patel ,  Mary Nadeau

IPC分类号： G02B6/12 ,  G02B6/10

CPC分类号： G02F1/025 ,  G02B6/3586 ,  G02B6/3588 ,  G02B6/3594 ,  G02F1/0123 ,  G02F2201/58 ,  G02F2203/21

摘要： An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.

摘要翻译： 通过使用单片光电反馈装置来提供基​​于SOI的光电系统的可靠性和寿命的改进，该装置监测光电系统内的一个或多个光信号，并提供电反馈信号以调整 所选光器件的运行参数。 例如，可以控制输入信号耦合取向。 或者，光学调制器，开关，滤波器或衰减器的操作可以通过本发明的单片反馈装置进行闭环反馈控制。 反馈布置还可以包括耦合到控制电子器件的校准/查找表，以提供用于分析系统性能的基线信号。

公开(公告)号：US20130202255A1

公开(公告)日：2013-08-08

申请号：US13755843

申请日：2013-01-31

申请人： Chris Kiyoshi Togami ,  Soham Pathak ,  Kalpendu Shastri ,  Kishor Desai ,  Ravinder Kachru ,  Bipin Dama ,  Vipulkumar Patel

发明人： Chris Kiyoshi Togami ,  Soham Pathak ,  Kalpendu Shastri ,  Kishor Desai ,  Ravinder Kachru ,  Bipin Dama ,  Vipulkumar Patel

IPC分类号： G02B6/42 ,  G02B6/43

CPC分类号： G02B6/421 ,  G02B6/3885 ,  G02B6/4204 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4292 ,  G02B6/43

摘要： An apparatus for providing single mode optical signal coupling between an opto-electronic transceiver and a single mode optical fiber array takes the form of a lens array and a ferrule component. The lens array includes a plurality of separate lens element disposed to intercept a like plurality of single mode optical output signal from the opto-electronic transceiver and provide as an output a focused version thereof. The ferrule component includes a plurality of single mode fiber stubs that are passively aligned with the lens array and support the transmission of the focused, single mode optical output signals towards the associated single mode optical fiber array.

摘要翻译： 用于在光电收发器和单模光纤阵列之间提供单模光信号耦合的装置采用透镜阵列和套圈部件的形式。 透镜阵列包括多个单独的透镜元件，其设置成截取来自光电收发器的类似多个单模光输出信号，并提供其聚焦版本的输出。 套圈组件包括与透镜阵列无源对准的多个单模光纤短截线，并支持将聚焦的单模光输出信号传输到相关联的单模光纤阵列。

公开(公告)号：US20130188970A1

公开(公告)日：2013-07-25

申请号：US13745773

申请日：2013-01-19

申请人： Kalpendu Shastri ,  Vipulkumar Patel ,  Soham Pathak ,  Utpal Chakrabarti ,  Bipin Dama ,  Ravinder Kachru ,  Kishor Desai

发明人： Kalpendu Shastri ,  Vipulkumar Patel ,  Soham Pathak ,  Utpal Chakrabarti ,  Bipin Dama ,  Ravinder Kachru ,  Kishor Desai

IPC分类号： H04B10/12

CPC分类号： H04B10/501 ,  G02B6/3512 ,  G02B6/3692 ,  G02B6/4214 ,  G02B6/4256 ,  G02B6/4292 ,  Y10T29/49002

摘要： An apparatus for transmitting optical signals includes an interposer for supporting opto-electronic components used to create optical output signals. An enclosure is used to encapsulate the populated interposer assembly and includes a silicon sidewall and a transparent lid. The sidewall is etched to include a turning mirror feature with a reflecting surface at a predetermined angle θ, the turning mirror disposed to intercept the optical output signals and re-direct them through the enclosure's transparent lid. A coverplate is disposed over and aligned with the enclosure, where the coverplate includes a silicon sidewall member that is etched to include a turning mirror element with a reflecting surface at the same angle θ as the enclosure's turning mirror element. The optical signals re-directed by the enclosure then pass through the transparent lid of the enclosure, impinge the turning mirror element of the coverplate, and are then re-directed along the longitudinal axis.

摘要翻译： 用于发送光信号的装置包括用于支持用于产生光输出信号的光电组件的插入器。 外壳用于封装填充的插入器组件，并且包括硅侧壁和透明盖。 侧壁被蚀刻以包括具有预定角度θ的反射表面的转向镜特征，转向镜被设置成拦截光学输出信号并将其重新引导通过外壳的透明盖。 盖板设置在外壳上并与壳体对准，其中盖板包括硅侧壁构件，其被蚀刻以包括具有与外壳的转向镜元件相同角度θ的反射表面的转向镜元件。 由外壳重新引导的光学信号然后穿过外壳的透明盖，撞击盖板的转向镜元件，然后沿着纵向轴线重新定向。

公开(公告)号：US07657130B2

公开(公告)日：2010-02-02

申请号：US12287366

申请日：2008-10-08

申请人： Kalpendu Shastri ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede ,  Mark Webster

发明人： Kalpendu Shastri ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede ,  Mark Webster

IPC分类号： G02F1/035 ,  G02F1/01 ,  G02B6/12

CPC分类号： G02F1/0121 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2001/0152

摘要： A silicon-insulator-silicon capacitive (SISCAP) optical modulator is configured to provide analog operation for applications which previously required the use of relatively large, power-consuming and expensive lithium niobate devices. An MZI-based SISCAP modulator (preferably a balanced arrangement with a SISCAP device on each arm) is responsive to an incoming high frequency electrical signal and is biased in a region where the capacitance of the device is essentially constant and the transform function of the MZI is linear.

摘要翻译： 硅 - 绝缘体 - 硅电容（SISCAP）光调制器被配置为为先前需要使用相对较大，耗电和昂贵的铌酸锂器件的应用提供模拟操作。 基于MZI的SISCAP调制器（优选地，在每个臂上具有SISCAP器件的平衡布置）响应于输入的高频电信号，并且被偏置在器件的电容基本上恒定的区域中，并且MZI的变换函数 是线性的

公开(公告)号：US20060177173A1

公开(公告)日：2006-08-10

申请号：US11346718

申请日：2006-02-03

申请人： Kalpendu Shastri ,  Vipulkumar Patel ,  David Piede ,  John Fangman

发明人： Kalpendu Shastri ,  Vipulkumar Patel ,  David Piede ,  John Fangman

IPC分类号： G02B6/12 ,  G02B6/26 ,  G02B6/42 ,  G02B6/10

CPC分类号： G02B6/42 ,  G02B6/4214 ,  G02B6/43 ,  G02F1/025 ,  H01L31/12

摘要： A vertical stack of integrated circuits includes at least one CMOS electronic integrated circuit (IC), an SOI-based opto-electronic integrated circuit structure, and an optical input/output coupling element. A plurality of metalized vias may be formed through the thickness of the stack so that electrical connections can be made between each integrated circuit. Various types of optical input/output coupling can be used, such as prism coupling, gratings, inverse tapers, and the like. By separating the optical and electrical functions onto separate ICs, the functionalities of each may be modified without requiring a re-design of the remaining system. By virtue of using SOI-based opto-electronics with the CMOS electronic ICs, a portion of the SOI structure may be exposed to provide access to the waveguiding SOI layer for optical coupling purposes.

摘要翻译： 集成电路的垂直堆叠包括至少一个CMOS电子集成电路（IC），基于SOI的光电集成电路结构以及光输入/输出耦合元件。 可以通过堆叠的厚度形成多个金属化通孔，使得可以在每个集成电路之间进行电连接。 可以使用各种类型的光输入/输出耦合，例如棱镜耦合，光栅，逆锥等。 通过将光学和电气功能分离到单独的IC上，可以修改每个功能，而不需要重新设计剩余的系统。 通过使用具有CMOS电子IC的基于SOI的光电子器件，SOI结构的一部分可能被暴露以提供对波导SOI层的访问以用于光学耦合目的。