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公开(公告)号:US08901650B2
公开(公告)日:2014-12-02
申请号:US13575959
申请日:2011-02-01
申请人: Naoki Makita , Hiroki Mori , Masaki Saitoh
发明人: Naoki Makita , Hiroki Mori , Masaki Saitoh
IPC分类号: H01L29/786 , H01L27/12
CPC分类号: H01L27/1214 , H01L27/092 , H01L27/1108 , H01L27/1222 , H01L27/1277 , H01L27/1288 , H01L29/045 , H01L29/78696
摘要: A semiconductor device of the present invention includes an n-channel first thin film transistor and a p-channel second thin film transistor on one and the same substrate. The first thin film transistor has a first semiconductor layer (27), and the second thin film transistor has a second semiconductor layer (22). The first semiconductor layer (27) and the second semiconductor layer (22) are formed from one and the same film. Each of the first semiconductor layer (27) and the second semiconductor layer (22) has a slope portion (27e, 22e) positioned in the periphery and a main portion (27m, 22m) which is a portion excluding the slope portion. A p-type impurity is introduced into only a part of the slope portion (27e) of the first semiconductor layer with higher density than the main portion (27m) of the first semiconductor layer, the main portion (22m) of the second semiconductor layer, and the slope portion (22e) of the second semiconductor layer. Accordingly, a driving voltage of the semiconductor device provided with the n-type TFT and the p-type TFT can be reduced.
摘要翻译: 本发明的半导体器件在同一衬底上包括n沟道第一薄膜晶体管和p沟道第二薄膜晶体管。 第一薄膜晶体管具有第一半导体层(27),第二薄膜晶体管具有第二半导体层(22)。 第一半导体层(27)和第二半导体层(22)由同一膜形成。 第一半导体层(27)和第二半导体层(22)中的每一个具有位于周边的倾斜部分(27e,22e)和除斜坡部分之外的部分的主要部分(27m,22m)。 仅在第一半导体层的倾斜部分(27e)的一部分中,比第一半导体层的主要部分(27m)更高的密度,将第二半导体层的主要部分(22m)引入p型杂质 ,和第二半导体层的倾斜部分(22e)。 因此,可以减小设置有n型TFT和p型TFT的半导体器件的驱动电压。
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公开(公告)号:US20110297936A1
公开(公告)日:2011-12-08
申请号:US13201603
申请日:2010-02-12
申请人: Naoki Makita , Masahiro Fujiwara
发明人: Naoki Makita , Masahiro Fujiwara
IPC分类号: H01L31/0376
CPC分类号: H01L27/1214 , H01L27/14623 , H01L27/14632 , H01L27/14692 , H01L29/78633
摘要: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.
摘要翻译: 半导体器件700包括基板和形成在基板上用于感测光并用于产生感测信号的光学传感器单元700,该光学传感器单元700包括用于检测第一波长范围内的光的第一薄膜二极管701A, 第二薄膜二极管701B检测在第一波长范围内包含长于最长波长的波长的第二波长范围内的光。 第一薄膜二极管701A和第二薄膜二极管701B彼此并联连接。 感测信号基于来自第一薄膜二极管701A和第二薄膜二极管701B之一的输出而产生。 通过这种方式,可以扩大由光学传感器单元检测的波长范围,并且可以提高感测灵敏度。
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公开(公告)号:US20110261019A1
公开(公告)日:2011-10-27
申请号:US13125865
申请日:2009-10-20
申请人: Naoki Makita , Hiroshi Nakatsuji
发明人: Naoki Makita , Hiroshi Nakatsuji
IPC分类号: H01L29/786 , G06F3/042 , G09G5/10 , H01L21/31 , H01L21/20
CPC分类号: H01L27/14665 , G06F3/042 , G09G5/10 , H01L27/12 , H01L27/1229 , H01L29/78633
摘要: A semiconductor device according to the present invention includes a thin-film transistor and a thin-film diode. The respective semiconductor layers and of the thin-film transistor and the thin-film diode are crystalline semiconductor layers that have been formed by crystallizing the same crystalline semiconductor film. Ridges have been formed on the surface of the semiconductor layer of the thin-film diode. And the semiconductor layer of the thin-film diode has a greater surface roughness than the semiconductor layer of the thin-film transistor.
摘要翻译: 根据本发明的半导体器件包括薄膜晶体管和薄膜二极管。 各半导体层以及薄膜晶体管和薄膜二极管是通过使相同的结晶半导体膜结晶而形成的结晶半导体层。 已经在薄膜二极管的半导体层的表面上形成了脊。 并且薄膜二极管的半导体层具有比薄膜晶体管的半导体层更大的表面粗糙度。
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公开(公告)号:US07262469B2
公开(公告)日:2007-08-28
申请号:US10734312
申请日:2003-12-15
申请人: Naoki Makita
发明人: Naoki Makita
IPC分类号: H01L23/62
CPC分类号: H01L27/12 , H01L27/1285 , H01L29/06 , H01L29/42384
摘要: A semiconductor device includes a thin film transistor including a semiconductor layer that includes a channel region, a source region and a drain region, a gate insulating film provided on the semiconductor layer, and a gate electrode for controlling the conductivity of the channel region, wherein the surface of the semiconductor layer includes a minute protruding portion, and the side surface inclination angle of the gate electrode is larger than the inclination angle of the protruding portion of the semiconductor layer.
摘要翻译: 半导体器件包括薄膜晶体管,其包括包括沟道区,源极区和漏极区的半导体层,设置在半导体层上的栅极绝缘膜,以及用于控制沟道区的导电性的栅电极,其中 半导体层的表面包括微小突出部分,并且栅电极的侧表面倾斜角度大于半导体层的突出部分的倾斜角度。
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公开(公告)号:US06998641B2
公开(公告)日:2006-02-14
申请号:US10183056
申请日:2002-06-27
申请人: Naoki Makita , Misako Nakazawa , Hideto Ohnuma , Takuya Matsuo
发明人: Naoki Makita , Misako Nakazawa , Hideto Ohnuma , Takuya Matsuo
IPC分类号: H01L31/112
CPC分类号: H01L29/66757 , H01L21/02532 , H01L21/02672 , H01L21/02686 , H01L27/1277 , H01L29/78612 , H01L29/78621
摘要: In order to solve the problem of inferior gettering efficiency in the n-channel TFT, the present invention provides at an end of the source/drain regions of the n-channel TFT a highly efficient gettering region that contains both of an n-type impurity and a p-type impurity with the concentration of the p-type impurity set higher than the concentration of the n-type impurity.
摘要翻译: 为了解决在n沟道TFT中吸杂效率差的问题,本发明在n沟道TFT的源极/漏极区域的末端提供了一种高效率的吸杂区域,其包含n型杂质 以及p型杂质浓度高于n型杂质浓度的p型杂质。
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公开(公告)号:US06927107B1
公开(公告)日:2005-08-09
申请号:US09667527
申请日:2000-09-22
申请人: Naoki Makita , Hiromi Sakamoto , Masao Moriguchi
发明人: Naoki Makita , Hiromi Sakamoto , Masao Moriguchi
IPC分类号: C30B29/06 , H01L21/00 , H01L21/20 , H01L21/268 , H01L21/322 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786
CPC分类号: H01L21/02672 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/02686 , H01L21/2022 , H01L21/2026 , H01L27/1277 , H01L29/66757
摘要: In a production method of a semiconductor device, a catalyst element, e.g. Ni, is added to an amorphous silicon film, formed on a substrate with an insulating surface, for promoting crystallization of the amorphous silicon film. Thereafter, the amorphous silicon film is subjected to heat treatment to cause crystal growth therein. Next, the crystal growth is stopped in a state where minute amorphous regions (uncrystallized regions) remain in the film. Next, the silicon film is irradiated with strong light (laser light) so as to be further crystallized. As a result, a crystalline silicon film that has high quality and is excellent in uniformity is obtained.
摘要翻译: 在半导体器件的制造方法中,催化剂元件例如 将Ni添加到形成在具有绝缘表面的基板上的非晶硅膜中,用于促进非晶硅膜的结晶。 然后,对非晶硅膜进行热处理,使晶体生长。 接下来,在薄膜中保留微小的非晶区域(未结晶区域)的状态下停止晶体生长。 接着,用强光(激光)照射硅膜,进一步结晶。 结果,得到质量好,均匀性优异的结晶硅膜。
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公开(公告)号:US20050170573A1
公开(公告)日:2005-08-04
申请号:US11088888
申请日:2005-03-25
申请人: Naoki Makita , Misako Nakazawa , Hideto Ohnuma , Takuya Matsuo
发明人: Naoki Makita , Misako Nakazawa , Hideto Ohnuma , Takuya Matsuo
IPC分类号: G02F1/1368 , H01L21/20 , H01L21/322 , H01L21/336 , H01L21/77 , H01L27/08 , H01L29/786 , H01L21/00 , H01L21/84
CPC分类号: H01L29/66757 , H01L21/02532 , H01L21/02672 , H01L21/02686 , H01L27/1277 , H01L29/78612 , H01L29/78621
摘要: Problems in prior art regarding an n-channel TFT in the source/drain gettering method are solved. In the n-channel TFT, its source/drain regions contain only an n-type impurity. Therefore, compared to a p-channel TFT whose source/drain regions contain an n-type impurity and a higher concentration of p-type impurity, the gettering efficiency is inferior in a channel region of the n-channel transistor. Accordingly, the problem of inferior gettering efficiency in the n-channel TFT can be solved by providing at an end of its source/drain regions a highly efficient gettering region that contains an n-type impurity and a p-type impurity both with the concentration of the p-type impurity set higher than the concentration of the n-type impurity.
摘要翻译: 解决了在源极/漏极吸杂方法中关于n沟道TFT的现有技术中的问题。 在n沟道TFT中,其源极/漏极区仅包含n型杂质。 因此,与源极/漏极区域包含n型杂质和较高浓度的p型杂质的p沟道TFT相比,n沟道晶体管的沟道区域的吸杂效率较差。 因此,可以通过在其源极/漏极区域的末端设置包含n型杂质的高效吸气区域和浓度为p型的p型杂质来解决n沟道TFT的吸杂效率差的问题 的p型杂质的浓度高于n型杂质浓度。
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公开(公告)号:US6162667A
公开(公告)日:2000-12-19
申请号:US408869
申请日:1995-03-23
申请人: Takashi Funai , Naoki Makita , Yoshitaka Yamamoto , Tadayoshi Miyamoto , Takamasa Kousai , Masashi Maekawa
发明人: Takashi Funai , Naoki Makita , Yoshitaka Yamamoto , Tadayoshi Miyamoto , Takamasa Kousai , Masashi Maekawa
IPC分类号: H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L21/00
CPC分类号: H01L27/12 , H01L27/1277 , H01L29/66757
摘要: In a fabrication of a semiconductor device, an amorphous semiconductor film is first formed on a substrate having an insulating surface. Then, a minute amount of catalyst elements for accelerating crystallization of the amorphous semiconductor film is supplied to at least a portion of a surface of the amorphous semiconductor film. A heat treatment is further conducted so that the supplied catalyst elements are diffused into the amorphous semiconductor film. Thus, the catalyst elements are introduced uniformly into the amorphous semiconductor film in a very minute amount or at a low concentration, resulting in polycrystallization of at least a portion of the amorphous semiconductor film. Utilizing the thus obtained crystalline semiconductor film on the substrate surface as an active region, a semiconductor device such as a TFT is fabricated. The introduction of the catalyst elements are conducted by various methods such as: a formation of a film containing a minute amount of the catalyst elements; application of a solution containing the catalyst elements in several spin coating cycles; diffusion of the catalyst elements through a buffer layer; dipping into a solution in which the catalyst elements are dissolved or dispersed; or formation of a plating layer containing the catalyst elements.
摘要翻译: 在半导体器件的制造中,首先在具有绝缘表面的衬底上形成非晶半导体膜。 然后,将少量用于加速非晶半导体膜的结晶的催化剂元素供给到非晶半导体膜的表面的至少一部分。 进一步进行热处理,使得所提供的催化剂元素扩散到非晶半导体膜中。 因此,催化剂元素以非常微量或低浓度均匀地引入到非晶半导体膜中,导致至少一部分非晶半导体膜的多晶化。 利用由此获得的晶体半导体膜作为有源区,在衬底表面上制造诸如TFT的半导体器件。 催化剂元素的引入通过各种方法进行,例如:形成含有微量催化剂元素的膜; 在几个旋涂周期中应用含有催化剂元素的溶液; 催化剂元件通过缓冲层的扩散; 浸入催化剂元素溶解或分散的溶液中; 或形成含有催化剂元素的镀层。
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公开(公告)号:US5981974A
公开(公告)日:1999-11-09
申请号:US935283
申请日:1997-09-22
申请人: Naoki Makita
发明人: Naoki Makita
IPC分类号: H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/94
CPC分类号: H01L27/1296 , H01L21/2026 , H01L29/66757
摘要: A semiconductor device includes a plurality of thin film transistors on a substrate having an insulating surface. A channel region of the thin film transistor comprises a crystalline Si film crystallized by a successive irradiation with a pulse laser beam in a scanning pitch P. A size Xs of the channel region in the scanning direction of the pulse laser beam and the scanning pitch P of the pulse laser beam have a relationship approximately equal to Xs=nP where n is an integer of 1 or more.
摘要翻译: 半导体器件包括在具有绝缘表面的衬底上的多个薄膜晶体管。 薄膜晶体管的沟道区域包括通过以脉冲激光束以扫描间距P连续照射而结晶的晶体Si膜。脉冲激光束的扫描方向上的沟道区域的尺寸Xs和扫描间距P 脉冲激光束的关系近似等于Xs = nP,其中n是1或更大的整数。
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公开(公告)号:US5814835A
公开(公告)日:1998-09-29
申请号:US558501
申请日:1995-11-16
IPC分类号: H01L27/146 , H01L21/02 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/04
CPC分类号: H01L29/78654 , H01L21/2022 , H01L27/1214 , H01L29/66757
摘要: The semiconductor device of invention includes: a substrate having an insulating surface; and an element region formed by crystallizing an amorphous silicon film, the element region being provided on the insulating surface of the substrate. In the semiconductor device, the element region is constituted by a laterally crystallized region formed by crystallizing the amorphous silicon film from a linearly crystallized region crystallized by a selective introduction of catalyst elements for promoting a crystallization of the amorphous silicon film to a region surrounding the linearly crystallized region by performing a heat-treatment, and a concentration of the catalyst elements in at least one of the laterally crystallized region and the linearly crystallized region is controlled by a line width of an introduction setting region having a linear planar pattern, the line width being set so as to selectively introduce the catalyst elements.
摘要翻译: 本发明的半导体器件包括:具有绝缘表面的衬底; 以及通过使非晶硅膜结晶而形成的元件区域,所述元件区域设置在所述基板的绝缘表面上。 在半导体器件中,元件区域由通过选择性引入催化剂元素结晶的线性结晶区域使非晶硅膜结晶而形成的横向结晶区域,用于促进非晶硅膜的结晶化到线性区域 通过进行热处理的结晶化区域,并且横向结晶化区域和直线结晶化区域中的至少一个中的催化剂元素的浓度由具有线性平面图案的引入设定区域的线宽度,线宽度 被设定为选择性地引入催化剂元素。
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