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公开(公告)号：US11810940B2
公开(公告)日：2023-11-07
申请号：US17080797
申请日：2020-10-26
IPC分类号： H01L27/146 , H01L31/102
CPC分类号： H01L27/14643 , H01L27/14603 , H01L31/102
摘要： A pointed-trench pixel-array substrate includes a floating diffusion region and a photodiode region formed in a semiconductor substrate. The semiconductor substrate includes, between a top surface and a back surface thereof, a sidewall surface and a bottom surface defining a trench extending into the semiconductor substrate away from a planar region of the top surface surrounding the trench. In a cross-sectional plane perpendicular to the top surface and intersecting the floating diffusion region, the photodiode region, and the trench, (i) the bottom surface is V-shaped and (ii) the trench is located between the floating diffusion region and the photodiode region.
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公开(公告)号：US20230307478A1
公开(公告)日：2023-09-28
申请号：US17705133
申请日：2022-03-25
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14629
摘要： Image sensors, isolation structures, and techniques of fabrication are provided. An image sensor includes a source of electromagnetic radiation disposed on a substrate, a pixel array disposed on the substrate and thermally coupled with source of electromagnetic radiation, and an isolation structure disposed on the substrate between the source of electromagnetic radiation and the pixel array. The isolation structure can define a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure can be configured to attenuate residual electromagnetic radiation reaching a proximal region of the pixel array by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.
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公开(公告)号：US11670648B2
公开(公告)日：2023-06-06
申请号：US17118230
申请日：2020-12-10
发明人： Yuanliang Liu , Hui Zang
IPC分类号： H01L27/146 , H04N23/745
CPC分类号： H01L27/14605 , H01L27/1461 , H01L27/1463 , H01L27/14607 , H01L27/14623 , H01L27/14643 , H04N23/745
摘要： A flicker-mitigating pixel-array substrate includes a semiconductor substrate and a metal layer. The semiconductor substrate includes a small-photodiode region. A back surface of the semiconductor substrate forms a trench surrounding the small-photodiode region in a cross-sectional plane parallel to a first back-surface region of the back surface above the small-photodiode region. The metal layer covers the first back-surface region, at least partially fills the trench, and surrounds the small-photodiode region in the cross-sectional plane. A method for fabricating a flicker-mitigating pixel-array substrate includes forming, on a back surface of a semiconductor substrate, a trench that surrounds a small-photodiode region of the semiconductor substrate in a cross-sectional plane parallel to a first back-surface region of the back surface above the small-photodiode region. The method also includes forming a metal layer on the first back-surface region and in the trench.
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公开(公告)号：US11621336B2
公开(公告)日：2023-04-04
申请号：US17326095
申请日：2021-05-20
IPC分类号： H01L29/423 , H01L29/66 , H01L27/146 , H01L29/78
摘要： Transistors include a pyramid-shaped gate trench defined by a triangular shape or a trapezoidal shape in a channel width plane and a trapezoidal shape in a channel length plane. Side wall portions of the pyramid-shaped gate trench form a channel having a triangular shape or a trapezoidal shape in the channel width plane. Advantageously, such transistors increase transconductance without increasing pixel width. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.
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公开(公告)号：US11588033B2
公开(公告)日：2023-02-21
申请号：US17326112
申请日：2021-05-20
IPC分类号： H01L29/423 , H01L27/146 , H01L29/78 , H01L29/66
摘要： Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.
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公开(公告)号：US20220376069A1
公开(公告)日：2022-11-24
申请号：US17326112
申请日：2021-05-20
IPC分类号： H01L29/423 , H01L27/146 , H01L29/66 , H01L29/78
摘要： Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.
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公开(公告)号：US20220359581A1
公开(公告)日：2022-11-10
申请号：US17307789
申请日：2021-05-04
发明人： Yuanliang Liu , Hui Zang
IPC分类号： H01L27/146
摘要： Process to release Silicon stress in forming CMOS image sensor. In one embodiment, a method for manufacturing an image sensor includes providing a first wafer that is a semiconductor substrate, where the first wafer has a first side and a second side opposite from the first side. The method also includes attaching a second wafer to the second side of the first wafer. The method further includes forming isolation structures in the second wafer by etching. The isolation structures are bounded by the second side of the first wafer. The method also includes growing an epitaxial layer between individual isolation structures.
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公开(公告)号：US11476290B2
公开(公告)日：2022-10-18
申请号：US16918929
申请日：2020-07-01
发明人： Hui Zang , Gang Chen , Kenny Geng
IPC分类号： H01L27/146 , H04N5/378
摘要： An image sensor includes photodiodes disposed in a pixel region and proximate to a front side of a semiconductor layer. A backside metal grating is formed in a backside oxide layer disposed proximate to a backside of the semiconductor layer. A deep trench isolation (DTI) structure with a plurality of pixel region portions and an edge region portion is formed in the semiconductor layer. The pixel region portions are disposed in the pixel region of the semiconductor layer such that incident light is directed through the backside metal grating, through the backside of the semiconductor layer, and between the pixel region portions of the DTI structure to the photodiodes. The edge region portion of the DTI structure is disposed in an edge region outside of the pixel region. The edge region portion of the DTI structure is biased with a DTI bias voltage.
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公开(公告)号：US11462579B2
公开(公告)日：2022-10-04
申请号：US16804671
申请日：2020-02-28
IPC分类号： H01L27/146 , H01L29/423
摘要： A method for forming a transfer gate includes (i) forming a dielectric pillar on a surface of a semiconductor substrate and (ii) growing an epitaxial layer on the semiconductor substrate and surrounding the dielectric pillar. The dielectric pillar has a pillar height that exceeds an epitaxial-layer height of the epitaxial layer relative to the surface. The method also includes removing the dielectric pillar to yield a trench in the epitaxial layer. A pixel includes a doped semiconductor substrate having a front surface opposite a back surface. The front surface forms a trench extending a depth zT with respect to the front surface within the doped semiconductor substrate along a direction z perpendicular to the front surface and the back surface. The pixel has a dopant concentration profile, a derivative thereof with respect to direction z being discontinuous at depth zT.
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