公开(公告)号：US20110145555A1

公开(公告)日：2011-06-16

申请号：US12637808

申请日：2009-12-15

申请人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Todd J. Rosedahl ,  Malculm S. Ware

发明人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Todd J. Rosedahl ,  Malculm S. Ware

IPC分类号： G06F1/26 ,  G06F12/00 ,  G06F12/02 ,  G06F15/177

CPC分类号： G06F1/3203 ,  G06F1/324 ,  Y02D10/126

摘要： A mechanism is provided for controlling power management policies on a per logical partition basis. A power management mechanism in a data processing system receives a notification that the logical partition has been generated, a set of processing units associated with the logical partition, and a current power management policy to be implemented for the logical partition. The power management mechanism adds the logical partition and the set of processing units to a list of logical partitions. The power management mechanism initializes the set of processing units based on settings for the set of processing units in the current power management policy. The power management mechanism notifies a virtualization mechanism that the set of processing units are running at a specified performance level in order for the logical partition to start executing tasks on the set of processing units.

摘要翻译： 提供了一种用于在每个逻辑分区的基础上控制功率管理策略的机制。 数据处理系统中的电源管理机制接收到已经生成逻辑分区的通知，与逻辑分区相关联的一组处理单元以及要为逻辑分区实现的当前功率管理策略。 电源管理机制将逻辑分区和一组处理单元添加到逻辑分区列表中。 电源管理机制根据当前电源管理策略中的一组处理单元的设置初始化一组处理单元。 电源管理机制通知虚拟化机构，该组处理单元以指定的性能级别运行，以使逻辑分区开始在该组处理单元上执行任务。

公开(公告)号：US20100115343A1

公开(公告)日：2010-05-06

申请号：US12263597

申请日：2008-11-03

申请人： Michael S. Floyd ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Malcolm S. Ware

发明人： Michael S. Floyd ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Malcolm S. Ware

IPC分类号： G06F11/30

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  G06F11/3466 ,  G06F2201/81 ,  G06F2201/88 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D10/34

摘要： Semiconductor device circuits and methods are provided for adjusting core processor performance and energy-efficiency based on usage metrics. Metric detection, performance state selection, and adjustment are done in digital logic hardware without intervening input from system software or firmware, thus greatly speeding the processor performance adjustment. Mapping usage and state information to desired processor power-performance states is also provided in circuitry rather than firmware or power control software. The mapping values may be programmable software or firmware, but detection, selection, and adjustment occur automatically in hardware without intervening input from firmware or software.

摘要翻译： 提供了半导体器件电路和方法，用于根据使用度量来调整核心处理器的性能和能量效率。 在数字逻辑硬件中进行公制检测，性能状态选择和调整，无需系统软件或固件的中间输入，从而大大加快了处理器的性能调整。 电路而不是固件或电源控制软件也提供了将使用和状态信息映射到所需的处理器电源性能状态。 映射值可以是可编程软件或固件，但是检测，选择和调整会在硬件中自动进行，而无需固件或软件的输入。

公开(公告)号：US20080307238A1

公开(公告)日：2008-12-11

申请号：US11758798

申请日：2007-06-06

申请人： Andreas Bieswanger ,  Michael S. Floyd ,  Soraya Ghiasi ,  Steven P. Hartman ,  Thomas W. Keller, JR. ,  Hye-Young McCreary ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Juan C. Rubio ,  Malcolm S. Ware

发明人： Andreas Bieswanger ,  Michael S. Floyd ,  Soraya Ghiasi ,  Steven P. Hartman ,  Thomas W. Keller, JR. ,  Hye-Young McCreary ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Juan C. Rubio ,  Malcolm S. Ware

IPC分类号： G06F1/00

CPC分类号： G06F1/206 ,  G06F1/3203

摘要： A system is provided for unified management of power, performance, and thermals in computer systems. This system incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The system employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The system provides interfaces for user-level interaction. The system also employs methods to address power/thermal concerns at multiple timescales. In addition, the system improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.

摘要翻译： 提供了一种用于统一管理计算机系统中的电力，性能和热量的系统。 该系统包含有效地解决管理计算系统的所有方面的元素，而不是独立的。 该系统采用基础设施进行实时测量反馈，用于调节系统活动的基础设施，组件操作级别和环境控制，用于保证响应/抢先动作的专用控制结构以及交互和集成组件。 该系统提供用户级交互的接口。 该系统还采用了多个时间尺度来解决功率/热问题的方法。 此外，该系统通过采用综合方法提高效率，而不是以零散的方式处理电力/热问题的不同方面，而不是将个别问题解决。

公开(公告)号：US20060288241A1

公开(公告)日：2006-12-21

申请号：US11154160

申请日：2005-06-16

申请人： Wesley Felter ,  Thomas Keller ,  Karthick Rajamani ,  Cosmin Rusu

发明人： Wesley Felter ,  Thomas Keller ,  Karthick Rajamani ,  Cosmin Rusu

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： A method for managing power in a data processing system having multiple components includes determining a power budget for the system. Activity levels during a forthcoming time interval are then predicted for each of the components. Using the predicted activity levels, the power budget is allocated among the system components. An activity limit is then established for each component based on its corresponding portion of the power budget. The activity of a component is then monitored and, if the component's activity exceeds the component's corresponding activity limit, constrained. Determining the predicted level of activity may include determining a predicted number of instructions dispatched by a processor component or a predicted number of memory requests serviced for a system memory component. Allocating the power budget includes allocating each component its corresponding standby power and a share of the system power available for dynamic powering based on the expected levels of activity.

摘要翻译： 一种用于在具有多个组件的数据处理系统中管理电力的方法包括确定系统的功率预算。 然后对于每个组件预测在即将到来的时间间隔期间的活动水平。 使用预测的活动级别，在系统组件之间分配功率预算。 然后根据功率预算的相应部分为每个组件建立活动限制。 然后监视组件的活动，如果组件的活动超过组件的相应活动限制，则会受到限制。 确定预测的活动水平可以包括确定由处理器组件分派的指令的预测数量或为系统存储器组件服务的预测数量的存储器请求。 分配功率预算包括基于预期的活动水平来分配每个组件其相应的待机功率和可用于动态供电的系统功率的份额。

公开(公告)号：US09021473B2

公开(公告)日：2015-04-28

申请号：US13046966

申请日：2011-03-14

申请人： Charles Robert Lefurgy ,  Karthick Rajamani

发明人： Charles Robert Lefurgy ,  Karthick Rajamani

IPC分类号： G06F9/455 ,  G06F11/34

CPC分类号： G06F11/3409 ,  G06F11/3428 ,  G06F2201/815

摘要： A, system, and computer program product for hardware characterization in a virtual environment are provided in the illustrative embodiments. The hardware resource is allocated to a test virtual machine (VM). A characterization workload is configured to execute in the test VM to characterize a parameter of the hardware resource. The characterization workload is caused to execute on the test VM. A first result of the characterization workload execution is received from the test VM, wherein the result assigns a value to a characteristic of the hardware resource indicative of a behavior of the hardware resource under a set of circumstances.

摘要翻译： 在说明性实施例中提供了用于虚拟环境中的硬件表征的A，系统和计算机程序产品。 硬件资源分配给测试虚拟机（VM）。 表征工作负载被配置为在测试VM中执行以表征硬件资源的参数。 使特征工作负载在测试VM上执行。 从测试VM接收表征工作负载执行的第一个结果，其中结果将一个值分配给指示在一组情况下的硬件资源的行为的硬件资源的特性。

公开(公告)号：US08799625B2

公开(公告)日：2014-08-05

申请号：US13413787

申请日：2012-03-07

申请人： John Bruce Carter ,  Elmootazbellah Nabil Elnozahy ,  Ahmed Gheith ,  Eric Van Hansbergen ,  Karthick Rajamani ,  William Evan Speight ,  Lixin Zhang

发明人： John Bruce Carter ,  Elmootazbellah Nabil Elnozahy ,  Ahmed Gheith ,  Eric Van Hansbergen ,  Karthick Rajamani ,  William Evan Speight ,  Lixin Zhang

IPC分类号： G06F9/30

CPC分类号： G06F9/544

摘要： A method for fast remote communication and computation between processors is provided in the illustrative embodiments. A direct core to core communication unit (DCC) is configured to operate with a first processor, the first processor being a remote processor. A memory associated with the DCC receives a set of bytes, the set of bytes being sent from a second processor. An operation specified in the set of bytes is executed at the remote processor such that the operation is invoked without causing a software thread to execute.

摘要翻译： 在说明性实施例中提供了用于处理器之间的快速远程通信和计算的方法。 核心通信单元（DCC）的直接核心被配置为与第一处理器一起操作，第一处理器是远程处理器。 与DCC相关联的存储器接收一组字节，该字节集合是从第二处理器发送的。 在远程处理器中执行在该组字节中指定的操作，使得调用操作而不使软件线程执行。

公开(公告)号：US08738875B2

公开(公告)日：2014-05-27

申请号：US13295196

申请日：2011-11-14

申请人： John Bruce Carter ,  Wei Huang ,  Karthick Rajamani ,  Kshitij Sudan ,  Joanne R. Rawson

发明人： John Bruce Carter ,  Wei Huang ,  Karthick Rajamani ,  Freeman Leigh Rawson, III ,  Kshitij Sudan

IPC分类号： G06F12/06

CPC分类号： G06F12/08 ,  G06F1/3275 ,  G06F9/5094 ,  G06F2212/1028 ,  G11C5/04 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： A system, and computer program product for increasing a capacity of a memory are provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.

摘要翻译： 在说明性实施例中提供了用于增加存储器容量的系统和计算机程序产品。 使用使用处理器执行的应用程序，其中所述存储器包括一组等级，所述存储器被配置为形成冷层和热层，所述冷层包括来自所述存储器中的所述一组等级的第一子群， 热层包括来自内存中的一组排名的第二个子集。 确定存储器访问请求所指向的页面是否位于存储器中的冷层中。 响应于页面位于存储器的冷层中，通过以延迟处理存储器访问请求来限制存储器访问请求的处理。

公开(公告)号：US08595721B2

公开(公告)日：2013-11-26

申请号：US12644749

申请日：2009-12-22

申请人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Malcolm S. Ware

发明人： Naresh Nayar ,  Karthick Rajamani ,  Freeman L. Rawson, III ,  Malcolm S. Ware

IPC分类号： G06F9/455 ,  G06F9/46

CPC分类号： G06F9/45533 ,  G06F1/324 ,  G06F9/5077 ,  G06F9/5094 ,  G06F2209/5011 ,  Y02D10/126 ,  Y02D10/22 ,  Y02D10/26 ,  Y02D10/28 ,  Y02D10/36

摘要： A mechanism is provided for temporarily allocating dedicated processors to a shared processor pool. A virtual machine monitor determines whether a temporary allocation associated with an identified dedicated processor is long-term or short-term. Responsive to the temporary allocation being long-term, the virtual machine monitor determines whether an operating frequency of the identified dedicated processor is within a predetermined threshold of an operating frequency of one or more operating systems utilizing the shared processor pool. Responsive to the operating frequency of the identified dedicated processor failing to be within the predetermined threshold, the virtual machine monitor either increases or decreases the frequency of the identified dedicated processor to be within the predetermined threshold of the operating frequency of the one or more operating systems utilizing the shared processor pool and temporarily allocates the identified dedicated processor to the shared processor pool.

摘要翻译： 提供了一种用于将专用处理器临时分配给共享处理器池的机制。 虚拟机监视器确定与所识别的专用处理器相关联的临时分配是长期的还是短期的。 响应于长期的临时分配，虚拟机监视器确定所识别的专用处理器的工作频率是否在利用共享处理器池的一个或多个操作系统的操作频率的预定阈值内。 响应于所识别的专用处理器的操作频率不能在预定阈值内，虚拟机监视器将所识别的专用处理器的频率增加或降低到一个或多个操作系统的操作频率的预定阈值内 利用共享处理器池并临时将识别的专用处理器分配给共享处理器池。

公开(公告)号：US20130151867A1

公开(公告)日：2013-06-13

申请号：US13314379

申请日：2011-12-08

申请人： John S. Dodson ,  Karthick Rajamani ,  Eric E. Retter ,  Kenneth L. Wright

发明人： John S. Dodson ,  Karthick Rajamani ,  Eric E. Retter ,  Kenneth L. Wright

IPC分类号： G06F1/26 ,  G06F12/00

CPC分类号： G06F3/0644 ,  G06F1/32 ,  G06F1/3206 ,  G06F1/3275 ,  G06F13/16 ,  G11C5/147 ,  G11C11/4074 ,  Y02D10/14

摘要： A technique for memory command throttling in a partitioned memory subsystem includes accepting, by a master memory controller included in multiple memory controllers, a synchronization command. The synchronization command includes command data that includes an associated synchronization indication (e.g., a synchronization bit or bits) for each of the multiple memory controllers and each of the multiple memory controllers controls a respective partition of the partitioned memory subsystem. In response to receiving the synchronization command, the master memory controller forwards the synchronization command to the multiple memory controllers. In response to receiving the forwarded synchronization command each of the multiple memory controllers de-asserts an associated status bit. In response to receiving the forwarded synchronization command, each of the multiple memory controllers determines whether the associated synchronization indication is asserted. Each of the multiple memory controllers with the asserted associated synchronization indication then transmits the forwarded synchronization command to associated power control logic.

摘要翻译： 在分区存储器子系统中用于存储器命令调节的技术包括由包含在多个存储器控制器中的主存储器控制器接受同步命令。 同步命令包括命令数据，其包括用于多个存储器控制器中的每一个的相关联的同步指示（例如，同步位或位），并且多个存储器控制器中的每一个控制分区存储器子系统的相应分区。 响应于接收到同步命令，主存储器控制器将同步命令转发到多个存储器控制器。 响应于接收到转发的同步命令，多个存储器控制器中的每个存储器控制器断言相关联的状态位。 响应于接收到转发的同步命令，多个存储器控制器中的每一个确定相关联的同步指示是否被断言。 具有断言的相关同步指示的多个存储器控制器中的每一个然后将转发的同步命令发送到相关联的功率控制逻辑。

公开(公告)号：US20130124814A1

公开(公告)日：2013-05-16

申请号：US13295196

申请日：2011-11-14

申请人： John Bruce Carter ,  Wei Huang ,  Karthick Rajamani ,  Kshitij Sudan ,  Joanne R Rawson

发明人： John Bruce Carter ,  Wei Huang ,  Karthick Rajamani ,  Freeman Leigh Rawson, III ,  Kshitij Sudan

IPC分类号： G06F12/00

CPC分类号： G06F12/08 ,  G06F1/3275 ,  G06F9/5094 ,  G06F2212/1028 ,  G11C5/04 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

摘要： A system, and computer program product for increasing a capacity of a memory are provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.

摘要翻译： 在说明性实施例中提供了用于增加存储器容量的系统和计算机程序产品。 使用使用处理器执行的应用程序，其中所述存储器包括一组等级，所述存储器被配置为形成冷层和热层，所述冷层包括来自所述存储器中的所述等级的队列的第一子集， 热层包括来自内存中的一组排名的第二个子集。 确定存储器访问请求所指向的页面是否位于存储器中的冷层中。 响应于页面位于存储器的冷层中，通过以延迟处理存储器访问请求来限制存储器访问请求的处理。