公开(公告)号：US10388724B2

公开(公告)日：2019-08-20

申请号：US16161785

申请日：2018-10-16

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Clement Champeix ,  Nicolas Borrel ,  Alexandre Sarafianos

IPC: G06F21/78 ,  H01L29/06 ,  G06F21/88 ,  G06F21/77 ,  H01L27/06 ,  H01L29/10 ,  H03K5/24 ,  G06F21/75 ,  G06F21/87 ,  H01L23/00 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

Abstract: An electronic chip includes a doped semiconductor substrate of a first conductivity type, a doped buried layer of a second conductivity type overlying the substrate, and a first doped well of the first conductivity type overlying the buried layer. Circuit components can be formed at a top surface of the first doped well and separated from the buried layer. A current detector is coupled to the buried layer and configured detect a bias current flowing into or out of the buried layer.

公开(公告)号：US10361164B2

公开(公告)日：2019-07-23

申请号：US15446472

申请日：2017-03-01

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Thomas Ordas ,  Alexandre Sarafianos ,  Fabrice Marinet ,  Stephane Chesnais

IPC: H01L23/00 ,  H01L23/62 ,  H01L27/02 ,  H01L23/522 ,  G06F21/75 ,  G06F21/87 ,  G06K19/073 ,  H01L23/528

Abstract: An integrated circuit includes a number of components disposed at a surface of a semiconductor body and an interconnect region connecting the components into a functional circuit. A metallic shield is also produced in the interconnect region. A configurable stage is configurable to operate in a receiving antenna configuration or in a detection configuration during which the integrated circuit is configured to detect a presence of an external electromagnetic radiation representative of an attack by injection of faults.

公开(公告)号：US20190051643A1

公开(公告)日：2019-02-14

申请号：US16100796

申请日：2018-08-10

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Daniele Fronte ,  Pierre-Yvan Liardet ,  Alexandre Sarafianos

IPC: H01L27/02 ,  H01L23/00 ,  G01R31/28

Abstract: A circuit for protecting an integrated circuit against fault injection attacks includes an element including a dielectric which is destroyed, resulting in the occurrence of a short-circuit. The element is connected between two terminals that receive a power supply voltage of the integrated circuit.

公开(公告)号：US10148421B2

公开(公告)日：2018-12-04

申请号：US15221749

申请日：2016-07-28

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Thomas Ordas ,  Alexandre Sarafianos ,  Stephane Chesnais ,  Fabrice Marinet

IPC: G06F21/00 ,  H04L9/00 ,  G06K19/073 ,  G09C1/00 ,  H04K3/00 ,  G06F1/04 ,  G06F21/72 ,  H01L23/528 ,  H03K3/84 ,  H03K5/01 ,  H03K5/00

Abstract: A device is provided for jamming electromagnetic radiation liable to be emitted by at least one portion of an interconnect region located above at least one zone of an integrated electronic circuit produced in and on a semiconductor substrate. The device includes an antenna located above the at least one zone of the circuit and generating circuit coupled to the antenna and configured to generate an electrical signal having at least one pseudo-random property to pass through the antenna.

公开(公告)号：US20180253633A1

公开(公告)日：2018-09-06

申请号：US15801517

申请日：2017-11-02

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Thomas Ordas

IPC: G06K19/073 ,  H03K3/42 ,  G05B19/042 ,  H01L21/56

Abstract: In some embodiments, an electronic chip includes a doped semiconductor substrate of a first conductivity type, and wells of the second conductivity type on the side of the front face of the chip, in and on which wells circuit elements are formed. One or more slabs of a second conductivity type are buried under the wells and are separated from the wells. The electronic chip also includes, for each buried slab, a biasable section of the second conductivity type, which extends from the front face of the substrate to the buried slab. A first MOS transistor with a channel of the first conductivity type is disposed in the upper portion of each section, where the first transistor is an element of a flip-flop. A circuit is used for detecting a change in the logic level of one of the flip-flops.

公开(公告)号：US20160133582A1

公开(公告)日：2016-05-12

申请号：US14686908

申请日：2015-04-15

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Fabrice Marinet ,  Julien Mercier ,  Jimmy Fort ,  Alexandre Sarafianos

IPC: H01L23/00 ,  H01L27/092 ,  H01L29/732 ,  H01L27/06

CPC classification number: H01L23/576 ,  G09C1/00 ,  H01L23/57 ,  H01L27/0635 ,  H01L27/0658 ,  H01L27/092 ,  H01L29/7322 ,  H01L2924/0002 ,  H04L9/004 ,  H04L2209/12 ,  H01L2924/00

Abstract: A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.

公开(公告)号：US09070697B2

公开(公告)日：2015-06-30

申请号：US14531025

申请日：2014-11-03

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Fabrice Marinet ,  Jimmy Fort ,  Alexandre Sarafianos ,  Julien Mercier

IPC: H01L29/00 ,  H01L23/00 ,  H01L29/732 ,  H01L27/092 ,  H01L27/06

CPC classification number: H01L23/576 ,  G09C1/00 ,  H01L23/57 ,  H01L27/0635 ,  H01L27/0658 ,  H01L27/092 ,  H01L29/7322 ,  H01L2924/0002 ,  H04L9/004 ,  H04L2209/12 ,  H01L2924/00

Abstract: A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.

Abstract translation: 用于检测在集成电路芯片上形成的激光攻击的装置包括形成在半导体衬底中的第一类型的双极晶体管，该双极晶体管包括第二类型的寄生双极晶体管。 形成寄生双极晶体管的基极的掩埋区域作为由激光照射在衬底上引起的电流变化的检测器。

公开(公告)号：US09012911B2

公开(公告)日：2015-04-21

申请号：US14085565

申请日：2013-11-20

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Sylvie Wuidart ,  Mathieu Lisart ,  Alexandre Sarafianos

IPC: H01L23/58 ,  H01L21/66 ,  H01L23/00

CPC classification number: H01L23/576 ,  G06F21/75 ,  H01L22/14 ,  H01L22/30 ,  H01L22/34 ,  H01L2924/0002 ,  Y10T307/76 ,  H01L2924/00

Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.

Abstract translation: 一种集成电路，包括：第一导电类型的半导体衬底; 所述第一导电类型的多个区域从所述基板的表面垂直延伸，每个所述区域沿着其外围沿着所述第二导电类型的区域横向界定; 以及用于检测第一导电类型的每个区域和用于将衬底偏压的区域之间的衬底电阻变化为参考电压的装置。

公开(公告)号：US08907452B2

公开(公告)日：2014-12-09

申请号：US13751549

申请日：2013-01-28

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Fabrice Marinet ,  Jimmy Fort ,  Alexandre Sarafianos ,  Julien Mercier

IPC: H01L27/082

CPC classification number: H01L23/576 ,  G09C1/00 ,  H01L23/57 ,  H01L27/0635 ,  H01L27/0658 ,  H01L27/092 ,  H01L29/7322 ,  H01L2924/0002 ,  H04L9/004 ,  H04L2209/12 ,  H01L2924/00

Abstract: A device for detecting a laser attack in an integrated circuit chip formed in the upper P-type portion of a semiconductor substrate incorporating an NPN bipolar transistor having an N-type buried layer, including a detector of the variations of the current flowing between the base of said NPN bipolar transistor and the substrate.

Abstract translation: 一种用于检测形成在具有N型掩埋层的NPN双极晶体管的半导体衬底的上部P型部分中形成的集成电路芯片中的激光攻击的装置，包括：检测器， 的NPN双极晶体管和衬底。

公开(公告)号：US08809858B2

公开(公告)日：2014-08-19

申请号：US13750790

申请日：2013-01-25

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Mathieu Lisart ,  Thierry Soudé ,  Alexandre Sarafianos ,  Francesco La Rosa

IPC: H01L29/40

CPC classification number: H01L23/57 ,  G06F21/87 ,  H01L21/22 ,  H01L23/576 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit including: a semiconductor substrate of a first conductivity type having at least one well of a second conductivity type laterally delimited, on two opposite walls, by regions of the first conductivity type, defined at its surface; at least one region of the second conductivity type which extends in the semiconductor substrate under the well; and a system for detecting a variation of the substrate resistance between each association of two adjacent regions of the first conductivity type.

Abstract translation: 一种集成电路，包括：第一导电类型的半导体衬底，其具有在其两个相对的壁上由其表面限定的第一导电类型的区域侧向界定的第二导电类型的至少一个阱; 所述第二导电类型的至少一个区域在所述阱下面的所述半导体衬底中延伸; 以及用于检测第一导电类型的两个相邻区域的每个缔合之间的衬底电阻的变化的系统。