公开(公告)号：US4660099A

公开(公告)日：1987-04-21

申请号：US609193

申请日：1984-05-11

申请人： Hiroyuki Sugiyama ,  Nobuaki Takahashi ,  Takeshi Shibamoto ,  Kazunori Nishikawa ,  Shoji Ueno ,  Makoto Komura ,  Shunichi Shichijo

发明人： Hiroyuki Sugiyama ,  Nobuaki Takahashi ,  Takeshi Shibamoto ,  Kazunori Nishikawa ,  Shoji Ueno ,  Makoto Komura ,  Shunichi Shichijo

IPC分类号： G11B20/02 ,  G11B20/10 ,  H04N5/76

CPC分类号： G11B20/10 ,  G11B20/02

摘要： A rotary recording medium has information signals recorded on a spiral or concentric tracks formed thereon as variations in geometrical configuration. The tracks comprise a mixture of digital recorded tracks which are recorded with a first modulated signal and analog recorded tracks which are recorded with a second modulated signal. The first modulated signal is a digital signal which has been time-sequentially multiplexed in terms of blocks at a transmission frequency of 44.1 kHz or a frequency extremely close to 44.1 kHz and has then been subjected to a modulation, where each of the blocks are constituted by a synchronizing signal, error correcting codes, and an error detecting code, which are added to a plurality of channels of digital data which are digitally modulated information signals. The second modulated signal is an analog modulated analog information signal at least including a composite video signal. A number of blocks recorded in one track turn of the digital recorded tracks is approximately equal to a product of the transmission frequency and a duration of one revolution of the rotary recording medium.

摘要翻译： 旋转记录介质具有记录在其上形成的螺旋或同心轨迹上的信息信号，其中几何构型的变化。 轨道包括用第一调制信号记录的数字记录磁道和用第二调制信号记录的模拟记录磁道的混合。 第一调制信号是以44.1kHz的发送频率或非常接近44.1kHz的频率按照块进行时间顺序复用的数字信号，然后进行调制，其中每个块被构成 通过同步信号，纠错码和检错码，它们被加到数字数据的多个通道中，这些通道是数字调制的信息信号。 第二调制信号是至少包括复合视频信号的模拟调制模拟信息信号。 记录在数字记录轨道的一个轨迹中的多个块大致等于传输频率与旋转记录介质的一圈的持续时间的乘积。

公开(公告)号：US4613908A

公开(公告)日：1986-09-23

申请号：US523770

申请日：1983-08-16

申请人： Nobuaki Takahashi ,  Seiichi Takashima ,  Takeshi Shibamoto ,  Koji Tanaka ,  Fujio Suzuki ,  Mitsuo Kubo ,  Mitsuru Kikuchi ,  Hiroyuki Sugiyama ,  Yoshiaki Amano

发明人： Nobuaki Takahashi ,  Seiichi Takashima ,  Takeshi Shibamoto ,  Koji Tanaka ,  Fujio Suzuki ,  Mitsuo Kubo ,  Mitsuru Kikuchi ,  Hiroyuki Sugiyama ,  Yoshiaki Amano

IPC分类号： H04N9/79 ,  H04N9/804 ,  H04N5/76

CPC分类号： H04N9/804 ,  H04N9/7925 ,  G11B2220/20

摘要： A digital video signal reproducing apparatus comprises a reproducing circuit for reproducing a digital video signal from a recording medium, where the recording medium is time-sequentially recorded with the digital video signal having a signal format in which a header signal is added to each of divided picture element data groups which are obtained by dividing a picture element data group in terms of a predetermined unit, the picture element data group is obtained by subjecting an analog video signal to a digital pulse modulation at a sampling frequency such that a product of a number of picture element data in one scanning line and an effective number of scanning lines in one picture of a standard television system is exceedingly close to 2.sup.18 but less than 2.sup.18, and the header signal at least comprises a synchronizing signal and a picture mode identification code, a header signal reproducing circuit for discriminating the header signal within the digital video signal reproduced by the reproducing circuit and reproducing the header signal, two memory circuits into which the picture element data group within said reproduced digital video signal is written and from which a stored picture element data group is read out, a circuit for controlling write-in and read-out with respect to the two memory circuits according to a code in the reproduced header signal, and a circuit for producing an analog video signal in accordance with a standard television system from the picture element data read out from the two memory circuits.

摘要翻译： 数字视频信号再现装置包括一个再现电路，用于从记录介质再现数字视频信号，其中记录介质被时间顺序地记录有数字视频信号，该数字视频信号具有一个信号格式，其中标题信号被添加到每个划分的信号 通过以预定单位划分图像元素数据组而获得的图像元素数据组，通过使模拟视频信号以采样频率进行数字脉冲调制获得，使得数字 一个扫描线中的图像元素数据和标准电视系统的一个图像中的有效数量的扫描线非常接近218但小于218，并且标题信号至少包括同步信号和图像模式识别码， 一个标题信号再现电路，用于鉴别该数字视频信号内的标题信号 再现电路并再现标题信号，写入所述再现的数字视频信号内的图像元素数据组并读出存储的图像元素数据组的两个存储电路，用于控制写入和读出的电路 相对于根据再现的标题信号中的代码的两个存储器电路，以及根据从两个存储器电路读出的像素数据根据标准电视系统产生模拟视频信号的电路。

公开(公告)号：US4587558A

公开(公告)日：1986-05-06

申请号：US540553

申请日：1983-10-11

申请人： Hiroyuki Sugiyama ,  Nobuaki Takahashi ,  Takeshi Shibamoto ,  Hideo Sato ,  Yoshiaki Amano ,  Koji Tanaka

发明人： Hiroyuki Sugiyama ,  Nobuaki Takahashi ,  Takeshi Shibamoto ,  Hideo Sato ,  Yoshiaki Amano ,  Koji Tanaka

IPC分类号： G11B3/00 ,  G06F12/02 ,  G11B7/00 ,  G11B7/004 ,  G11B20/10 ,  G11B27/30 ,  G11C8/00 ,  H04N1/21 ,  H04N5/781 ,  H04N5/907 ,  H04N9/806 ,  H04N9/81 ,  H04N5/14

CPC分类号： G06F12/0207 ,  G11B27/3027 ,  H04N1/21 ,  H04N5/907 ,  H04N9/8066 ,  H04N9/81

摘要： An address signal generating circuit for a memory circuit comprises a first latch driver for producing a signal corresponding to upper m bits of a 2m-bit address signal which is to be generated, where m is an integer, a second latch driver for producing a signal corresponding to lower m bits of the 2m-bit address signal, a circuit for dividing a 2m-bit signal which has a predetermined value into upper m bits and lower m bits and for alternately producing signals corresponding to the upper and lower m bits, a first adder for adding the value of n bits in the signal which has the predetermined value and the value of upper n bits in an output signal of the first or second latch driver and for producing an n-bit signal, where n is an integer less than m, a second adder for adding the value of m-n bits in the signal which has the predetermined value and lower m-n bits of the output signal of the first or second latch driver and for producing an (m-n)-bit signal, an adding circuit for supplying a carry signal of the first or second adder to the second or the first adder so as to add the carry signal with another input signal of the second or the first adder, and a driver control circuit for controlling the first and second latch drivers to alternately and time-divisionally produce upper m bits of the 2m-bit address signal and lower m bits of the 2m-bit address signal by alternately latching an m-bit output signal of the first and second adders in the first and second latch drivers.

摘要翻译： 一种用于存储电路的地址信号产生电路包括：第一锁存驱动器，用于产生对应于要生成的2m位地址信号的高m位的信号，其中m是整数;第二锁存驱动器，用于产生信号 对应于2m位地址信号的较低m位，用于将具有预定值的2m位信号划分为上m位和低m位并用于交替产生对应于上m位和下m位的信号的电路， 第一加法器，用于将具有预定值的信号中的n位的值和第一或第二锁存驱动器的输出信号中的高n位的值相加，并产生n位信号，其中n是整数减去 m的第二加法器，用于将具有第一或第二锁存驱动器的输出信号的预定值和较低mn位的信号中的mn位的值相加并用于产生（mn）位信号;第二加法器， 供应 将第一或第二加法器的进位信号输入到第二加法器或第一加法器，以将进位信号与第二加法器或第一加法器的另一输入信号相加，以及驱动器控制电路，用于将第一和第二锁存驱动器控制为 通过交替地锁存第一和第二锁存驱动器中的第一和第二加法器的m位输出信号，交替地并且分时地产生2m位地址信号的高位m位和2m位地址信号的较低位。

公开(公告)号：US4499506A

公开(公告)日：1985-02-12

申请号：US352305

申请日：1982-02-25

申请人： Nobuaki Takahashi ,  Takeshi Shibamoto

发明人： Nobuaki Takahashi ,  Takeshi Shibamoto

IPC分类号： H04N1/21 ,  H04N9/804 ,  H04N9/888 ,  H04N5/76

CPC分类号： H04N9/888 ,  H04N1/32117 ,  H04N9/804 ,  H04N2201/3264

摘要： In a video signal recording and reproducing system, the recording system comprises a first converting circuit for sampling an analog composite video signal which is to be recorded with a first sampling frequency to convert the analog composite video signal into a digital signal, and a first memory circuit for storing an output digital signal of the first converting circuit to read out the output digital signal as a digital video signal sampled with a second sampling frequency, where the digital video signal corresponds only to a video signal in a video signal period excluding a synchronizing signal period of the analog composite video signal. The digital video signal thus read out is recorded and reproduced. The reproducing system comprises a second memory circuit for storing the reproduced digital video signal, and reading out the digital video signal as a digital video signal sampled with the first sampling frequency for every period corresponding to the video signal period, a third converting circuit for converting the digital video signal read out from the second memory circuit into an analog video signal, a synchronizing signal generating circuit for generating a synchronizing signal in synchronism with a signal having a frequency equal to the first sampling frequency, and a reproduced analog composite video signal obtaining circuit for mixing the analog video signal obtained through the conversion at the third converting circuit and the synchronizing signal generated by the synchronizing signal generating circuit, to obtain a reproduced analog composite video signal.

摘要翻译： 在视频信号记录和再现系统中，记录系统包括：第一转换电路，用于采样第一采样频率的模拟复合视频信号，以将模拟复合视频信号转换为数字信号;第一存储器 用于存储第一转换电路的输出数字信号的电路，用于读出输出数字信号作为以第二采样频率采样的数字视频信号，其中数字视频信号仅对应视频信号中的视频信号，不包括同步 模拟复合视频信号的信号周期。 由此读出的数字视频信号被记录和再现。 该再现系统包括一个第二存储器电路，用于存储再现的数字视频信号，并且在数字视频信号中读出数字视频信号，作为对应于视频信号周期的每个周期以第一采样频率采样的数字视频信号;第三转换电路，用于转换 所述数字视频信号从所述第二存储器电路读出为模拟视频信号;同步信号产生电路，用于与具有等于所述第一采样频率的频率的信号同步产生同步信号;以及再现的模拟复合视频信号获得 用于混合通过第三转换电路转换获得的模拟视频信号的电路和由同步信号发生电路产生的同步信号，以获得再现的模拟复合视频信号。

公开(公告)号：US4488182A

公开(公告)日：1984-12-11

申请号：US413824

申请日：1982-09-01

申请人： Nobuaki Takahashi ,  Seiichi Takashima ,  Takeshi Shibamoto ,  Fujio Suzuki ,  Kohji Tanaka

发明人： Nobuaki Takahashi ,  Seiichi Takashima ,  Takeshi Shibamoto ,  Fujio Suzuki ,  Kohji Tanaka

IPC分类号： H04N9/80 ,  H04N1/64 ,  H04N9/79 ,  H04N9/806 ,  H04N9/493

CPC分类号： H04N9/8066 ,  H04N1/646 ,  H04N9/7925

摘要： Analog primary color video signals of a still-picture converted to luminance and color difference components and converted to digital samples. The digital samples of each video component are written into a respective memory at the sampling rate and retrieved by a reading circuit at a rate lower than the sampling rate. Analog multi-channel audio signals are converted to digital samples which are time-division multiplexed with the retrieved digital samples of the video components. The multiplexed digital samples are recorded on a recording disc medium in a spiral track pattern.

摘要翻译： 将静止图像的模拟原色视频信号转换为亮度和色差分量并转换为数字样本。 每个视频分量的数字样本以采样率被写入相应的存储器中，并以读取电路以低于采样速率的速率读取。 模拟多声道音频信号被转换成与所检索的视频分量的数字样本进行时分复用的数字样本。 复用的数字样本以螺旋形轨迹图案记录在记录盘介质上。

公开(公告)号：US4471381A

公开(公告)日：1984-09-11

申请号：US357132

申请日：1982-03-11

申请人： Masao Kasuga ,  Nobuaki Takahashi ,  Takeshi Shibamoto

发明人： Masao Kasuga ,  Nobuaki Takahashi ,  Takeshi Shibamoto

IPC分类号： H04N7/01 ,  H04N5/02

CPC分类号： H04N7/0135 ,  H04N7/01

摘要： A system for converting number of scanning lines converts a first number of scanning lines of a first digital video signal into a second number of scanning lines of a second digital video signal. The system comprises a discrete signal obtaining circuit supplied with the first digital video signal, for successively re-arranging a plurality of picture element information arranged along lines in a vertical direction with respect to a picture frame indicated by the first digital video signal within a time interval corresponding to the first number of scanning lines in units of each of the lines in the vertical direction in a time series manner, to obtain a discrete signal having a sampling frequency equal to a horizontal scanning frequency of the first digital video signal, a sampling frequency converter for converting the sampling frequency of the discrete signal obtained from the discrete signal obtaining circuit into a frequency equal to a horizontal scanning frequency of the second digital video signal, and a second video signal obtaining circuit for successively re-arranging an output of the sampling frequency converter in units of a plurality of picture element information along a direction of horizontal scanning lines in accordance with the second digital video signal in a time series manner, to obtain the second digital video signal using the second number of scanning lines.

摘要翻译： 用于转换扫描线数量的系统将第一数字视频信号的第一数量的扫描线转换成第二数字视频信号的第二数量的扫描线。 该系统包括提供有第一数字视频信号的离散信号获取电路，用于在一段时间内相对于由第一数字视频信号指示的画面沿着垂直方向的线排列重新排列的多个像素信息 以与时间序列方式的垂直方向上的每行的单位相对应的第一扫描线数的间隔，以获得具有等于第一数字视频信号的水平扫描频率的采样频率的离散信号，采样 频率转换器，用于将从离散信号获取电路获得的离散信号的采样频率转换成等于第二数字视频信号的水平扫描频率的频率;以及第二视频信号获取电路，用于连续重新布置 采样频率转换器以多个像素信息a1为单位 以时间序列方式按照第二数字视频信号的水平扫描线的方向，使用第二数量的扫描线来获得第二数字视频信号。

公开(公告)号：US4360824A

公开(公告)日：1982-11-23

申请号：US123117

申请日：1980-02-21

申请人： Nobuaki Takahashi ,  Kazunori Nishikawa ,  Isao Masuda ,  Hideo Sato

发明人： Nobuaki Takahashi ,  Kazunori Nishikawa ,  Isao Masuda ,  Hideo Sato

IPC分类号： G11B7/00 ,  G11B7/004 ,  G11B7/0045 ,  G11B7/013 ,  G11B9/06 ,  G11B20/10 ,  G11B20/14 ,  G11B21/10 ,  G11B23/00 ,  G11B27/30 ,  H04N5/76

CPC分类号： G11B7/24085 ,  G11B20/10527 ,  G11B20/1407 ,  G11B20/1423 ,  G11B23/0007 ,  G11B27/30 ,  G11B7/0045 ,  G11B9/06

摘要： An information signal recording system comprises a circuit for generating pilot signals for tracking control, a circuit for generating a rectangular waveform signal of a specific frequency existing in an artificial synchronizing signal duration in every specific period and having almost no frequency component equal to and in the vicinity of the frequencies of the pilot signals, a circuit for pulse code modulating or difference modulating an information signal, further digital modulating the information signal, and obtaining a digital information signal existing in a time interval other than the artificial synchronizing signal duration. The digital information signal is recorded along a main track on a recording medium and the pilot signals are recorded along pilot signal tracks contiguous to the main track.

摘要翻译： 一种信息信号记录系统，包括用于产生用于跟踪控制的导频信号的电路，用于产生在每个特定周期中存在于人造同步信号持续时间中的特定频率的矩形波形信号的电路，并且几乎没有频率分量等于和 导频信号的频率附近，用于脉冲编码调制的电路或信息信号的差分调制，进一步对信息信号进行数字调制，以及获得以除了人造同步信号持续时间之外的时间间隔中存在的数字信息信号。 数字信息信号沿着记录介质上的主轨道记录，并且导频信号沿着与主轨道相邻的导频信号轨道记录。

公开(公告)号：US4211978A

公开(公告)日：1980-07-08

申请号：US899891

申请日：1978-04-25

申请人： Nobuaki Takahashi

发明人： Nobuaki Takahashi

IPC分类号： H04B1/12 ,  H04B14/00

CPC分类号： H04B14/006 ,  H04B1/126

摘要： A cross-talk component cancellation circuit is used in an angle-modulated wave signal transmission system for transmitting first and second angle-modulated wave signals of at least two channels, wherein a cross-talk component of the second angle-modulated wave signal is admixed in the first angle-modulated wave signal. The cross-talk component cancellation circuit comprises a phase inverter for phase inverting the second angle-modulated wave signal, a first circuit for mixing the second angle-modulated wave signal and the phase-inverted second angle-modulated wave signal in respective mixing quantities with the first angle-modulated wave signal, a circuit for varying the mixing quantity in which at least one angle-modulated wave signal out of the second angle-modulated wave signal and the phase-inverted second angle-modulated wave signal is mixed by the first mixing means, a second circuit for mixing the signal thus mixed by the first mixing means in respective specific mixing quantities with the second angle-modulated wave signal and the phase-inverted second angle-modulated wave signal thereby to produce third and fourth angle-modulated wave signals, a circuit for operating to produce as output from the third and fourth angle-modulated wave signals a control signal for variably controlling the mixing quantity of the mixing quantity varying means and to supply said control signal to said varying means, and a circuit for obtaining the first angle-modulated wave signal the cross-talk component of which has been cancelled by the first mixing means.

摘要翻译： 串扰分量消除电路用于角度调制波信号传输系统中，用于发送至少两个信道的第一和第二角度调制波信号，其中混合第二角度调制波信号的串扰分量 在第一角度调制波信号中。 串扰分量消除电路包括：相位反相器，用于相位反转第二角度调制波信号;第一电路，用于将第二角度调制波信号和相位反转的第二角度调制波信号以各自的混合量与 第一角度调制波信号，用于改变混合量的电路，其中第二角度调制波信号和相位反转的第二角度调制波信号中的至少一个角度调制波信号被第一 混合装置，第二电路，用于将由第一混合装置混合的信号以相应的特定混合量与第二角度调制波信号和相位反转的第二角度调制波信号混合，从而产生第三和第四角度调制 波信号，用于操作以产生作为第三和第四角度调制波的输出的电路发送用于可变地控制混频的控制信号 并且将所述控制信号提供给所述可变装置;以及电路，用于获得第一混合装置已经取消了其串扰分量的第一角度调制波信号。

公开(公告)号：US4107478A

公开(公告)日：1978-08-15

申请号：US698191

申请日：1976-06-21

申请人： Nobuaki Takahashi ,  Kazunori Nishikawa ,  Yoshiki Iwasaki ,  Masaaki Satoh ,  Katsuhiro Ohba ,  Shinji Nakamura ,  Tatsuo Sawada ,  Nobuhide Ohsaki ,  Yasuo Itoh ,  Nobuaki Suda ,  Yasuhisa Okabe ,  Hideaki Ozaki

发明人： Nobuaki Takahashi ,  Kazunori Nishikawa ,  Yoshiki Iwasaki ,  Masaaki Satoh ,  Katsuhiro Ohba ,  Shinji Nakamura ,  Tatsuo Sawada ,  Nobuhide Ohsaki ,  Yasuo Itoh ,  Nobuaki Suda ,  Yasuhisa Okabe ,  Hideaki Ozaki

IPC分类号： G11B20/00 ,  G11B23/00 ,  H03D3/24 ,  H04S3/00 ,  G11B3/04 ,  G11B3/74 ,  H03D3/00

CPC分类号： H03D3/244 ,  G11B20/00992 ,  G11B23/0007 ,  H04S3/006

摘要： An angle modulated wave demodulation system demodulates an input angle modulated wave by means of a phase locked loop system which comprises a phase comparator, which is operated responsive to an input angle modulated wave. A voltage controlled oscillator is supplied with a part of the output of the phase comparator which controls its oscillation frequency. The oscillator supplies its oscillation frequency to the phase comparator. The phase locked loop system has a lock frequency range which decreases its width when the level of the input angle modulated wave is below a predetermined level. The portion of this lock range in which the width of the lock range decreases is positively utilized. The voltage controlled oscillator oscillates at a frequency equal to the center frequency of the carrier of the input angle modulated wave, when the phase locked loop becomes unlocked.

摘要翻译： 角度调制波解调系统通过锁相环系统对输入角调制波进行解调，该锁相环系统包括响应于输入角调制波操作的相位比较器。 电压控制振荡器被提供有控制其振荡频率的相位比较器的输出的一部分。 振荡器将其振荡频率提供给相位比较器。 锁相环系统具有当输入角度调制波的电平低于预定电平时减小其宽度的锁定频率范围。 正确地利用锁定范围的宽度减小的锁定范围的部分。 当锁相环解锁时，压控振荡器的振荡频率等于输入角调制波的载波的中心频率。

公开(公告)号：US4096360A

公开(公告)日：1978-06-20

申请号：US725569

申请日：1976-09-22

申请人： Nobuaki Takahashi ,  Fujio Suzuki ,  Katsuhiro Ohba

发明人： Nobuaki Takahashi ,  Fujio Suzuki ,  Katsuhiro Ohba

IPC分类号： H04S3/00 ,  G11B3/74 ,  H03D3/00

CPC分类号： H04S3/006

摘要： A multichannel record disc reproducing system comprises at least two phase-locked loops. Each loop includes a phase comparator and a voltage-controlled oscillator for respectively demodulating an angle-modulated signal which is separated from a signal picked up from a multichannel record disc. The picked up signal includes a direct-wave signal and an angle-modulated signal which were multiplexed and recorded. An addition circuit adds the demodulated output signals of the phase-locked loops. The respective phase-locked loops have different lock ranges in order to exclude noise and other distortion.

摘要翻译： 多通道记录盘重放系统包括至少两个锁相环。 每个回路包括相位比较器和压控振荡器，用于分别解调与从多通道记录盘拾取的信号分离的角度调制信号。 拾取信号包括多路复用和记录的直波信号和角度调制信号。 加法电路将锁相环的解调输出信号相加。 相应的锁相环具有不同的锁定范围，以排除噪声和其他失真。