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1.发明授权Systems for recording both information and pilot signals directly on recording medium 失效用于在记录介质上直接记录信息和导频信号的系统
公开(公告)号：US4360824A
公开(公告)日：1982-11-23
申请号：US123117
申请日：1980-02-21
申请人： Nobuaki Takahashi , Kazunori Nishikawa , Isao Masuda , Hideo Sato
发明人： Nobuaki Takahashi , Kazunori Nishikawa , Isao Masuda , Hideo Sato
IPC分类号： G11B7/00 , G11B7/004 , G11B7/0045 , G11B7/013 , G11B9/06 , G11B20/10 , G11B20/14 , G11B21/10 , G11B23/00 , G11B27/30 , H04N5/76
CPC分类号： G11B7/24085 , G11B20/10527 , G11B20/1407 , G11B20/1423 , G11B23/0007 , G11B27/30 , G11B7/0045 , G11B9/06
摘要： An information signal recording system comprises a circuit for generating pilot signals for tracking control, a circuit for generating a rectangular waveform signal of a specific frequency existing in an artificial synchronizing signal duration in every specific period and having almost no frequency component equal to and in the vicinity of the frequencies of the pilot signals, a circuit for pulse code modulating or difference modulating an information signal, further digital modulating the information signal, and obtaining a digital information signal existing in a time interval other than the artificial synchronizing signal duration. The digital information signal is recorded along a main track on a recording medium and the pilot signals are recorded along pilot signal tracks contiguous to the main track.
摘要翻译： 一种信息信号记录系统，包括用于产生用于跟踪控制的导频信号的电路，用于产生在每个特定周期中存在于人造同步信号持续时间中的特定频率的矩形波形信号的电路，并且几乎没有频率分量等于和 导频信号的频率附近，用于脉冲编码调制的电路或信息信号的差分调制，进一步对信息信号进行数字调制，以及获得以除了人造同步信号持续时间之外的时间间隔中存在的数字信息信号。 数字信息信号沿着记录介质上的主轨道记录，并且导频信号沿着与主轨道相邻的导频信号轨道记录。
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公开(公告)号：US4516163A
公开(公告)日：1985-05-07
申请号：US508540
申请日：1983-06-28
CPC分类号： G11B20/1809 , G11B20/10 , G11B20/10527
摘要： A digital information recording system comprises a randomized digital signal forming circuit for forming a randomized digital signal by carrying out modulo-2 addition of at least digital information signals of a plurality of channels in a digital signal and a random code sequence which is generated independently, a detector for successively detecting values of each of a predetermined number of words from each of the digital information signals of a plurality of channels in the randomized digital signal, in terms of one word, and generating a detection signal only when values of bits in the one word are all "1" or all "0", a timing circuit for generating a timing signal for every period corresponding to a transmission period of a least significant bit in one word from each of the digital information signals of a plurality of channels, a polarity inverting circuit for passing the randomized digital signal unchanged during a period in which the detection signal is not generated from the detector, and inverting the polarity of the least significant bit in one word from each of the digital information signals of a plurality of channels in the randomized digital signal when simultaneously applied with the detection signal and the timing signal, and a recording circuit for recording a digital signal obtained from the polarity inverting circuit.
摘要翻译： 数字信息记录系统包括一个随机数字信号形成电路，用于通过对数字信号中的至少数个信道信号和独立产生的随机码序列至少进行模2加法来形成随机数字信号， 一个检测器，用于根据一个字连续地检测随机数字信号中的多个通道的每个数字信息信号中的每一个的预定数量的字的值，并且仅当在一个字中的位的值时产生检测信号 一个字全部为“1”或全部为“0”，定时电路用于在与多个通道的每个数字信息信号中的一个字中的最低有效位的发送周期相对应的每个周期产生定时信号， 极性反转电路，用于在不从d产生检测信号的期间内使随机数字信号不变 并且当同时施加检测信号和定时信号时，将随机数字信号中的多个通道的数字信息信号中的每一个的一个字中的最低有效位的极性反转，以及记录电路 从极性反转电路获得的数字信号。
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公开(公告)号：US4561083A
公开(公告)日：1985-12-24
申请号：US496589
申请日：1983-05-20
申请人： Kazunori Nishikawa , Yoshiki Iwasaki , Isao Masuda , Shoji Ueno , Makoto Komura , Nobuaki Takahashi
发明人： Kazunori Nishikawa , Yoshiki Iwasaki , Isao Masuda , Shoji Ueno , Makoto Komura , Nobuaki Takahashi
CPC分类号： H04N5/956
摘要： A memory circuit write-in system comprises a first circuit for supplying a digital signal including a time base fluctuation component, where one frame of the digital signal is constituted by at least a synchronizing signal and information data and the digital signal has a first repetition frequency with a period of one frame of the digital signal, a memory circuit for writing therein and reading out therefrom the digital signal supplied from the first circuit, and a second circuit for applying a write-in control signal to the memory circuit. The write-in control signal includes no time base fluctuation component and has a second repetition frequency substantially equal to the first repetition frequency, and the memory circuit is controlled by the write-in control signal so that write-in of the digital signal is carried out with a write-in period in a range of two times within the one frame period.
摘要翻译： 存储电路写入系统包括：第一电路，用于提供包括时基波动分量的数字信号，其中数字信号的一帧至少由同步信号和信息数据构成，数字信号具有第一重复频率 具有数字信号的一帧的周期，用于在其中写入并从其读出从第一电路提供的数字信号的存储器电路，以及用于将写入控制信号施加到存储器电路的第二电路。 写入控制信号不包括时基波动分量，并且具有基本上等于第一重复频率的第二重复频率，并且存储电路由写入控制信号控制，以便承载数字信号的写入 在一个帧周期内以两次的写入周期输出。
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公开(公告)号：US4667318A
公开(公告)日：1987-05-19
申请号：US543402
申请日：1983-10-19
CPC分类号： G11B20/10527 , G11B20/1809 , G11B27/105 , G11B27/3027 , G11B27/3036 , G11B27/34 , H04N1/2166 , G11B2220/20
摘要： A data producing device in a signal reproducing apparatus, comprises a shift register supplied with synchronizing signals and codes which are time-sequentially reproduced from a recording medium, synchronizing signal detectors supplied with the synchronizing signals from the shift register, data transfer circuits provided in parallel with respect to each other and in series with the synchronizing signal detectors, and a control circuit for controlling the data transfer circuits so that a data is selectively read out and produced from a desired data transfer circuit among the plurality of data transfer circuits. The reproduced synchronizing signals and codes are transferred to the shift register and are read out from the shift register in response to a clock pulse having a predetermined frequency. The number of the synchronizing signal detectors is equal to the number of kinds of the synchronizing signals, and the synchronizing signal detectors are provided in parallel with respect to each other. Each of the synchronizing signal detectors detect a specific synchronizing signal. A data in a predetermined code among the codes supplied to the data transfer circuits is transferred to the data transfer circuits, when a synchronizing signal for discriminating the predetermined code is detected in the synchronizing signal detectors and supplied to the data transfer circuits.
摘要翻译： 信号再现装置中的数据产生装置包括：移位寄存器，其提供有从记录介质被时间顺序再现的同步信号和代码，提供有来自移位寄存器的同步信号的同步信号检测器，并行提供的数据传送电路 并且与同步信号检测器串联的控制电路，以及用于控制数据传送电路的控制电路，使得从多个数据传送电路中的期望的数据传送电路选择性地读出和产生数据。 再现的同步信号和代码被传送到移位寄存器，并且响应于具有预定频率的时钟脉冲从移位寄存器读出。 同步信号检测器的数量等于同步信号的种类数，并且同步信号检测器相对于彼此并联设置。 每个同步信号检测器检测特定的同步信号。 当在同步信号检测器中检测到用于识别预定码的同步信号并提供给数据传送电路时，提供给数据传送电路的代码中的预定代码中的数据被传送到数据传送电路。
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5.发明授权Synchronizing signal detecting circuit in a digital signal transmitting system 失效在数字信号发送系统中同步信号检测电路
公开(公告)号：US4596981A
公开(公告)日：1986-06-24
申请号：US615237
申请日：1984-05-29
申请人： Shoji Ueno , Kazunori Nishikawa , Yoshiki Iwasaki , Isao Masuda , Makoto Komura
发明人： Shoji Ueno , Kazunori Nishikawa , Yoshiki Iwasaki , Isao Masuda , Makoto Komura
摘要： A synchronizing signal detecting circuit is used in a digital signal transmitting system which transmits a digital signal in which signals are time-sequentially multiplexed in terms of blocks, where each of the blocks are made up of digital data which are information signals subjected to a digital modulation, a synchronizing signal having a fixed pattern, and an error checking code arranged at a location separated from a location of the synchronizing signal by a predetermined number of bits. The synchronizing signal detecting circuit comprises a counter which is reset when a synchronizing signal detection output which has been discriminated as being correct by use of the error checking code is continuously obtained for N times, where N is a natural number greater than or equal to two.
摘要翻译： 在数字信号发送系统中使用同步信号检测电路，该数字信号发送系统发送数字信号，其中信号以块为单位进行时间顺序复用，其中每个块由作为经受数字信号的信息信号的数字数据组成 调制，具有固定模式的同步信号和布置在与同步信号的位置分离预定位数的位置处的错误校验码。 同步信号检测电路包括一个计数器，当通过使用错误校验码被鉴别为正确的同步信号检测输出连续获得N次时，复位，其中N是大于或等于2的自然数 。
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6.发明授权Circuit arrangement for a disk player for reproducing information prerecorded in the form of pits 失效用于再现以凹坑形式预先记录的信息的盘播放器的电路装置
公开(公告)号：US4509155A
公开(公告)日：1985-04-02
申请号：US383258
申请日：1982-05-28
CPC分类号： G11B20/10009
摘要： In a circuit arrangement for a disk player of the type arranged to reproduce information prerecorded in the form of pits, a variable gain circuit for changing the frequency characteristic of the reproduced signal is provided. The level of the reproduced signal is detected at high and low frequencies so as to produce a control signal the voltage of which varies in accordance with the difference between the level of the high frequency signal component and the level of the low frequency component. The control signal is then applied to the variable gain circuit receiving the reproduced signal so that the frequency characteristic of the reproduced signal will be controlled. Thus, the level of the reproduced signal is boosted at its high frequency range.
摘要翻译： 在用于再现以凹坑形式预先记录的信息的类型的盘播放器的电路装置中，提供了用于改变再现信号的频率特性的可变增益电路。 在高频和低频处检测再现信号的电平，以产生其电压根据高频信号分量的电平与低频分量的电平之间的差而变化的控制信号。 然后，控制信号被施加到接收再现信号的可变增益电路，从而控制再生信号的频率特性。 因此，再现信号的电平在其高频范围被提升。
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公开(公告)号：US20080115840A1
公开(公告)日：2008-05-22
申请号：US11577684
申请日：2005-10-20
申请人： Kouichi Ueki , Shigetada Sazawa , Kazutaka Hamada , Mitsuo Namba , Fujio Hori , Sadamu Kawashima , Isao Masuda , Hisanori Yamashita , Kazutaka Asano
发明人： Kouichi Ueki , Shigetada Sazawa , Kazutaka Hamada , Mitsuo Namba , Fujio Hori , Sadamu Kawashima , Isao Masuda , Hisanori Yamashita , Kazutaka Asano
CPC分类号： G01F1/667 , F23N5/242 , F23N2031/18 , G01M3/243 , G01M3/2807 , Y10T137/0379 , Y10T137/7722 , Y10T137/7726 , Y10T137/7761 , Y10T137/86397 , Y10T137/86421
摘要： A use condition of gas equipment is monitored. An abnormality determination unit 26 determines whether or not a use flow volume obtained by detecting a flow velocity obtained by measuring a signal transfer time in a medium using a flow velocity detection unit 17 and converting the detected flow velocity into a flow volume using a flow volume calculation unit 25. When the shutoff unit 27 shuts off a fluid path 1 when it is determined that there is abnormality, a return signal is output from a return unit 28 to a shutoff unit 27 in order to use the gas again by opening the fluid path. Simultaneously, when a return time-counting unit 29 starts the time-counting operation, and then, a predetermined time period has been elapsed, the flow volume calculation unit 25 determines whether or not a predetermined flow volume of greater flows in order to identify whether or not all of the gas plugs of the gas equipment connected to the downstream of the gas shutoff apparatus 27 are closed. The leakage determination unit 30 determines that there is leakage when a predetermined flow volume or greater is detected, and a driving signal is output to the shutoff unit 27 to close the fluid path 1.
摘要翻译： 监测燃气设备的使用状况。 异常确定单元26确定通过使用流速检测单元17检测在介质中测量信号传送时间而获得的流速而获得的使用流量，并且使用流量将所检测的流速转换为流量 计算单元25。 当断定单元27在确定存在异常时关闭流体路径1时，返回信号从返回单元28输出到关闭单元27，以通过打开流体路径再次使用气体。 同时，当返回时刻计数单元29开始计时操作，然后经过预定时间段时，流量计算单元25确定是否流过较大流量，以便识别是否 或者不是连接到气体截止装置27的下游的气体设备的全部气塞被关闭。 泄漏确定单元30确定当检测到预定流量或更大时存在泄漏，并且驱动信号被输出到关闭单元27以关闭流体路径1。
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8.发明授权Pay broadcasting system with enhanced security against illegal access to a down loaded program in a subscriber terminal 有权付费广播系统具有增强的安全性，防止非法访问订户终端中的下载节目公开(公告)号：US06714649B1
公开(公告)日：2004-03-30
申请号：US09345829
申请日：1999-07-01
IPC分类号： H04L944
CPC分类号： H04H60/23 , H04H60/15 , H04N5/913 , H04N7/1675 , H04N21/2347 , H04N21/4334 , H04N21/4405 , H04N21/63345 , H04N2005/91364
摘要： In a pay broadcasting system, data of a broadcast program is scrambled with a scramble key updated in a short period. The scramble key is encrypted with a first key assigned to the subscriber terminal. The first key is encrypted with a first master key set in the subscriber terminal. The security of a broadcast program stored for subsequent use in the subscriber terminal is enhanced as follows. A central station generates a second key-encrypted scramble key by encrypting the scramble key with a second key different from the first key and changeable in an interval shorter than a update interval of the first key; generates an encrypted second key by encrypting the second key with a second master key which has been commonly issued to subscriber terminals of the system; and broadcast the second key-encrypted scramble key and the encrypted second key together with the scrambled data of the program, the first key-encrypted scramble key and the encrypted first key in a multiplexed manner. When a broadcast program is to be stored, the subscriber terminal stores the scrambled data of the broadcast program and the second key-encrypted scramble key; decrypt the encrypted second key with the second master key into the second key, which is added to a stored program second key list. If the stored program is to be executed, the second key-encrypted scramble key is decrypted with a corresponding one of the second keys in the stored program second key list into a decrypted scramble key; and the scrambled data of the broadcast program is unscrambled with the decrypted scramble key.
摘要翻译： 在付费广播系统中，广播节目的数据用短时间更新的加扰密钥加扰。 加密密钥用分配给用户终端的第一密钥加密。 第一密钥是用在用户终端中设置的第一主密钥进行加密的。 存储用于用户终端中的后续使用的广播节目的安全性如下增强。 中央站通过用不同于第一密钥的第二密钥加密加密密钥并且以比第一密钥的更新间隔短的间隔进行加密来生成第二密钥加密的加密密钥; 通过用通常发给系统的用户终端的第二主密钥加密第二密钥来生成加密的第二密钥; 并且以多路复用的方式与节目的加密数据，第一密钥加密的加扰密钥和加密的第一密钥一起广播第二密钥加密的加密密钥和加密的第二密钥。 当要存储广播节目时，用户终端存储广播节目的加密数据和第二密钥加密的加扰密钥; 将具有第二主密钥的加密的第二密钥解密为第二密钥，其被添加到存储的程序第二密钥列表。 如果要执行存储的程序，则将第二密钥加密的加密密钥与存储的程序第二密钥列表中的第二密钥中的相应的一个密钥解密成解密的加密密钥; 并且利用解密的加扰密钥对广播节目的加密数据进行解扰。
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9.发明授权Video signal processing apparatus with time base correction and inhibition of horizontal sync signal replacement during vertical flyback 失效视频信号处理装置，具有时基校正和在垂直反激期间禁止水平同步信号替换
公开(公告)号：US5303046A
公开(公告)日：1994-04-12
申请号：US967041
申请日：1992-10-27
申请人： Isao Masuda
发明人： Isao Masuda
摘要： In a video signal processing apparatus for correcting time axis errors using a memory, with replacement of a horizontal sync signal in a video signal read out from the memory by a reference horizontal sync signal, data appearing in a vertical flyback period is not lost. A vertical flyback period detecting circuit functioning as an inhibiting means detects the vertical flyback period and produces a detection signal. An AND gate gates the detection signal and a reference horizontal sync signal generated from a sync signal generating circuit, so that a replacement of the horizontal sync signal is inhibited during the vertical flyback period, and an address, a time code and an ID code which have been inserted during the vertical flyback period are not lost.
摘要翻译： 在用于使用存储器校正时间轴误差的视频信号处理装置中，通过基准水平同步信号替换从存储器读出的视频信号中的水平同步信号，不会丢失在垂直反激期间出现的数据。 用作抑制装置的垂直回扫周期检测电路检测垂直反激期并产生检测信号。 AND门对从同步信号发生电路产生的检测信号和参考水平同步信号进行栅极选通，从而在垂直回扫期间禁止水平同步信号的替换，以及地址，时间码和ID码， 在垂直回扫期间插入的都不会丢失。
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公开(公告)号：US5211153A
公开(公告)日：1993-05-18
申请号：US828759
申请日：1992-01-31
申请人： Minoru Yonekawa , Yoshiaki Nagao , Yasuharu Sato , Isao Masuda , Tomohiro Ohtani
发明人： Minoru Yonekawa , Yoshiaki Nagao , Yasuharu Sato , Isao Masuda , Tomohiro Ohtani
CPC分类号： F02B77/02 , F02F1/002 , F02B1/04 , F02B2075/025 , F05C2201/0406
摘要： The present invention relates to a two-cycle internal combustion gasoline engine cylinder. The two-cycle engine cylinder according to this invention is characterized in that a smooth hard chromium plated layer is formed on a combustion chamber top inner surface of the cylinder.
摘要翻译： 本发明涉及一种双循环内燃机汽油发动机气缸。 根据本发明的双冲程发动机气缸的特征在于，在气缸的燃烧室顶部内表面上形成平滑的硬铬镀层。
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