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公开(公告)号：US09959829B2
公开(公告)日：2018-05-01
申请号：US14905764
申请日：2015-12-30
Inventor： Peng Du
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2300/0408 , G09G2300/0426 , G09G2300/0809 , G09G2310/0286 , G11C19/28
Abstract: The present invention relates to a liquid crystal drive display device, including a display area and a liquid crystal drive circuit, the liquid crystal drive circuit including a plurality of stage GOA circuits, each stage GOA circuit includes a signal line and an auxiliary pull-down circuit, wherein the signal lines are divided into odd-numbered signal lines and even-numbered signal lines, the auxiliary pull-down circuits are divided into first auxiliary pull-down circuits and second auxiliary pull-down circuits; wherein the odd-numbered signal lines and the even-numbered signal lines are separately located on two sides of the display area, and the first auxiliary pull-down circuits and the second auxiliary pull-down circuits are also separately located on two sides of the display area, any two adjacent stage GOA circuits of the plurality of stage GOA circuits share the first auxiliary pull-down circuits and the second auxiliary pull-down circuits.
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42.发明授权公开(公告)号：US09952474B2
公开(公告)日：2018-04-24
申请号：US14777257
申请日：2015-06-02
IPC: G02F1/1362 , G09G3/36
CPC classification number: G02F1/136213 , G02F1/136286 , G09G3/3648 , G09G2300/0426 , G09G2310/0232 , G09G2320/0223 , G09G2320/0242
Abstract: A deskew display panel is disclosed in present invention. The deskew display panel includes a plurality of data lines arranged in a column direction, a plurality of scanning lines perpendicular to the column direction and intersecting the data lines; a sub-pixel array including a plurality of sub-pixels arranged in array, each sub-pixel including a transistor and disposed between any two neighboring scanning lines and any two neighboring data lines; the scanning lines disposed in the sub-pixel array and parallel to each other; sub-pixels in each row including a plurality of sub-pixel sets, each sub-pixel set including two sub-pixels, the sub-pixel including the transistor, gates of the transistors connected to two neighboring scanning lines respectively, sources of the transistors connected to the same data line, and drains of the transistors connected to a liquid crystal capacitor and a storage capacitor.
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公开(公告)号：US09857646B2
公开(公告)日：2018-01-02
申请号：US14893489
申请日：2015-09-29
IPC: G02F1/1345
CPC classification number: G02F1/13452
Abstract: The invention discloses a liquid crystal display device and its display panel. The display panel includes: a display region; a fan-out region, which is connected to at least one side of the display region; the fan-out region includes at least one group of fan-out wires, each group of the fan-out wires includes a plurality of wires, the wires include a first layer of metal wires and a second layer of metal wires that are disposed alternately, a part of the first layer of metal wires and the second layer of metal wires that are adjacent is overlapped. By the method above, the invention can reduce RC delay between the wires of each group of fan-out wires and improve display quality.
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公开(公告)号：US09735073B1
公开(公告)日：2017-08-15
申请号：US15058174
申请日：2016-03-02
Inventor： Peng Du , Cheng-hung Chen
IPC: H01L23/58 , H01L21/66 , H01L27/12 , H01L29/786
CPC classification number: H01L22/34 , H01L22/14 , H01L27/1244 , H01L27/127 , H01L29/66742 , H01L29/78609 , H01L29/78648 , H01L29/78696
Abstract: A thin-film transistor (TFT) switch includes a gate, a drain, a source, a semiconductor layer, and a fourth electrode. The drain is connected to a first signal. The gate is connected to a control signal to control the switch on or off. The source outputs the first signal when the switch turns on. The fourth electrode and the gate are respectively located at two sides of the semiconductor layer. The fourth electrode is conductive and is selectively coupled to different voltage levels, thereby reducing leakage current in a channel to improve switch characteristic when the switch turns off.
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公开(公告)号：US09680025B2
公开(公告)日：2017-06-13
申请号：US14119189
申请日：2013-09-13
Inventor： Peng Du , Cheng-hung Chen
IPC: H01L27/14 , H01L29/786
CPC classification number: H01L22/34 , H01L22/14 , H01L27/1244 , H01L27/127 , H01L29/66742 , H01L29/78609 , H01L29/78648 , H01L29/78696
Abstract: The present invention proposes a TFT switch and a method for manufacturing the same. The TFT switch includes a gate, a drain, a source, a semiconductor layer and a fourth electrode. The drain is connected to a first signal, the gate is connected to a control signal to control the switch on or off. The source outputs the first signal when the switch turns on. The fourth electrode and the gate are respectively located at two sides of the semiconductor layer. The fourth electrode is conductive and is selectively coupled to different voltage levels, thereby reducing leakage current in a channel to improve switch characteristic when the switch turns off.
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Patent Agency Ranking
公开(公告)号：US09618690B2
公开(公告)日：2017-04-11
申请号：US14769785
申请日：2015-07-17
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
IPC: F21V8/00 , G02F1/1368 , G02F1/1335 , G02F1/1343 , G02F1/1333
CPC classification number: G02B6/0088 , G02B6/009 , G02F1/133308 , G02F1/133345 , G02F1/133514 , G02F1/133528 , G02F1/133615 , G02F1/134309 , G02F1/13439 , G02F1/1368 , G02F2001/133317 , G02F2001/133357 , G02F2201/121 , G02F2201/123 , G02F2201/46 , G02F2202/104
Abstract: The present invention provides a liquid crystal display device. The device includes a light guide plate, a color filter substrate, an array substrate and a light shading tape. Wherein, a side wall of the concave slot is an incline slope, an edge of the color filter substrate is supported on the incline slope of the concave slot, an edge of a plastic frame is aligned with an edge of the array substrate, and a light shading tape for relatively fixing the color filter substrate and the light guide plate. The present invention can realize a narrow frame and no frame design of the liquid crystal display device. The structure of the display panel is simplified in order to simplify the manufacturing process and reduce the production cost.
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47.发明授权Bonding pad structure of liquid crystal display and method of manufacturing the same 有权液晶显示器的接合垫结构及其制造方法公开(公告)号：US09535299B2
公开(公告)日：2017-01-03
申请号：US14375629
申请日：2014-07-07
Inventor： Peng Du
IPC: H05K1/03 , G02F1/1345 , G02F1/1368 , G02F1/1343 , G02F1/1362 , G02F1/136
CPC classification number: G02F1/13458 , G02F1/13439 , G02F1/136227 , G02F1/1368 , G02F2001/13606
Abstract: A bonding pad structure of liquid crystal display, having a plurality of bonding pads formed at part of the upper surface of the edge area of the substrate, and an overcoat layer with one side being inclined surface and positioned at the other part of upper surface of the bonding pad. The inclined surface is formed when patterning the overcoat layer covering the bonding pad by using the mask with gradient transmittance and removing the overcoat layer formed at part of the upper surface of the bonding pad. Also discloses a manufacturing method of the bonding pad structure of liquid crystal display.
Abstract translation: 一种液晶显示器的接合焊盘结构，其具有形成在基板的边缘区域的上表面的一部分处的多个接合焊盘，以及一侧是倾斜表面并且位于该基板的上表面的另一部分的外涂层 接合垫。 通过使用具有梯度透射率的掩模来图案化覆盖焊盘的外涂层时，形成倾斜表面，并且去除在焊盘的上表面的一部分处形成的外涂层。 还公开了一种液晶显示器的焊盘结构的制造方法。
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48.发明申请公开(公告)号：US20150372010A1
公开(公告)日：2015-12-24
申请号：US14370774
申请日：2014-06-18
Inventor： Cong Wang , Ming-Hung Shih , Peng Du
IPC: H01L27/12 , H01L21/768 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/1362 , H01L27/1214 , H01L27/1259 , H01L27/3258 , H01L27/3262 , H01L27/3276
Abstract: The present invention proposes a TFT array substrate includes: a substrate; scan lines on the substrate; data lines intercrossing with the scan lines; a first insulating layer between the scan lines and the data lines; a second insulating layer on the first insulating layer and covering the data lines; a common electrode layer on the second insulating layer, comprising first holes located above the data lines. The first holes uncover the second insulating layer. The present invention decreases parasitic capacitance between the common electrode layer and data lines and between the common electrode layer and scan lines by decreasing overlaping sections between a common electrode layer and the data lines and between the common electrode layer and the scan lines. Therefore load of the data lines and the scan lines decreases, charge efficiency of the pixels increases, and display effect of an LCD panel is therefore improved.
Abstract translation: 本发明提出一种TFT阵列基板，包括：基板; 在基板上扫描线; 数据线与扫描线交叉; 扫描线和数据线之间的第一绝缘层; 在所述第一绝缘层上的第二绝缘层并覆盖所述数据线; 在第二绝缘层上的公共电极层，包括位于数据线之上的第一孔。 第一孔露出第二绝缘层。 本发明通过减小公共电极层与数据线之间以及公共电极层与扫描线之间的重叠部分，减小公共电极层与数据线之间以及公共电极层与扫描线之间的寄生电容。 因此，数据线和扫描线的负载减小，像素的充电效率增加，因此改善了LCD面板的显示效果。
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公开(公告)号：US09204532B2
公开(公告)日：2015-12-01
申请号：US14113582
申请日：2013-07-31
Inventor： Peng Du , Ming hung Shih , Jiali Jiang
IPC: G02F1/1345 , H05K1/02 , H05K1/16
CPC classification number: H05K1/025 , G02F1/1345 , H05K1/0248 , H05K1/162 , H05K2201/0326 , H05K2201/0391 , H05K2201/09227 , H05K2201/09763 , H05K2201/10136
Abstract: A fanout line structure of an array substrate includes first fanout lines arranged on a fanout area of the array substrate, and second fanout lines arranged on the fanout area of the array substrate. A second conducting film is arranged at a bottom of the second fanout line, a second capacitor is formed between the second conducting film and a first conducting film of the second fanout line, the second capacitor is used to reduce an impedance difference between the fanout lines. Capacitance value of the second capacitor is dependent on an overlapping area between the second conducting film and the first conducting film.
Abstract translation: 阵列基板的扇出线结构包括布置在阵列基板的扇出区域上的第一扇出线和布置在阵列基板的扇出区域上的第二扇出线。 第二导电膜布置在第二扇出线的底部，第二电容器形成在第二导电膜和第二扇出线的第一导电膜之间，第二电容用于降低扇出线之间的阻抗差 。 第二电容器的电容值取决于第二导电膜和第一导电膜之间的重叠面积。
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公开(公告)号：US09082665B2
公开(公告)日：2015-07-14
申请号：US14008539
申请日：2013-06-28
Inventor： Peng Du
IPC: H01L27/12 , G02F1/1345
CPC classification number: H01L27/124 , G02F1/13452
Abstract: A fanout line structure of an array substrate includes a plurality of fanout lines arranged on a fanout area of the array substrate, where resistance value of the fanout line is dependent on length of the fanout line. Each of the fanout lines comprises a first conducting film. Resistance values of a first part of fanout lines are less than resistance values of a second part of the fanout lines, and the first part of fanout lines are covered by an additional conducting film. In the fanout lines covered by the additional conducting film, as the resistance value of the fanout line, increases, area of the additional conducting film covering the fanout line correspondingly decreases. An additional capacitor is generated between the additional conducting film and the first conducting film.
Abstract translation: 阵列基板的扇出线结构包括布置在阵列基板的扇出区域上的多个扇出线，其中扇出线的电阻值取决于扇出线的长度。 每个扇出线包括第一导电膜。 扇出线的第一部分的电阻值小于扇出线的第二部分的电阻值，并且第一部分扇出线被额外的导电膜覆盖。 在由附加导电膜覆盖的扇出线中，随着扇出线的电阻值增加，覆盖扇出线的附加导电膜的面积相应地减小。 在附加导电膜和第一导电膜之间产生附加电容器。
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