Lithography simulation method and recording medium
    41.
    发明授权
    Lithography simulation method and recording medium 失效
    平版印刷模拟方法和记录介质

    公开(公告)号:US07426712B2

    公开(公告)日:2008-09-16

    申请号:US11485554

    申请日:2006-07-13

    IPC分类号: G06F17/50 G03F9/00

    CPC分类号: G03F7/70433 G03F7/705

    摘要: A lithography simulation method includes: taking in design data of a pattern to be formed on a substrate and mask data to prepare a mask pattern used in forming a latent image of the pattern on the substrate by transmission of an energy ray; obtaining the latent image of the pattern by calculation of an intensity of the energy ray; locally changing, at least in a portion corresponding to a pattern of interest, a relative position in a direction of the intensity of the energy ray between a latent image curve and a reference intensity line in accordance with a distance between the pattern of interest and a pattern of a neighboring region , the latent image curve being an intensity distribution curve of the energy ray constituting the latent image, the reference intensity line being defined to specify a position of an edge of the pattern of interest; and calculating a distance between intersections of a portion of the latent image curve corresponding to the pattern of interest and the reference intensity line in the changed relative position to define a line width of interest of the pattern of interest.

    摘要翻译: 光刻模拟方法包括:获取要在基板上形成的图案的设计数据,并且掩模数据,以通过透射能量线来制备用于在基板上形成图案的潜像所使用的掩模图案; 通过计算能量射线的强度来获得图案的潜像; 至少在与感兴趣的图案相对应的部分中,根据感兴趣的图案和图像之间的距离,在潜像图像曲线和参考强度线之间的能量射线的强度的方向上的相对位置, 所述潜像曲线是构成所述潜像的能量射线的强度分布曲线,所述参考强度线被定义为指定所述感兴趣图案的边缘的位置; 以及计算与感兴趣的图案相对应的潜在图像曲线的一部分的交点与改变的相对位置中的参考强度线之间的距离,以限定感兴趣的图案的感兴趣的线宽。

    Method for exposure-mask inspection and recording medium on which a program for searching for portions to be measured is recorded
    44.
    发明授权
    Method for exposure-mask inspection and recording medium on which a program for searching for portions to be measured is recorded 失效
    曝光掩模检查和记录介质的方法,其上记录有用于搜索待测量部分的程序

    公开(公告)号:US06334209B1

    公开(公告)日:2001-12-25

    申请号:US09389090

    申请日:1999-09-02

    IPC分类号: G06F1750

    CPC分类号: G03F1/84

    摘要: Disclosed is an exposure mask inspecting method for use in manufacturing semiconductor devices. This inspecting method calculate gradients of a correlation curve of a variation in critical dimension of an exposure mask and a variation in critical dimension of a resist, extracts portions having large slopes of the correlation curve, and slopes the portions having large slopes of the correlation curve as to-be-measured portions at the time of verifying the specifications of the surface critical dimension of the exposure mask.

    摘要翻译: 公开了一种用于制造半导体器件的曝光掩模检查方法。 该检查方法计算曝光掩模的临界尺寸的变化与抗蚀剂的临界尺寸的变化的相关曲线的梯度,提取具有相关曲线的大斜率的部分,并且使具有相关曲线的大斜率的部分倾斜 作为在验证曝光掩模的表面临界尺寸的规格时的待测量部分。

    Pattern shape determining method, pattern shape verifying method, and pattern correcting method
    45.
    发明授权
    Pattern shape determining method, pattern shape verifying method, and pattern correcting method 有权
    图案形状确定方法,图案形状验证方法和图案校正方法

    公开(公告)号:US08885949B2

    公开(公告)日:2014-11-11

    申请号:US13238383

    申请日:2011-09-21

    摘要: According to the pattern shape determining method of the embodiment, a first reference position of a pattern shape is set on a first pattern and a second reference position of a pattern shape is set on a second pattern. Moreover, an allowable dimensional difference between the first pattern and the second pattern is set to a value corresponding to a distance from the first reference position. Then, it is determined whether the second pattern has a pattern shape identical with the first pattern, based on whether a dimensional difference between the first pattern and the second pattern is within a range of an allowable dimensional difference set at a position at which the dimensional difference is calculated.

    摘要翻译: 根据本实施例的图案形状确定方法,将图案形状的第一参考位置设置在第一图案上,并且将图案形状的第二参考位置设置在第二图案上。 此外,将第一图案和第二图案之间的容许尺寸差设定为与从第一基准位置的距离对应的值。 然后,基于第一图案和第二图案之间的尺寸差是否在设定在尺寸的位置的容许尺寸差的范围内,确定第二图案是否具有与第一图案相同的图案形状 差额计算。

    Sub-resolution assist feature arranging method and computer program product and manufacturing method of semiconductor device
    46.
    发明授权
    Sub-resolution assist feature arranging method and computer program product and manufacturing method of semiconductor device 有权
    分解辅助功能布置方法和计算机程序产品及半导体器件的制造方法

    公开(公告)号:US08809072B2

    公开(公告)日:2014-08-19

    申请号:US13051961

    申请日:2011-03-18

    IPC分类号: H01L21/66 G01R31/26

    CPC分类号: G03F1/36

    摘要: According to a sub-resolution assist feature arranging method in embodiments, it is selected which of a rule base and a model base is set for which pattern region on pattern data corresponding to a main pattern as a type of the method of arranging the sub-resolution assist feature for improving resolution of the main pattern formed on a substrate. Then, the sub-resolution assist feature by the rule base is arranged in a pattern region set as the rule base and the sub-resolution assist feature by the model base is arranged in a pattern region set as the model base.

    摘要翻译: 根据实施例中的子分辨率辅助特征排列方法,选择规则库和模型库中的哪一个被设置为对应于主图案的图案数据上的哪个图案区域作为安排子图形的方法的类型, 分辨率辅助功能,用于提高在基板上形成的主图案的分辨率。 然后,将规则库的子分辨率辅助特征设置在设置为规则库的图案区域中,并且由模型库将子分辨率辅助特征排列在设置为模型库的图案区域中。

    Dimension assurance of mask using plurality of types of pattern ambient environment
    47.
    发明授权
    Dimension assurance of mask using plurality of types of pattern ambient environment 有权
    使用多种图案周边环境的面膜尺寸保证

    公开(公告)号:US08336004B2

    公开(公告)日:2012-12-18

    申请号:US13024604

    申请日:2011-02-10

    IPC分类号: G06F17/50

    CPC分类号: G03F1/36 H01L22/12 H01L22/20

    摘要: According to a mask verifying method of the embodiment, a difference between an actual dimension of a mask pattern and a simulation dimension is calculated as a computational estimated value. Moreover, a difference between an actual dimension of the mask pattern that is actually measured and a dimension on pattern data is calculated as an actually-measured difference. Then, it is verified whether a mask pattern dimension passes or fails based on the calculated value. When calculating the computational estimated value, a model function, which is set based on each correspondence relationship between an actual dimension and a mask simulation dimension of a test pattern, which includes a plurality of types of pattern ambient environments, to the mask pattern.

    摘要翻译: 根据本实施例的掩模验证方法,计算掩模图案的实际尺寸与模拟尺寸之间的差异作为计算估计值。 此外,将实际测量的掩模图案的实际尺寸与图案数据上的尺寸之间的差计算为实际测量的差。 然后,根据计算值验证掩模图案尺寸是否通过或失败。 当计算计算估计值时,将基于包括多种图案环境环境的测试图案的实际尺寸和掩模模拟尺寸之间的每个对应关系设置的模型函数提供给掩模图案。

    SEMICONDUCTOR INTEGRATED CIRCUIT PATTERN VERIFICATION METHOD, PHOTOMASK MANUFACTURING METHOD, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE MANUFACTURING METHOD, AND PROGRAM FOR IMPLEMENTING SEMICONDUCTOR INTEGRATED CIRCUIT PATTERN VERIFICATION METHOD
    49.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT PATTERN VERIFICATION METHOD, PHOTOMASK MANUFACTURING METHOD, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE MANUFACTURING METHOD, AND PROGRAM FOR IMPLEMENTING SEMICONDUCTOR INTEGRATED CIRCUIT PATTERN VERIFICATION METHOD 有权
    半导体集成电路图形验证方法,光电二极管制造方法,半导体集成电路设备制造方法和实现半导体集成电路图形验证方法的程序

    公开(公告)号:US20110175247A1

    公开(公告)日:2011-07-21

    申请号:US13010130

    申请日:2011-01-20

    申请人: Shigeki Nojima

    发明人: Shigeki Nojima

    IPC分类号: H01L21/66

    摘要: A semiconductor integrated circuit pattern verification method includes executing simulation to obtain a simulation pattern to be formed on a substrate on the basis of a semiconductor integrated circuit design pattern, comparing the simulation pattern and the design pattern that is required on the substrate to detect a first difference value, extracting error candidates at which the first difference value is not less than a first predetermined value, comparing pattern shapes at the error candidates to detect a second difference value, combining, into one group, patterns whose second difference values are not more than a second predetermined value, and extracting a predetermined number of patterns from each group and verifying error candidates of the extracted patterns.

    摘要翻译: 半导体集成电路图案验证方法包括执行模拟,以基于半导体集成电路设计图案获得要在基板上形成的模拟图案,比较基板上所需的模拟图案和设计图案,以检测第一 差分值,提取第一差值不小于第一预定值的错误候选,比较错误候选的图案形状以检测第二差值,将第二差值不大于 第二预定值,并且从每个组提取预定数量的模式并验证提取的模式的错误候选。