公开(公告)号：US20200118932A1

公开(公告)日：2020-04-16

申请号：US16715215

申请日：2019-12-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Cherng JENG ,  Shyh-Wei CHENG ,  Yun CHANG ,  Chen-Chieh CHIANG ,  Jung-Chi JENG

IPC: H01L23/538 ,  H01L23/48 ,  H01L23/00 ,  H01L23/522 ,  H01L21/768 ,  H01L21/762 ,  H01L21/50

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first mask layer over a dielectric layer. The method includes forming a second mask layer over a first top surface of the first mask layer, the inner wall, and the bottom surface. The method includes removing the second mask layer covering the bottom surface to form a second trench in the second mask layer. The method includes forming an anti-bombardment layer over a second top surface of the second mask layer. The second mask layer and the anti-bombardment layer are made of different materials. The method includes removing the first portion, the first mask layer, the second mask layer, and the anti-bombardment layer to form a third trench in the dielectric layer. The method includes forming a conductive structure in the third trench.

公开(公告)号：US20200051978A1

公开(公告)日：2020-02-13

申请号：US16657528

申请日：2019-10-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Barn CHEN ,  Chi-Cherng JENG ,  Shiu-Ko JANGJIAN ,  Ting-Huang KUO

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/06

Abstract: The present disclosure describes an exemplary asymmetric CPP layout for a semiconductor structure with a different gate pitch over the source and the drain regions to mitigate gate-to-gate parasitic capacitances over the drain region, thus improving cutoff frequency. For example, the semiconductor structure can include a fin on a substrate. The semiconductor structure can also include first and second gate structures formed on the fin and separated by a first space. The semiconductor structure can also include a third gate structure formed on the fin between the first and the second gate structures. The third gate structure can be separated from the first gate structure by a second pitch and separated from the second gate structure by a third pitch that is greater than the second pitch. The semiconductor structure further includes a source region formed between the first and third gate structures, and a drain region formed between the third and the second gate structures.

公开(公告)号：US20190252440A1

公开(公告)日：2019-08-15

申请号：US16390990

申请日：2019-04-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Volume CHIEN ,  Yun-Wei CHENG ,  Shiu-Ko JANGJIAN ,  Zhe-Ju LIU ,  Kuo-Cheng LEE ,  Chi-Cherng JENG

IPC: H01L27/146 ,  H01L31/0232 ,  H01L31/0216

CPC classification number: H01L27/14623 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14645 ,  H01L27/14685 ,  H01L31/02164 ,  H01L31/0232

Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate and a light sensing region in the semiconductor substrate. The image sensor device also includes a dielectric layer over the semiconductor substrate. The image sensor device further includes a filter partially surrounded by the dielectric layer. The filter has a protruding portion protruding from a bottom surface of the dielectric layer. In addition, the image sensor device includes a shielding layer between the dielectric layer and the semiconductor substrate and surrounding the protruding portion of the filter.

公开(公告)号：US20160225630A1

公开(公告)日：2016-08-04

申请号：US14795299

申请日：2015-07-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ru-Shang HSIAO ,  Chi-Cherng JENG ,  Chih-Mu HUANG ,  Shin-Yeu TSAI ,  Fang-Wei LIN

IPC: H01L21/3065 ,  H01L21/308 ,  H01L21/283

CPC classification number: H01L21/3065 ,  H01L21/02068 ,  H01L21/283 ,  H01L21/28518 ,  H01L21/3003 ,  H01L21/3081 ,  H01L21/47635 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76883 ,  H01L21/82345 ,  H01L29/66545

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a metal gate stack over a semiconductor substrate. The method also includes performing a hydrogen-containing plasma treatment on the metal gate stack to modify a surface of the metal gate stack. The hydrogen-containing plasma treatment includes exciting a gas mixture including a first hydrogen-containing gas and a second hydrogen-containing gas to generate a hydrogen-containing plasma.

Abstract translation: 提供一种形成半导体器件结构的方法。 该方法包括在半导体衬底上形成金属栅叠层。 该方法还包括在金属栅极叠层上执行含氢等离子体处理以改变金属栅极叠层的表面。 含氢等离子体处理包括激发包括第一含氢气体和第二含氢气体的气体混合物以产生含氢等离子体。

公开(公告)号：US20150243697A1

公开(公告)日：2015-08-27

申请号：US14192168

申请日：2014-02-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Volume CHIEN ,  Yu-Heng CHENG ,  Fu-Tsun TSAI ,  Hsi-Jung WU ,  Chi-Cherng JENG

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14685

Abstract: Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate. The semiconductor substrate has a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a reflective layer positioned on an inner wall of the trench, wherein the reflective layer has a light reflectivity ranging from about 70% to about 100%.

Abstract translation: 本公开的实施例提供了一种图像传感器装置。 图像传感器装置包括半导体衬底。 半导体衬底具有前表面，与前表面相反的后表面，靠近前表面的感光区域和与光感测区域相邻的沟槽。 图像传感器装置包括位于沟槽的内壁上的反射层，其中反射层的光反射率为约70％至约100％。

公开(公告)号：US20150123225A1

公开(公告)日：2015-05-07

申请号：US14073580

申请日：2013-11-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Volume CHIEN ,  Su-Hua CHANG ,  Chia-Yu WEI ,  Zen-Fong HUANG ,  Chi-Cherng JENG

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14687 ,  H01L31/02164

Abstract: A backside illuminated image sensor device with a shielding layer and a manufacturing method thereof are provided. In the backside illuminated image senor device, a patterned conductive shielding layer is formed on a dielectric layer on a backside surface of a semiconductor substrate and surrounding a pixel array on a front side surface of the semiconductor substrate.

Abstract translation: 提供了具有屏蔽层的背面照明图像传感器装置及其制造方法。 在背面照明图像传感器装置中，在半导体衬底的背面上的电介质层上形成图案化的导电屏蔽层，并围绕半导体衬底的前侧表面上的像素阵列。

公开(公告)号：US20140167199A1

公开(公告)日：2014-06-19

申请号：US13717883

申请日：2012-12-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Pin CHENG ,  Jung-Liang CHIEN ,  Chih-Kang CHAO ,  Chi-Cherng JENG ,  Hsin-Chi CHEN ,  Ying-Lang WANG

IPC: H01L23/544

CPC classification number: H01L21/78 ,  H01L22/32 ,  H01L23/562 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/00

Abstract: A semiconductor wafer having a plurality of chip die areas arranged on a wafer in an array, each chip die area including a seal ring area with one or more first sets of polygonal structures. The wafer further comprises scribe line areas between the chip die areas, the scribe line areas including one or more second sets of polygonal structures. The presence of proximate polygonal structures between the scribe line and seal ring areas balance stresses between the chip die areas during wafer dicing operation.

Abstract translation: 一种半导体晶片，具有排列在阵列中的晶片上的多个芯片晶粒区域，每个芯片晶粒区域包括具有一个或多个第一组多边形结构的密封环区域。 晶片还包括在芯片模具区域之间的划线区域，划线区域包括一个或多个第二组多边形结构。 切割线和密封环区域之间的近似多边形结构的存在在晶片切割操作期间平衡芯片晶片区域之间的应力。