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    Semiconductor device and manufacturing method thereof
    41.
    发明授权
    Semiconductor device and manufacturing method thereof 有权

    公开(公告)号：US12046671B2

    公开(公告)日：2024-07-23

    申请号：US17569527

    申请日：2022-01-06

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Che-Hua Chang ,  Shin-Hung Li ,  Tsung-Yu Yang ,  Ruei-Jhe Tsao

    IPC: H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66

    CPC classification number: H01L29/7825 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/42368 ,  H01L29/66704

    Abstract: A semiconductor device includes a semiconductor substrate, a trench, and a gate structure. The trench is disposed in the semiconductor substrate. The gate structure is disposed on the semiconductor substrate. The gate structure includes a gate electrode, a first gate oxide layer, and a second gate oxide layer. A first portion of the gate electrode is disposed in the trench, and a second portion of the gate electrode is disposed outside the trench. The first gate oxide layer is disposed between the gate electrode and the semiconductor substrate. At least a portion of the first gate oxide layer is disposed in the trench. The second gate oxide layer is disposed between the second portion of the gate electrode and the semiconductor substrate in a vertical direction. A thickness of the second gate oxide layer is greater than a thickness of the first gate oxide layer.

    Semiconductor transistor and fabrication method thereof
    47.
    发明授权
    Semiconductor transistor and fabrication method thereof 有权

    公开(公告)号：US11217693B2

    公开(公告)日：2022-01-04

    申请号：US16711442

    申请日：2019-12-12

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chang-Po Hsiung ,  Shin-Hung Li

    IPC: H01L29/78 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423

    Abstract: A semiconductor transistor includes a first lightly doped-drain region disposed in a drain region of a semiconductor substrate; a first heavily doped region disposed in the first lightly doped-drain region; and a gate located on the channel region; a gate oxide layer between the gate and the channel region; and a first insulating feature disposed in the first lightly doped-drain region between the channel region and the first heavily doped region. The gate overlaps with the first insulating feature. The thickness of the first insulating feature is greater than that of the gate oxide layer.

    Semiconductor device
    48.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10396157B1

    公开(公告)日：2019-08-27

    申请号：US15913533

    申请日：2018-03-06

    Applicant: United Microelectronics Corp.

    Inventor： Shin-Hung Li ,  Kuan-Chuan Chen ,  Nien-Chung Li ,  Wen-Fang Lee ,  Chih-Chung Wang

    IPC: H01L27/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06 ,  H01L21/762

    Abstract: A semiconductor device includes semiconductor layer having first device region and second device region. A shallow trench isolation (STI) structure is in the semiconductor layer and located at periphery of the first and second device regions. A first and second insulating layers are on the semiconductor layer and respectively located in the first and second device regions. A first gate structure is located on the first insulating layer. A source region and a drain region are in the semiconductor layer and are located at two sides of the first gate structure. A gate doped region is in a surface region of the semiconductor layer in the second device region to serve as a second gate structure. A channel layer is located on the second insulating layer. A source layer and a drain layer are on the STI structure and are located at two sides of the channel layer.

    SEMICONDUCTOR DEVICE
    49.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190245038A1

    公开(公告)日：2019-08-08

    申请号：US15913533

    申请日：2018-03-06

    Applicant: United Microelectronics Corp.

    Inventor： Shin-Hung Li ,  Kuan-Chuan Chen ,  Nien-Chung Li ,  Wen-Fang Lee ,  Chih-Chung Wang

    IPC: H01L29/08 ,  H01L21/762 ,  H01L29/06 ,  H01L29/66

    CPC classification number: H01L29/0847 ,  H01L21/76224 ,  H01L27/0617 ,  H01L29/0649 ,  H01L29/66545

    Abstract: A semiconductor device includes semiconductor layer having first device region and second device region. A shallow trench isolation (STI) structure is in the semiconductor layer and located at periphery of the first and second device regions. A first and second insulating layers are on the semiconductor layer and respectively located in the first and second device regions. A first gate structure is located on the first insulating layer. A source region and a drain region are in the semiconductor layer and are located at two sides of the first gate structure. A gate doped region is in a surface region of the semiconductor layer in the second device region to serve as a second gate structure. A channel layer is located on the second insulating layer. A source layer and a drain layer are on the STI structure and are located at two sides of the channel layer.

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