公开(公告)号：US20090208867A1

公开(公告)日：2009-08-20

申请号：US12371347

申请日：2009-02-13

申请人： Yuji Harada ,  Jun Hatakeyama ,  Kazunori Maeda ,  Tomohiro Kobayashi

发明人： Yuji Harada ,  Jun Hatakeyama ,  Kazunori Maeda ,  Tomohiro Kobayashi

IPC分类号： G03F7/20 ,  G03F7/004

CPC分类号： G03F7/0392 ,  G03F7/0045 ,  G03F7/0046 ,  G03F7/0397 ,  G03F7/11 ,  G03F7/2041 ,  Y10S430/108 ,  Y10S430/111 ,  Y10S430/143

摘要： A polymer obtained through copolymerization of a monomer having a hexafluoroalcohol pendant and a monomer having a hexafluoroalcohol pendant whose hydroxyl moiety has been protected is useful as an additive to a photoresist composition and as a protective coating material for immersion lithography. When processed by immersion lithography, the resist composition and protective coating composition exhibit good water repellency and water slip and produce few development defects.

摘要翻译： 通过具有六氟醇侧基的单体和具有羟基部分被保护的六氟醇侧基的单体共聚得到的聚合物可用作光致抗蚀剂组合物的添加剂和浸渍光刻用保护涂料。 当通过浸渍光刻处理时，抗蚀剂组合物和保护性涂料组合物表现出良好的拒水性和水滑动性，并且产生很少的显影缺陷。

公开(公告)号：US20080233518A1

公开(公告)日：2008-09-25

申请号：US12128039

申请日：2008-05-28

申请人： Seiji Nagahara ,  Satoshi Watanabe ,  Kazunori Maeda

发明人： Seiji Nagahara ,  Satoshi Watanabe ,  Kazunori Maeda

IPC分类号： G03F7/20 ,  G03F7/26

CPC分类号： G03F7/0045 ,  G03F7/0392 ,  Y10S430/115 ,  Y10S430/12 ,  Y10S430/122

摘要： With the damascene process in which an interconnection is formed using a conventional chemically amplified positive photoresist composition, there arises a problem that the photoresist within the via hole (as well as in its vicinity) may remain even after the exposure and the development are carried out. The present invention relates to a chemically amplified resist composition comprising, at least, a photo acid generator, a quencher and a salt having a buffering function for an acid which is generated from the acid generator by irradiation, wherein the salt having the buffering function for the acid generated from the acid generator is a salt derived from a long chain alkylbenzenesulfonic acid or a long chain alkoxybenzenesulfonic acid and an organic amine that is a basic compound.

摘要翻译： 在使用常规的化学放大型正性光致抗蚀剂组合物形成互连的镶嵌工艺的情况下，存在即使在曝光和显影进行之后，通孔（以及其附近）内的光致抗蚀剂也可能保留的问题 。 本发明涉及一种化学放大抗蚀剂组合物，其至少包含光酸产生剂，猝灭剂和具有由酸产生剂通过照射产生的酸的缓冲功能的盐，其中具有缓冲功能的盐 由酸产生剂产生的酸是衍生自长链烷基苯磺酸或长链烷氧基苯磺酸的盐和作为碱性化合物的有机胺。

公开(公告)号：US07368693B2

公开(公告)日：2008-05-06

申请号：US11038150

申请日：2005-01-21

申请人： Kazunori Maeda

发明人： Kazunori Maeda

IPC分类号： H05B6/68 ,  H05B6/66

CPC分类号： H05B6/6435

摘要： A microwave oven includes a heating chamber for heating and cooking foods, a heating unit for supplying heat energy to the heating chamber; a controller for controlling an operation of the heating unit, and an input unit for inputting cooking information into the controller. The input unit includes as one unit a display unit for displaying the cooking information to be inputted and an electrode unit having one or more switches directly formed on the display unit.

摘要翻译： 微波炉包括用于加热和烹饪食物的加热室，用于向加热室供应热能的加热单元; 用于控制加热单元的操作的控制器，以及用于将烹饪信息输入到控制器中的输入单元。 输入单元包括用于显示要输入的烹饪信息的显示单元和具有直接形成在显示单元上的一个或多个开关的电极单元。

公开(公告)号：US20070175891A1

公开(公告)日：2007-08-02

申请号：US10598506

申请日：2005-02-24

申请人： Kazunori Maeda

发明人： Kazunori Maeda

IPC分类号： H05B6/68

CPC分类号： H05B6/6417 ,  E05B2047/0068 ,  E05C1/14 ,  E05C9/041 ,  F24C15/022

摘要： The object of the invention is to improve the safety of a cooking apparatus, the efficiency of the door opening and shutting operation of the door opening and shutting part, and the quality of a cooked food. An opening and shutting door 4 includes a handle 5 for opening and shutting the door, and a door key 11 removably mounted on the door and including engaging portions 11a and 11b provided on two portions of the door key spaced a given distance from each other and projected toward the heating chamber side. In the interior of a cooking apparatus main body, there is provided a door hook 13 which, in the door shut state, is engaged with the engaging portions 11a and 11b inserted to thereby hold the door key 11. The door hook 13 includes door switches 14 and 16 which, when they are contacted with the engaging portions 11a and 11b, can be respectively switched so as to allow a power supply circuit for heating to conduct. The door key 11 has play in its connecting portion with the handle 5, while the play corresponds to the distance that the door key 11 moves in the longitudinal direction thereof when the opening and shutting door 4 is switched from its opened state to its shut state.

摘要翻译： 本发明的目的是提高烹饪设备的安全性，门打开和关闭部分的门打开和关闭操作的效率以及烹饪食物的质量。 开闭门4包括用于打开和关闭门的把手5和可移除地安装在门上的门钥匙11，其包括设置在门密钥的两个部分上的接合部分11a和11b，该两个部分与每个门间距一定距离 另一个并朝向加热室侧投影。 在烹饪器具主体的内部设置有门钩13，门钩关闭状态与插入的卡合部分11a和11b接合，从而保持门锁11。 门钩13包括门开关14和16，门开关14和16当它们与接合部分11a和11b接触时可分别切换，以允许供电电路进行加热。 门锁11在其与手柄5的连接部分中播放，而当打开和关闭门4从其打开状态切换到其关闭状态时，播放对应于门键11在其纵向方向上移动的距离 。

公开(公告)号：US20060183051A1

公开(公告)日：2006-08-17

申请号：US11339590

申请日：2006-01-26

申请人： Takanobu Takeda ,  Eiji Fukuda ,  Kazunori Maeda ,  Satoshi Watanabe

发明人： Takanobu Takeda ,  Eiji Fukuda ,  Kazunori Maeda ,  Satoshi Watanabe

IPC分类号： G03C1/76

CPC分类号： G03F7/0392

摘要： The present invention-provides a positive resist composition wherein at least a polymer included in a base resin has a repeating unit with an acid labile group having absorption at the 248 nm wavelength light and the repeating unit is included with a ratio of 1-10% of all repeating units of polymers included in the base resin. There can be provided a positive resist composition with equal or higher sensitivity and resolution than those of conventional positive resist compositions, and in particular, by which a pattern profile on a substrate with high reflectivity is excellent and generation of a standing wave and line edge roughness are reduced.

摘要翻译： 本发明提供一种正型抗蚀剂组合物，其中至少包含在基础树脂中的聚合物具有在248nm波长的光下具有吸收性的酸不稳定基团的重复单元，重复单元的比例为1-10％ 包括在基础树脂中的聚合物的所有重复单元。 可以提供与常规正性抗蚀剂组合物相同或更高的灵敏度和分辨率的正性抗蚀剂组合物，特别是通过其具有高反射率的基板上的图案轮廓优异并产生驻波和线边缘粗糙度 减少了

公开(公告)号：US07064991B2

公开(公告)日：2006-06-20

申请号：US10913371

申请日：2004-08-09

申请人： Kazunori Maeda

发明人： Kazunori Maeda

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C16/26 ,  G11C2029/2602

摘要： A semiconductor storage device includes command decoder for decoding an input command to output a decoded result and for simultaneously outputting A and B bank activation signal for activating said first and second banks, during a parallel test; a set of bank A control circuits for generating a control signal for a bank A based on a bank A activating signal, a selector circuit receiving a bank B activation signal output from the command decoder and the control signal for a bank A, for selecting outputting a bank B activating signal during the normal operation and for selecting and outputting the control signal for a bank A during parallel test, and a set of bank B control circuits receiving the output from the selector circuit to generate a control signal for the bank B.

摘要翻译： 一种半导体存储装置，包括用于解码输入命令以输出解码结果的命令解码器，并且用于在并行测试期间同时输出用于激活所述第一和第二存储体的A组和B组激活信号; 一组存储体A控制电路，用于基于存储体A激活信号产生用于存储体A的控制信号，选择器电路接收从命令解码器输出的存储体B激活信号和用于存储体A的控制信号，用于选择输出 在正常操作期间的存储体B激活信号并且用于在并行测试期间选择和输出存储体A的控制信号，以及一组存储体B控制电路，其接收选择器电路的输出以产生用于存储体B的控制信号。

公开(公告)号：US06373784B2

公开(公告)日：2002-04-16

申请号：US09764480

申请日：2001-01-17

申请人： Kazunori Maeda

发明人： Kazunori Maeda

IPC分类号： G11C800

CPC分类号： G11C7/225 ,  G11C7/1066 ,  G11C7/1072 ,  G11C7/222 ,  G11C29/14

摘要： A semiconductor device, such as a SDRAM, having internal signals (FICLK and ICLK) generated with similar timings with respect to each other, even when operating at a frequency that is too low for proper operation of a synchronous circuit (103). According to one embodiment, the semiconductor device may include an internal signal generator (100) having a first stage circuit (101), timing control circuit (110) and synchronous circuit (103). The first stage circuit (101) may receive an external CLK and generate an internal signal ICLK′. The timing control circuit (110) may be coupled to receive internal signal ICLK′ and generate internal signal ICLK′. The synchronous circuit (103) may be coupled to receive internal signal ICLK′ and generate internal signal FICLK. Internal signals (FICLK and ICLK) may have a timing with respect to one another in a normal mode of operation. When operating at a frequency too low for a synchronous circuit (103), internal signal generator (100) may include a test mode of operation in which timing control circuit (110) allows internal signals (FICLK and ICLK) to have similar timings with respect to one another in the test mode as in a normal mode of operation.

摘要翻译： 即使以对于同步电路（103）的正常操作来说太低的频率进行操作，也具有内部信号（FICLK和ICLK）等的半导体装置，其具有相似的定时相互产生的内部信号（FICLK，ICLK）。 根据一个实施例，半导体器件可以包括具有第一级电路（101），定时控制电路（110）和同步电路（103）的内部信号发生器（100）。 第一级电路（101）可以接收外部CLK并产生内部信号ICLK'。 定时控制电路（110）可以被耦合以接收内部信号ICLK'并产生内部信号ICLK'。 同步电路（103）可以被耦合以接收内部信号ICLK'并产生内部信号FICLK。 在正常操作模式下，内部信号（FICLK和ICLK）可以相对于彼此具有定时。 当内部信号发生器（100）以对于同步电路（103）太低的频率工作时，内部信号发生器（100）可以包括测试操作模式，其中定时控制电路（110）允许内部信号（FICLK和ICLK）具有相似的定时 在测试模式下，如在正常的操作模式中。

公开(公告)号：US06226206B1

公开(公告)日：2001-05-01

申请号：US09265042

申请日：1999-03-09

申请人： Kazunori Maeda

发明人： Kazunori Maeda

IPC分类号： G11C700

CPC分类号： G11C5/146 ,  G11C5/145 ,  G11C11/4074

摘要： Disclosed is a semiconductor memory device, which comprises a plurality of circuits using a voltage obtained by boosting an external power source voltage and power source noises produced by operations of these circuits have no influence on other circuits. The semiconductor memory device including a boost circuit comprises a plurality of circuits using boost voltages, for example, a memory cell array, an output circuit and a plurality of boost circuits, each being provided for the corresponding one of these circuits. With such constitution, a problem of noise interference among the circuits using the boost voltages can be removed.

摘要翻译： 公开了一种半导体存储器件，其包括使用通过升高外部电源电压而获得的电压的多个电路，并且由这些电路的操作产生的电源噪声对其他电路没有影响。 包括升压电路的半导体存储器件包括使用升压电压的多个电路，例如存储单元阵列，输出电路和多个升压电路，每个升压电路为这些电路中的相应一个提供。 利用这种结构，可以消除使用升压电压的电路之间的噪声干扰的问题。

公开(公告)号：US5881000A

公开(公告)日：1999-03-09

申请号：US120739

申请日：1998-07-23

申请人： Kazunori Maeda

发明人： Kazunori Maeda

IPC分类号： G11C11/407 ,  G11C5/14 ,  G11C7/10 ,  G11C11/409 ,  G11C7/00

CPC分类号： G11C7/1057 ,  G11C5/145 ,  G11C7/1051

摘要： A semiconductor synchronous dynamic random access memory device supplies a series of data bits to an external device through a burst access; a first boosting circuit produces a first boosted voltage from a pulse signal internally generated by a ring oscillator, a second boosting circuit produces a second boosted voltage from a system clock, and the output node of the first boosting circuit is electrically connected to the output node of the second boosting circuit; while an output circuit is producing an output data signal from read-out data bits in synchronism with the system clock during the burst access, the second boosting circuit pumps electric charge to the output circuit in synchronism with the system clock so as to stably supply the second boosted voltage, and the output circuit converts the read-out data bits to the output data signal at high-speed.

摘要翻译： 半导体同步动态随机存取存储器件通过突发存取将一系列数据位提供给外部设备; 第一升压电路从由环形振荡器内部产生的脉冲信号产生第一升压电压，第二升压电路从系统时钟产生第二升压电压，并且第一升压电路的输出节点电连接到输出节点 的第二升压电路; 而输出电路在脉冲串访问期间与系统时钟同步地从读出数据位产生输出数据信号，第二升压电路与系统时钟同步地将电荷泵送到输出电路，以便稳定地供应 第二升压电压，并且输出电路以高速将读出的数据位转换为输出数据信号。