公开(公告)号：US5107306A

公开(公告)日：1992-04-21

申请号：US412023

申请日：1989-09-25

Applicant: Peter Blood ,  Charles T. Foxon

Inventor： Peter Blood ,  Charles T. Foxon

IPC: G02B6/12 ,  G02B6/122 ,  G02B6/13 ,  H01L33/00 ,  H01L33/04 ,  H01L33/06 ,  H01S5/00 ,  H01S5/042 ,  H01S5/20 ,  H01S5/34

CPC classification number: H01L33/04 ,  B82Y20/00 ,  G02B6/131 ,  H01L33/0062 ,  H01L33/06 ,  H01S5/20 ,  H01S5/34 ,  H01S5/041 ,  H01S5/2004 ,  H01S5/2059 ,  H01S5/3413

Abstract: A first doped region (20) is grown on a semiconductor substrate (1) as a superlattice region having alternate layers (21, 22) of a first and second semiconductor material followed by a waveguide region (30) having at least a superlattice region with alternate layers (31, 32) of the first and second semiconductor materials. A second doped region (40) is then grown as a superlattice including alternate layers (41, 42) of the first and second semiconductor materials on the waveguide region (30). The first and second doped regions (20 and 40) are grown so that the layers (21, 22, 41, 42) of the first and second semiconductor materials are sufficiently thin and are sufficiently highly doped as to become disordered during growth so that the first and second doped regions (20 and 40) are formed by an alloy of the first and second semiconductor materials having a lower refractive index and larger bandgap than the waveguide superlattice region (30). The device may be a semiconductor laser and the waveguide region (30) may be formed as two superlattice regions (30a, 30b) separated by an active region (50) of the laser.

公开(公告)号：US5097243A

公开(公告)日：1992-03-17

申请号：US491393

申请日：1990-03-08

Applicant: Victor Zieren ,  Jacobus J. M. Ruigrok

Inventor： Victor Zieren ,  Jacobus J. M. Ruigrok

IPC: G11B5/31 ,  H01F27/24 ,  H01F27/36 ,  H01F36/00

CPC classification number: H01F36/00 ,  G11B5/3126 ,  H01F27/24 ,  H01F27/36 ,  Y02E40/66 ,  Y10S336/01 ,  Y10S505/87

Abstract: Thin-film transformer, for example suitable for use in a thin-film magnetic head, comprising a magnetic yoke composed of two magnetically permeable thin layers 3 and 5 and a primary turn constituted by an electrically conducting thin layer 13 and a secondary turn constituted by an electrically conducting thin layer 15. A thin layer 21 of a superconducting material is provided between the layer 3 and the said turns, or the turns are closely fitted together and made of a superconducting material themselves.

Abstract translation: 薄膜变压器，例如适用于薄膜磁头，包括由两个导磁薄层3和5组成的磁轭和由导电薄层13构成的初级匝和由 导电薄层15.超导材料的薄层21设置在层3和所述匝之间，或者匝紧密地配合在一起并且由超导材料本身制成。

公开(公告)号：US5087898A

公开(公告)日：1992-02-11

申请号：US663074

申请日：1991-02-28

Applicant: Ramesh Pyndiah ,  Francis van den Bogaart

Inventor： Ramesh Pyndiah ,  Francis van den Bogaart

IPC: H03H11/38 ,  H01P1/38 ,  H03F3/60 ,  H03H11/52

CPC classification number: H01P1/38 ,  H03H11/52

Abstract: An integrated semiconductor active isolator circuit which includes a negative feedback amplifier having an active semiconductor amplifier element. The control terminal of the semiconductor amplifying element defines the output of the isolator circuit and a principal conduction electrode of the semiconductor amplifying element defines an input of the isolator circuit.

Abstract translation: 一种集成半导体有源隔离器电路，其包括具有有源半导体放大器元件的负反馈放大器。 半导体放大元件的控制端限定绝缘电路的输出，半导体放大元件的主导电极限定隔离电路的输入。

公开(公告)号：US5087840A

公开(公告)日：1992-02-11

申请号：US657334

申请日：1991-02-13

Applicant: Thomas J. Davies ,  Leonardus C. M. G. Pfennings, decease ,  by Henricus J. Kunnen, legal representative ,  Peter H. Voss ,  Cormac M. O'Connell ,  Cathal G. Phelan ,  Hans Ontrop

Inventor： Thomas J. Davies ,  Leonardus C. M. G. Pfennings, decease ,  by Henricus J. Kunnen, legal representative ,  Peter H. Voss ,  Cormac M. O'Connell ,  Cathal G. Phelan ,  Hans Ontrop

IPC: G11C11/413 ,  G11C7/10 ,  H03K19/0948

CPC classification number: G11C7/1057 ,  G11C7/1051 ,  G11C7/106

Abstract: An integrated circuit having logic circuits and a logic output buffer, which circuit includes the following sub-circuits: a memory circuit and a logic output circuit, in which no tri-state occurs at the output during a sequence of data signals at the input, wherein the drive of the circuit by means of control signals is not critical over time because the first data signal from the sequence switches off the tri-state mode, the tri-state mode again being introduced if a control signal is furnished, and in the absence of this control signal, the last data signal is retained.

公开(公告)号：US5073760A

公开(公告)日：1991-12-17

申请号：US521770

申请日：1990-05-10

Applicant: Anthony H. Richards

Inventor： Anthony H. Richards

IPC: H03G11/00 ,  H03F3/45

CPC classification number: H03F3/45479

Abstract: A d.c. blocking amplifier circuit which has a fast start-up time and can be d.c. coupled to other similar circuits or cascaded with differential amplifiers comprising first and second differential amplifiers (40,42 and 44,46) and first and second balanced input lines (52,56), the first input line (52) being connected to the first differential amplifier which in operation amplifies an a.c. signal applied by way of the first input line (52), and the second input line (56) being connected to the second differential amplifier (44,46) which in operation amplifies an a.c. signal applied by way of the second input line (56). Outputs of the first and second differential amplifiers (40,42 and 44,46) are combined to produce an amplified signal which is independent of the d.c. conditions on each of the first and second balanced signal input lines. The circuit is suitable for use in digital paging receivers which operate a battery economizing regime.

公开(公告)号：US5059854A

公开(公告)日：1991-10-22

申请号：US461892

申请日：1990-01-08

Applicant: Petrus G. H. J. Smits

Inventor： Petrus G. H. J. Smits

IPC: H01J9/20 ,  H01J29/88 ,  H01J31/50

CPC classification number: H01J9/20 ,  H01J29/88 ,  H01J31/501 ,  H01J2229/885

Abstract: In an image intensifier tube comprising a photosensitive layer an insulating wall portion is coated with a layer of chromium oxide which is deposited in the form of a chromium nitrate layer which is subsequently baked at a temperature of approximately 525.degree. C. A thin, suitably adhesive, uniform and transparent coating layer having a comparatively high resistance value is thus achieved.

公开(公告)号：US5058984A

公开(公告)日：1991-10-22

申请号：US547572

申请日：1990-06-28

Applicant: Jonathan M. Bulman ,  Glenton P. McFarlane ,  Sean Maguire

Inventor： Jonathan M. Bulman ,  Glenton P. McFarlane ,  Sean Maguire

IPC: G02B6/36 ,  G02B6/38

CPC classification number: G02B6/3887 ,  G02B6/3869 ,  G02B6/3854 ,  G02B6/3861 ,  G02B6/3894

Abstract: A tubular connector body (10) has one end (11) for receiving an optical fibre cable (1) having a plastics outer sleeve (3) protecting an optical fibre (2) and carries at the other end (12) connection means (20) for coupling to another similar connection body. A ferrule (30) is mounted within the other end (12) of the connector body (10) to support an exposed end portion (2a) of the optical fibre (2) within an irradiation settable adhesive material (40) injected into the ferrule (30). A deformable gripping member (50) is inserted into the one end (11) of the connector body (10) to grip an end portion (3a) of the plastics outer sleeve (3) of the cable upon deformation of the gripping member (50) by application of a force to the one end (11) of the tubular connector body (10).

公开(公告)号：US5054880A

公开(公告)日：1991-10-08

申请号：US446494

申请日：1989-12-05

Applicant: Siegfried Bruggendieck

Inventor： Siegfried Bruggendieck

IPC: G02B6/44

CPC classification number: G02B6/4405 ,  G02B6/4463 ,  G02B6/4479 ,  G02B6/4484

Abstract: The invention relates to a method of manufacturing an optical line, in which at least one LWG (4, 11, 15, 19) extends in an envelope (3, 9, 13, 18) with excess length and is fixed with respect to the envelope by positioning elements (7, 8, 12, 20). The adjustment of an exactly defined excess length of one or several LWGs is made possible without the use of expensive manufacturing devices in that the positioning elements (7, 8, 12, 20) are provided on the LWGs (4, 11, 15, 19) prior to or during the insertion in the envelope (3, 9, 13, 18) and that the LWGs are pulled in by unreeling forces acting on the envelope (3, 9, 13, 18).

Abstract translation: 本发明涉及一种制造光学线路的方法，其中至少一个LWG（4,11,15,19）在具有多余长度的外壳（3,9,13,18）中延伸并相对于 通过定位元件（7,8,12,20）进行包络。 在不使用昂贵的制造装置的情况下，可以对一个或多个LWG进行精确限定的多余长度的调节，因为定位元件（7,8,12,20）设置在LWG（4,11,15,15,19）上 ）在插入信封（3,9,13,18）之前或期间，并且LWG被作用在信封（3,9,13,18）上的放卷力拉入。

公开(公告)号：US5054095A

公开(公告)日：1991-10-01

申请号：US390327

申请日：1989-08-07

Applicant: Johannes A. C. Bernsen ,  Reinier van den Boomgaard

Inventor： Johannes A. C. Bernsen ,  Reinier van den Boomgaard

IPC: G06K9/64

CPC classification number: G06K9/6202

Abstract: A method of recognizing a pattern in a field having a multi-valent amplitude, and a device for performing the method, uses association with a reference mask which is composed of logic high units and logic low units. The reference mask is sub-divided into two sub-masks, units having the same logic value belonging to the same sub-mask. The first and the second sub-mask contain relevant logic high units and logic low units, respectively. After the positioning of the sub-masks in the field, a relatively lowest and a relatively highest value of the amplitude are determined within the window of the first and the second sub-mask, respectively. When the difference formed by the relatively lowest value minus the relatively highest value is not negative, the desired pattern can in principle be recognized in the field. The device for performing the method includes at least one rank-value filter for determining the relatively highest value and the relatively lowest value. There is also determined the sign of the difference between the relatively lowest value and the relatively highest value.

Abstract translation: 识别具有多价幅度的场中的图案的方法和用于执行该方法的装置使用与由逻辑高单位和逻辑低单元组成的参考掩码的关联。 参考掩码被细分成两个子掩码，具有属于相同子掩码的相同逻辑值的单元。 第一和第二子掩码分别包含相关的逻辑高单位和逻辑低单位。 在子屏幕定位之后，分别在第一和第二子掩模的窗口内确定幅度相对较低和相对较高的值。 当由相对较低的值减去相对较高的值形成的差值不是负的时，原则上可以在现场识别所需的图案。 用于执行该方法的装置包括用于确定相对最高值和相对最低值的至少一个秩值滤波器。 还确定了相对较低的值和相对较高的值之间的差异的符号。

公开(公告)号：US5053723A

公开(公告)日：1991-10-01

申请号：US541000

申请日：1990-06-20

Applicant: Hans-Robert Schemmel

Inventor： Hans-Robert Schemmel

IPC: H04L7/033 ,  H03B5/36 ,  H03L7/099 ,  H03L7/183

CPC classification number: H03B5/366 ,  H03L7/0991 ,  H03J2200/10 ,  H03L7/183

Abstract: A phase-locked loop includes an oscillator controlled by means of a switching network and a microprocessor which generates, in response to the output of a phase detector, two groups of output signals. A first group (Q1 . . . QN) is for adjusting the frequency of the oscillator in steps by selectively switching in frequency determining elements, and a second group (P1 . . . PM) for feeding a pulse duration modulator. The pulse duration modulator produces a control signal for a frequency determining minimum element of the switching network. The control signal has a duty cycle indicative of the frequency determination contribution by the minimum element.

Abstract translation: 锁相环包括通过开关网络控制的振荡器和响应于相位检测器的输出而产生两组输出信号的微处理器。 第一组（Q1 ... QN）用于通过选择性地切换频率确定元件来调节振荡器的频率，以及用于馈送脉冲持续时间调制器的第二组（P1 ... PM）。 脉冲持续时间调制器产生用于频率确定交换网络的最小元素的控制信号。 控制信号具有指示由最小元素的频率确定贡献的占空比。